Last update:
Wed Jan 15 10:20:48 MST 2025
Wayne Wolf Introduction to the inaugural issue . . 1--1
Bruce Jacob and
Shuvra Bhattacharyya Introduction to the two special issues
on memory . . . . . . . . . . . . . . . 2--5
Oren Avissar and
Rajeev Barua and
Dave Stewart An optimal memory allocation scheme for
scratch-pad-based embedded systems . . . 6--26
G. Chen and
R. Shetty and
M. Kandemir and
N. Vijaykrishnan and
M. J. Irwin and
M. Wolczko Tuning garbage collection for reducing
memory system energy in an embedded Java
environment . . . . . . . . . . . . . . 27--55
Jung-Hoon Lee and
Shin-Dug Kim and
Charles Weems Application-adaptive intelligent cache
memory system . . . . . . . . . . . . . 56--78
Jun Yang and
Rajiv Gupta Frequent value locality and its
applications . . . . . . . . . . . . . . 79--105
Ch. Ykman-Couvreur and
J. Lambrecht and
A. Van Der Togt and
F. Catthoor and
H. De Man System-level exploration of association
table implementations in telecom network
applications . . . . . . . . . . . . . . 106--140
Bruce Jacob and
Shuvra Bhattacharyya Introduction to the two special issues
on memory . . . . . . . . . . . . . . . 1--4
Luca Benini and
Alberto Macii and
Massimo Poncino Energy-aware design of embedded
memories: a survey of technologies,
architectures, and optimization
techniques . . . . . . . . . . . . . . . 5--32
Peter Grun and
Nikil Dutt and
Alex Nicolau Access pattern-based memory and
connectivity architecture exploration 33--73
Gang Qu and
Miodrag Potkonjak System synthesis of synchronous
multimedia applications . . . . . . . . 74--97
Hojun Shim and
Yongsoo Joo and
Yongseok Choi and
Hyung Gyu Lee and
Naehyuck Chang Low-energy off-chip SDRAM memory systems
for embedded applications . . . . . . . 98--130
Gao Guang and
Trevor Mudge Special issue on compilers,
architecture, and synthesis for embedded
systems . . . . . . . . . . . . . . . . 131--131
Björn Franke and
Michael O'Boyle Array recovery and high-level
transformations for DSP applications . . 132--162
Soontae Kim and
N. Vijaykrishnan and
Mahmut Kandemir and
Anand Sivasubramaniam and
Mary Jane Irwin Partitioned instruction cache
architecture for energy efficiency . . . 163--185
Rodric M. Rabbah and
Krishna V. Palem Data remapping for design space
optimization of embedded memory systems 186--218
Qin Zhao and
Bart Mesman and
Twan Basten Static resource models for code-size
efficient embedded processors . . . . . 219--250
Margarida Jacome and
Francky Catthoor Special issue on power-aware embedded
computing . . . . . . . . . . . . . . . 251--254
Thomas L. Martin and
Daniel P. Siewiorek and
Asim Smailagic and
Matthew Bosworth and
Matthew Ettus and
Jolin Warren A case study of a system-level approach
to power-aware computing . . . . . . . . 255--276
Daler Rakhmatov and
Sarma Vrudhula Energy management for battery-powered
embedded systems . . . . . . . . . . . . 277--324
Sandy Irani and
Sandeep Shukla and
Rajesh Gupta Online strategies for dynamic power
management in systems with multiple
power-saving states . . . . . . . . . . 325--346
Huiyang Zhou and
Mark C. Toburen and
Eric Rotenberg and
Thomas M. Conte Adaptive mode control: a
static-power-efficient cache design . . 347--372
Osman S. Unsal and
Raksit Ashok and
Israel Koren and
C. Mani Krishna and
Csaba Andras Moritz Cool-Cache: a compiler-enabled energy
efficient data caching framework for
embedded/multimedia processors . . . . . 373--392
Han-Saem Yun and
Jihong Kim On energy-optimal voltage scheduling for
fixed-priority hard real-time systems 393--430
Curt Schurgers and
Vijay Raghunathan and
Mani B. Srivastava Power management for energy-aware
communication systems . . . . . . . . . 431--447
Ann Gordon-Ross and
Susan Cotterell and
Frank Vahid Tiny instruction caches for low power
embedded systems . . . . . . . . . . . . 449--481
Kelvin Lin and
Chung-Ping Chung and
Jean Jyh-Jiun Shann Compressing MIPS code by multiple
operand dependencies . . . . . . . . . . 482--508
Enric Musoll Speculating to reduce unnecessary power
consumption . . . . . . . . . . . . . . 509--536
Cosmin Rusu and
Rami Melhem and
Daniel Mossé Maximizing rewards for real-time
applications with energy constraints . . 537--559
Girish Venkataramani and
Walid Najjar and
Fadi Kurdahi and
Nader Bagherzadeh and
Wim Bohm and
Jeff Hammes Automatic compilation to a
coarse-grained reconfigurable
system-on-a-chip . . . . . . . . . . . . 560--589
Qingfeng Zhuge and
Bin Xiao and
Edwin H.-M. Sha Code size reduction technique and
implementation for software-pipelined
DSP applications . . . . . . . . . . . . 590--613
Rajesh Gupta Guest editorial: Special issue on
networked embedded systems . . . . . . . 1--2
Vijay Raghunathan and
Saurabh Ganeriwal and
Mani Srivastava and
Curt Schurgers Energy efficient wireless packet
scheduling and fair queuing . . . . . . 3--23
Nirupama Bulusu and
John Heidemann and
Deborah Estrin and
Tommy Tran Self-configuring localization systems:
Design and Experimental Evaluation . . . 24--60
Yi Zou and
Krishnendu Chakrabarty Sensor deployment and target
localization in distributed sensor
networks . . . . . . . . . . . . . . . . 61--91
Catherine H. Gebotys Design of secure cryptography against
the threat of power-attacks in
DSP-embedded processors . . . . . . . . 92--113
Prabhat Mishra and
Nikil Dutt Modeling and validation of pipeline
specifications . . . . . . . . . . . . . 114--139
Prabhat Mishra and
Mahesh Mamidipaka and
Nikil Dutt Processor-memory coexploration using an
architecture description language . . . 140--162
Mayur Naik and
Jens Palsberg Compiling with code-size constraints . . 163--181
Marcus T. Schmitz and
Bashir M. Al-Hashimi and
Petru Eles Iterative schedule optimization for
voltage scalable distributed embedded
systems . . . . . . . . . . . . . . . . 182--217
Greg Stitt and
Frank Vahid and
Shawn Nematbakhsh Energy savings and speedups from
partitioning critical software loops to
hardware in embedded systems . . . . . . 218--232
John Lach and
Kia Bazargan Editorial: Special issue on dynamically
adaptable embedded systems . . . . . . . 233--236
Soheil Ghiasi and
Ani Nahapetian and
Majid Sarrafzadeh An optimal algorithm for minimizing
run-time reconfiguration delay . . . . . 237--256
Ian Robertson and
James Irvine A design flow for partially
reconfigurable hardware . . . . . . . . 257--283
Pedro Mejia-Alvarez and
Eugene Levner and
Daniel Mossé Adaptive scheduling server for
power-aware real-time tasks . . . . . . 284--306
Fan Zhang and
Samuel T. Chanson Blocking-aware processor voltage
scheduling for real-time tasks . . . . . 307--335
Ying Zhang and
Krishnendu Chakrabarty Dynamic adaptation for fault tolerance
and power management in embedded
real-time systems . . . . . . . . . . . 336--360
Zhining Huang and
Sharad Malik and
Nahri Moreano and
Guido Araujo The design of dynamically reconfigurable
datapath coprocessors . . . . . . . . . 361--384
Juanjo Noguera and
Rosa M. Badia Multitasking on reconfigurable
architectures: microarchitecture support
and dynamic scheduling . . . . . . . . . 385--406
Chuanjun Zhang and
Frank Vahid and
Roman Lysecky A self-tuning cache architecture for
embedded systems . . . . . . . . . . . . 407--425
Tian He and
Brian M. Blum and
John A. Stankovic and
Tarek Abdelzaher AIDA: Adaptive application-independent
data aggregation in wireless sensor
networks . . . . . . . . . . . . . . . . 426--457
Dimitrios N. Serpanos and
Haris Lekatsas Guest editorial: Special issue on
embedded systems and security . . . . . 459--460
Srivaths Ravi and
Anand Raghunathan and
Paul Kocher and
Sunil Hattangady Security in embedded systems: Design
challenges . . . . . . . . . . . . . . . 461--491
Jean-Sebastien Coron and
David Naccache and
Paul Kocher Statistics and secret leakage . . . . . 492--508
Thomas Wollinger and
Jan Pelzl and
Volker Wittelsberger and
Christof Paar and
Gökay Saldamli and
Çetin K. Koç Elliptic and hyperelliptic curves on
embedded $ \mu $P . . . . . . . . . . . 509--533
Thomas Wollinger and
Jorge Guajardo and
Christof Paar Security on FPGAs: State-of-the-art
implementations and attacks . . . . . . 534--574
Arash Reyhani-Masoleh and
M. Anwar Hasan Efficient digit-serial normal basis
multipliers over binary extension fields 575--592
Arash Reyhani-Masoleh and
M. Anwar Hasan Towards fault-tolerant cryptographic
computations over finite fields . . . . 593--613
Rong-Tai Liu and
Nen-Fu Huang and
Chih-Hao Chen and
Chia-Nan Kao A fast string-matching algorithm for
network processor-based intrusion
detection system . . . . . . . . . . . . 614--633
Taejoon Park and
Kang G. Shin LiSP: a lightweight security protocol
for wireless sensor networks . . . . . . 634--660
J. Harkin and
T. M. McGinnity and
L. P. Maguire Modeling and optimizing run-time
reconfiguration using evolutionary
computation . . . . . . . . . . . . . . 661--685
Chaeseok Im and
Soonhoi Ha and
Huiseok Kim Dynamic voltage scheduling with buffers
in low-power multimedia applications . . 686--705
Sorin Manolache and
Petru Eles and
Zebo Peng Schedulability analysis of applications
with stochastic task execution times . . 706--735
Dimitrios N. Serpanos and
Poluxeni Mountrouidou and
Maria Gamvrili Evaluation of hardware and software
schedulers for embedded switches . . . . 736--759
Ruggero Lanotte and
Andrea Maggiolo-Schettini and
Simone Tini Information flow in hybrid systems . . . 760--799
Donggang Liu and
Peng Ning Multilevel $ \mu $TESLA: Broadcast
authentication for distributed sensor
networks . . . . . . . . . . . . . . . . 800--836
Li-Pin Chang and
Tei-Wei Kuo and
Shi-Wu Lo Real-time garbage collection for
flash-memory storage systems of
real-time embedded systems . . . . . . . 837--863
Frank Mueller and
Per Stenström Introduction to the special issue . . . 1--2
Arvind Krishnaswamy and
Rajiv Gupta Dynamic coalescing for 16-bit
instructions . . . . . . . . . . . . . . 3--37
Marc L. Corliss and
E. Christopher Lewis and
Amir Roth The implementation and evaluation of
dynamic code decompression using DISE 38--72
Dinakar Dhurjati and
Sumant Kowshik and
Vikram Adve and
Chris Lattner Memory safety without garbage collection
for embedded applications . . . . . . . 73--111
Paul Pop and
Petru Eles and
Zebo Peng Schedulability-driven frame packing for
multicluster distributed embedded
systems . . . . . . . . . . . . . . . . 112--140
Vishnu Swaminathan and
Krishnendu Chakrabarty Pruning-based, energy-optimal,
deterministic I/O device scheduling for
hard real-time systems . . . . . . . . . 141--167
Lih-yih Chiou and
Swarup Bhunia and
Kaushik Roy Synthesis of application-specific highly
efficient multi-mode cores for embedded
systems . . . . . . . . . . . . . . . . 168--188
Joseph Zambreno and
Alok Choudhary and
Rahul Simha and
Bhagi Narahari and
Nasir Memon SAFE-OPS: an approach to embedded
software security . . . . . . . . . . . 189--210
Woo-Cheol Kwon and
Taewhan Kim Optimal voltage allocation techniques
for dynamically variable voltage
processors . . . . . . . . . . . . . . . 211--230
T. K. Tan and
A. Raghunathan and
N. K. Jha Energy macromodeling of embedded
operating systems . . . . . . . . . . . 231--254
Sandeep K. Shukla and
Jean-Pierre Talpin Guest editorial: Special issue on models
and methodologies for co-design of
embedded systems . . . . . . . . . . . . 225--227
David Cachera and
Katell Morin-Allory Verification of safety properties for
parameterized regular systems . . . . . 228--266
S. Chouali and
J. Julliand and
P.-A. Masson and
F. Bellegarde PLTL-partitioned model checking for
reactive systems under fairness
assumptions . . . . . . . . . . . . . . 267--301
William B. Gardner Converging CSP specifications and C++
programming via selective formalism . . 302--330
Roberto Ziller and
Klaus Schneider Combining supervisor synthesis and model
checking . . . . . . . . . . . . . . . . 331--362
Chuanjun Zhang and
Frank Vahid and
Walid Najjar A highly configurable cache for low
energy embedded systems . . . . . . . . 363--387
I. Kadayif and
M. Kandemir Data space-oriented tiling for enhancing
locality . . . . . . . . . . . . . . . . 388--414
Radu Muresan and
Catherine Gebotys Instantaneous current modeling in a
complex VLIW processor core . . . . . . 415--451
Peter Petrov and
Alex Orailoglu A reprogrammable customization framework
for efficient branch resolution in
embedded processors . . . . . . . . . . 452--468
Alan Burns Editorial . . . . . . . . . . . . . . . 469--471
Alberto L. Sangiovanni-Vincentelli and
Alessandro Pinto An overview of embedded system design
education at Berkeley . . . . . . . . . 472--499
Philip Koopman and
Howie Choset and
Rajeev Gandhi and
Bruce Krogh and
Diana Marculescu and
Priya Narasimhan and
Joann M. Paul and
Ragunathan Rajkumar and
Daniel Siewiorek and
Asim Smailagic and
Peter Steenkiste and
Donald E. Thomas and
Chenxi Wang Undergraduate embedded system education
at Carnegie Mellon . . . . . . . . . . . 500--528
Ingrid Verbauwhede and
Patrick Schaumont Skiing the embedded systems mountain . . 529--548
Janos Sztipanovits and
Gautam Biswas and
Ken Frampton and
Aniruddha Gokhale and
Larry Howard and
Gabor Karsai and
T. John Koo and
Xenofon Koutsoukos and
Douglas C. Schmidt Introducing embedded software and
systems education and advanced learning
technology in an engineering curriculum 549--568
Rudolph E. Seviora A curriculum for embedded system
engineering . . . . . . . . . . . . . . 569--586
P. Caspi and
A. Sangiovanni-Vincentelli and
L. Almeida and
A. Benveniste and
B. Bouyssounouse and
G. Buttazzo and
I. Crnkovic and
W. Damm and
J. Engblom and
G. Folher and
M. Garcia-Valls and
H. Kopetz and
Y. Lakhnech and
F. Laroussinie and
L. Lavagno and
G. Lipari and
F. Maraninchi and
Ph. Peti and
J. de la Puente and
N. Scaife and
J. Sifakis and
R. de Simone and
M. Torngren and
P. Veríssimo and
A. J. Wellings and
R. Wilhelm and
T. Willemse and
W. Yi Guidelines for a graduate curriculum on
embedded software and systems . . . . . 587--611
Tai-Yi Huang and
Chung-Ta King and
Youn-Long Steve Lin and
Yin-Tsung Hwang The embedded software consortium of
Taiwan . . . . . . . . . . . . . . . . . 612--632
Martin Grimheden and
Martin Törngren What is embedded systems and how should
it be taught?---results from a didactic
analysis . . . . . . . . . . . . . . . . 633--651
Wei Zhang and
Mahmut Kandemir and
Mustafa Karakoy and
Guangyu Chen Reducing data cache leakage energy using
a compiler-based approach . . . . . . . 652--678
Hyung Seok Kim and
Tarek F. Abdelzaher and
Wook Hyun Kwon Dynamic delay-constrained minimum-energy
dissemination in wireless sensor
networks . . . . . . . . . . . . . . . . 679--706
Rajeev Alur and
Insup Lee Preface . . . . . . . . . . . . . . . . 707--707
Olivier Tardieu and
Robert de Simone Loops in ESTEREL . . . . . . . . . . . . 708--750
John Regehr and
Alastair Reid and
Kirk Webb Eliminating stack overflow by abstract
interpretation . . . . . . . . . . . . . 751--778
Stavros Tripakis and
Christos Sofronis and
Paul Caspi and
Adrian Curic Translating discrete-time Simulink to
Lustre . . . . . . . . . . . . . . . . . 779--818
I. Kadayif and
M. Kandemir and
G. Chen and
N. Vijaykrishnan and
M. J. Irwin and
A. Sivasubramaniam Compiler-directed high-level energy
estimation and optimization . . . . . . 819--850
J. Hu and
M. Kandemir and
N. Vijaykrishnan and
M. J. Irwin Analyzing data reuse for cache
reconfiguration . . . . . . . . . . . . 851--876
Tian He and
Chengdu Huang and
Brian M. Blum and
John A. Stankovic and
Tarek F. Abdelzaher Range-free localization and its impact
on large scale sensor networks . . . . . 877--906
Bruno Gaujal and
Nicolas Navet and
Cormac Walsh Shortest-path algorithms for real-time
scheduling of FIFO tasks with minimal
energy use . . . . . . . . . . . . . . . 907--933
S. Bartolini and
C. A. Prete Optimizing instruction cache performance
of embedded systems . . . . . . . . . . 934--965
W. Zhang and
Y.-F. Tsai and
D. Duarte and
N. Vijaykrishnan and
M. Kandemir and
M. J. Irwin Reducing dynamic and leakage energy in
VLIW architectures . . . . . . . . . . . 1--28
Philippe Coussy and
Emmanuel Casseau and
Pierre Bomel and
Adel Baganne and
Eric Martin A formal method for hardware IP design
and integration under I/O and timing
constraints . . . . . . . . . . . . . . 29--53
Mauricio Varea and
Bashir M. Al-Hashimi and
Luis A. CortéS and
Petru Eles and
Zebo Peng Dual Flow Nets: Modeling the
control/data-flow relation in embedded
systems . . . . . . . . . . . . . . . . 54--81
Nevine AbouGhazaleh and
Daniel Mossé and
Bruce R. Childers and
Rami Melhem Collaborative operating system and
compiler power management for real-time
applications . . . . . . . . . . . . . . 82--115
Alexander G. Dean Software thread integration for embedded
system display applications . . . . . . 116--151
Rajeev Alur and
Thao Dang and
Franjo Ivan\vci\'c Predicate abstraction for reachability
analysis of hybrid systems . . . . . . . 152--199
Kiran Seth and
Aravindh Anantaraman and
Frank Mueller and
Eric Rotenberg FAST: Frequency-Aware Static Timing
analysis . . . . . . . . . . . . . . . . 200--224
G. Chen and
M. Kandemir and
M. J. Irwin and
J. Ramanujam Reducing code size through address
register assignment . . . . . . . . . . 225--258
Ahmed Jerraya and
Trevor Mudge Guest editorial: Concurrent hardware and
software design for multiprocessor SoC 259--262
Jiang Xu and
Wayne Wolf and
Joerg Henkel and
Srimat Chakradhar A design methodology for
application-specific networks-on-chip 263--280
Tero Kangas and
Petri Kukkala and
Heikki Orsila and
Erno Salminen and
Marko Hännikäinen and
Timo D. Hämäläinen and
Jouni Riihimäki and
Kimmo Kuusilinna UML-based multiprocessor SoC design
framework . . . . . . . . . . . . . . . 281--320
Shaoxiong Hua and
Gang Qu and
Shuvra S. Bhattacharyya Energy-efficient embedded software
implementation on multiprocessor
system-on-chip with multiple voltages 321--341
Fabiano Hessel and
Vitor M. Da Rosa and
Carlos Eduardo Reif and
César Marcon and
Tatiana Gadelha Serra Dos Santos Scheduling refinement in abstract RTOS
models . . . . . . . . . . . . . . . . . 342--354
Jingzhao Ou and
Viktor K. Prasanna Design space exploration using
arithmetic-level hardware--software
cosimulation for configurable
multiprocessor platforms . . . . . . . . 355--382
Mirko Loghi and
Massimo Poncino and
Luca Benini Cache coherence tradeoffs in
shared-memory MPSoCs . . . . . . . . . . 383--407
James Lapalme and
El Mostapha Aboulhamid and
Gabriela Nicolescu A new efficient EDA tool design
methodology . . . . . . . . . . . . . . 408--430
Mehrdad Reshadi and
Nikil Dutt and
Prabhat Mishra A retargetable framework for
instruction-set architecture simulation 431--452
Gokhan Memik and
William H. Mangione-Smith Evaluating Network Processors using
NetBench . . . . . . . . . . . . . . . . 453--471
Sumesh Udayakumaran and
Angel Dominguez and
Rajeev Barua Dynamic allocation for scratch-pad
memory using compile-time decisions . . 472--511
Haisang Wu and
Binoy Ravindran and
E. Douglas Jensen and
Peng Li Energy-efficient, utility accrual
scheduling under resource constraints
for mobile embedded systems . . . . . . 513--542
Liqian Luo and
Tarek F. Abdelzaher and
Tian He and
John A. Stankovic EnviroSuite: an environmentally
immersive programming framework for
sensor networks . . . . . . . . . . . . 543--576
Catherine H. Gebotys A split-mask countermeasure for
low-energy secure embedded systems . . . 577--612
Xiaotong Zhuang and
Santosh Pande Parallelizing load/stores on dual-bank
memory embedded processors . . . . . . . 613--657
Alex K. Jones and
Raymond Hoare and
Dara Kusic and
Gayatri Mehta and
Josh Fazekas and
John Foster Reducing power while increasing
performance with SuperCISC . . . . . . . 658--686
Alain Girault and
Xavier Nicollin and
Marc Pouzet Automatic rate desynchronization of
embedded reactive programs . . . . . . . 687--717
Surupa Biswas and
Thomas Carley and
Matthew Simpson and
Bhuvan Middha and
Rajeev Barua Memory overflow protection for embedded
systems using run-time checks, reuse,
and compression . . . . . . . . . . . . 719--752
M. Teresa Higuera-Toledano Hardware support for detecting illegal
references in a multiapplication
real-time Java environment . . . . . . . 753--772
Victor L. Winter and
Jason Beranek and
Fares Fraij and
Steve Roach and
Greg Wickstrom A transformational perspective into the
core of an abstract class loader for the
SSP . . . . . . . . . . . . . . . . . . 773--818
Prasad Kulkarni and
Wankang Zhao and
Stephen Hines and
David Whalley and
Xin Yuan and
Robert van Engelen and
Kyle Gallivan and
Jason Hiser and
Jack Davidson and
Baosheng Cai and
Mark Bailey and
Hwashin Moon and
Kyunghwan Cho and
Yunheung Paek VISTA: VPO interactive system for tuning
applications . . . . . . . . . . . . . . 819--863
Desiree Ottoni and
Guilherme Ottoni and
Guido Araujo and
Rainer Leupers Offset assignment using simultaneous
variable coalescing . . . . . . . . . . 864--883
David Whalley Guest Editorial . . . . . . . . . . . . 1:1--1:??
Nagendra J. Kumar and
Vasanth Asokan and
Siddhartha Shivshankar and
Alexander G. Dean Efficient software implementation of
embedded communication protocol
controllers using asynchronous software
thread integration with time- and
space-efficient procedure calls . . . . 2:1--2:??
Xiaotong Zhuang and
Santosh Pande Power-efficient prefetching for embedded
processors . . . . . . . . . . . . . . . 3:1--3:??
Gilberto Contreras and
Margaret Martonosi and
Jinzhang Peng and
Guei-Yuan Lueh and
Roy Ju The XTREM power and performance
simulator for the Intel XScale core:
Design and experiences . . . . . . . . . 4:1--4:??
Bjorn De Sutter and
Ludo Van Put and
Dominique Chanet and
Bruno De Bus and
Koen De Bosschere Link-time compaction and optimization of
ARM executables . . . . . . . . . . . . 5:1--5:??
Elena Moscu Panainte and
Koen Bertels and
Stamatis Vassiliadis The Molen compiler for reconfigurable
processors . . . . . . . . . . . . . . . 6:1--6:??
Yudong Tan and
Vincent Mooney Timing analysis for preemptive
multitasking real-time systems with
caches . . . . . . . . . . . . . . . . . 7:1--7:??
Stefan Ratschan and
Zhikun She Safety verification of hybrid systems by
constraint propagation-based abstraction
refinement . . . . . . . . . . . . . . . 8:1--8:??
Henk Schepers Guest editorial: Introduction to the
special issue on software and compilers
for embedded systems . . . . . . . . . . 9:1--9:??
Sheayun Lee and
Jaejin Lee and
Chang Yun Park and
Sang Lyul Min Selective code transformation for dual
instruction set processors . . . . . . . 10:1--10:??
Wei Zhang and
Bramha Allu Reducing branch predictor leakage energy
by exploiting loops . . . . . . . . . . 11:1--11:??
Hanno Scharwaechter and
David Kammler and
Andreas Wieferink and
Manuel Hohenauer and
Kingshuk Karuri and
Jianjiang Ceng and
Rainer Leupers and
Gerd Ascheid and
Heinrich Meyr ASIP architecture exploration for
efficient IPSec encryption: a case study 12:1--12:??
Alexandru Turjan and
Bart Kienhuis and
Ed Deprettere Classifying interprocess communication
in process network representation of
nested-loop programs . . . . . . . . . . 13:1--13:??
Ming-Yung Ko and
Praveen K. Murthy and
Shuvra S. Bhattacharyya Beyond single-appearance schedules:
Efficient DSP software synthesis using
nested procedure calls . . . . . . . . . 14:1--14:??
Shaoxiong Hua and
Gang Qu and
Shuvra S. Bhattacharyya Probabilistic design of multimedia
embedded systems . . . . . . . . . . . . 15:1--15:??
Farinaz Koushanfar and
Abhijit Davare and
David T. Nguyen and
Alberto Sangiovanni-Vincentelli and
Miodrag Potkonjak Techniques for maintaining connectivity
in wireless ad-hoc networks under energy
constraints . . . . . . . . . . . . . . 16:1--16:??
Flávio R. Wagner and
Wander Cesário and
Ahmed A. Jerraya Hardware/software IP integration using
the ROSES design environment . . . . . . 17:1--17:??
Sang-Won Lee and
Dong-Joo Park and
Tae-Sun Chung and
Dong-Ho Lee and
Sangwon Park and
Ha-Joo Song A log buffer-based flash translation
layer using fully-associative sector
translation . . . . . . . . . . . . . . 18:1--18:??
Chin-Hsien Wu and
Tei-Wei Kuo and
Li Ping Chang An efficient B-tree layer implementation
for flash-memory storage systems . . . . 19:1--19:??
Tao Xie and
Xiao Qin Improving security for periodic tasks in
embedded systems through scheduling . . 20:1--20:??
Rajiv Gupta and
Yunheung Paek Introduction to the special LCTES'05
issue . . . . . . . . . . . . . . . . . 21:1--21:??
David Gay and
Philip Levis and
David Culler Software design patterns for TinyOS . . 22:1--22:??
Dominique Chanet and
Bjorn De Sutter and
Bruno De Bus and
Ludo Van Put and
Koen De Bosschere Automated reduction of the memory
footprint of the Linux kernel . . . . . 23:1--23:??
Peter G. Sassone and
D. Scott Wills and
Gabriel H. Loh Static strands: Safely exposing
dependence chains for increasing
embedded power efficiency . . . . . . . 24:1--24:??
Jan Staschulat and
Rolf Ernst Scalable precision cache analysis for
real-time software . . . . . . . . . . . 25:1--25:??
Ankush Varma and
Bruce Jacob and
Eric Debes and
Igor Kozintsev and
Paul Klein Accurate and fast system-level power
modeling: an XScale-based case study . . 26:1--26:??
Salvatore Carta and
Andrea Alimonda and
Alessandro Pisano and
Andrea Acquaviva and
Luca Benini A control theoretic approach to
energy-efficient pipelined computation
in MPSoCs . . . . . . . . . . . . . . . 27:1--27:??
Tanya L. Crenshaw and
Spencer Hoke and
Ajay Tirumala and
Marco Caccamo Robust implicit EDF: a wireless MAC
protocol for collaborative real-time
systems . . . . . . . . . . . . . . . . 28:1--28:??
Gang Quan and
Xiaobo Sharon Hu Energy efficient DVS schedule for
fixed-priority real-time systems . . . . 29:1--29:??
Ravishankar Rao and
Sarma Vrudhula Energy optimal speed control of a
producer--consumer device pair . . . . . 30:1--30:??
Mirko Loghi and
Luca Benini and
Massimo Poncino Power macromodeling of MPSoC message
passing primitives . . . . . . . . . . . 31:1--31:??
Aman Kansal and
Jason Hsu and
Sadaf Zahedi and
Mani B. Srivastava Power management in energy harvesting
sensor networks . . . . . . . . . . . . 32:1--32:??
David Bueno and
Chris Conger and
Alan D. George and
Ian Troxel and
Adam Leko RapidIO for radar processing in advanced
space systems . . . . . . . . . . . . . 1:1--1:38
Yunsi Fei and
Srivaths Ravi and
Anand Raghunathan and
Niraj K. Jha Energy-optimizing source code
transformations for operating
system-driven embedded software . . . . 2:1--2:26
Yifan Zhu and
Frank Mueller Exploiting synchronous and asynchronous
DVS for feedback EDF scheduling on an
embedded platform . . . . . . . . . . . 3:1--3:26
Xavier Vera and
Björn Lisper and
Jingling Xue Data cache locking for tight timing
calculations . . . . . . . . . . . . . . 4:1--4:38
Austin Armbruster and
Jason Baker and
Antonio Cunei and
Chapman Flack and
David Holmes and
Filip Pizlo and
Edward Pla and
Marek Prochazka and
Jan Vitek A real-time Java virtual machine with
applications in avionics . . . . . . . . 5:1--5:49
Leonardo Mangeruca and
Massimo Baleani and
Alberto Ferrari and
Alberto Sangiovanni-Vincentelli Uniprocessor scheduling under precedence
constraints for embedded systems design 6:1--6:30
Unmesh D. Bordoloi and
Samarjit Chakraborty Interactive schedulability analysis . . 7:1--7:27
Soonhoi Ha and
Kiyoung Choi and
Taewhan Kim and
Krisztian Flautner and
Sanglyul Min and
Wang Yi Introduction to embedded systems week
2006 special issue . . . . . . . . . . . 8:1--8:??
Minyoung Kim and
Sudarshan Banerjee and
Nikil Dutt and
Nalini Venkatasubramanian Energy-aware cosynthesis of real-time
multimedia applications on MPSoCs using
heterogeneous scheduling policies . . . 9:1--9:??
Balaji Raman and
Samarjit Chakraborty Application-specific workload shaping in
multimedia-enabled personal mobile
devices . . . . . . . . . . . . . . . . 10:1--10:??
Bernhard Egger and
Jaejin Lee and
Heonshik Shin Dynamic scratchpad memory management for
code in portable systems with an MMU . . 11:1--11:??
Bernhard Scholz and
Bernd Burgstaller and
Jingling Xue Minimal placement of bank selection
instructions for partitioned memory
architectures . . . . . . . . . . . . . 12:1--12:??
Yoonseo Choi and
Hwansoo Han Shared heap management for
memory-limited Java virtual machines . . 13:1--13:??
Hayden Kwok-Hay So and
Robert Brodersen A unified hardware/software runtime
environment for FPGA-based
reconfigurable computers using BORPH . . 14:1--14:??
Paul Caspi and
Norman Scaife and
Christos Sofronis and
Stavros Tripakis Semantics-preserving multitask
implementation of synchronous programs 15:1--15:??
Duo Liu and
Zheng Chen and
Bei Hua and
Nenghai Yu and
Xinan Tang High-performance packet classification
algorithm for multithreaded IXP network
processor . . . . . . . . . . . . . . . 16:1--16:??
Jianli Zhuo and
Chaitali Chakrabarti Energy-efficient dynamic task scheduling
algorithms for DVS systems . . . . . . . 17:1--17:??
Sheayun Lee and
Insik Shin and
Woonseok Kim and
Insup Lee and
Sang Lyul Min A design framework for real-time
embedded systems with code size and
energy constraints . . . . . . . . . . . 18:1--18:??
Sorin Manolache and
Petru Eles and
Zebo Peng Task mapping and priority assignment for
soft real-time applications under
deadline miss ratio constraints . . . . 19:1--19:??
Taejoon Park and
Kang G. Shin Secure routing based on distributed key
sharing in large-scale sensor networks 20:1--20:??
Young H. Cho and
William H. Mangione-Smith Deep network packet filter design for
reconfigurable devices . . . . . . . . . 21:1--21:??
Sudeep Pasricha and
Nikil Dutt and
Mohamed Ben-Romdhane Fast exploration of bus-based
communication architectures at the CCATB
abstraction . . . . . . . . . . . . . . 22:1--22:??
Marco Di Natale and
Valerio Pappalardo Buffer optimization in multitask
implementations of Simulink models . . . 23:1--23:??
Jelena Trajkovic and
Alexander V. Veidenbaum and
Arun Kejariwal Improving SDRAM access energy efficiency
for low-power embedded systems . . . . . 24:1--24:??
Ankush Varma and
Eric Debes and
Igor Kozintsev and
Paul Klein and
Bruce Jacob Accurate and fast system-level power
modeling: an XScale-based case study . . 25:1--25:??
Tor M. Aamodt and
Paul Chow Compile-time and instruction-set methods
for improving floating- to fixed-point
conversion accuracy . . . . . . . . . . 26:1--26:??
Yunsi Fei and
Lin Zhong and
Niraj K. Jha An energy-aware framework for dynamic
software management in mobile computing
systems . . . . . . . . . . . . . . . . 27:1--27:??
Xiliang Zhong and
Cheng-Zhong Xu System-wide energy minimization for
real-time tasks: Lower bound and
approximation . . . . . . . . . . . . . 28:1--28:??
Ye Zhou and
Edward A. Lee Causality interfaces for actor networks 29:1--29:??
Insik Shin and
Insup Lee Compositional real-time scheduling
framework with periodic model . . . . . 30:1--30:??
Artemios G. Voyiatzis and
Dimitrios N. Serpanos The security of the Fiat--Shamir scheme
in the presence of transient hardware
faults . . . . . . . . . . . . . . . . . 31:1--31:??
Selim Gurun and
Chandra Krintz and
Rich Wolski NWSLite: a general-purpose,
nonparametric prediction utility for
embedded systems . . . . . . . . . . . . 32:1--32:??
Ting Yan and
Yu Gu and
Tian He and
John A. Stankovic Design and optimization of distributed
sensing coverage in wireless sensor
networks . . . . . . . . . . . . . . . . 33:1--33:??
Emre Özer and
Andy P. Nisbet and
David Gregg A stochastic bitwidth estimation
technique for compact and low-power
custom processors . . . . . . . . . . . 34:1--34:??
Rajeev Kumar and
Dipankar Das Code compression for performance
enhancement of variable-length embedded
processors . . . . . . . . . . . . . . . 35:1--35:??
Reinhard Wilhelm and
Jakob Engblom and
Andreas Ermedahl and
Niklas Holsti and
Stephan Thesing and
David Whalley and
Guillem Bernat and
Christian Ferdinand and
Reinhold Heckmann and
Tulika Mitra and
Frank Mueller and
Isabelle Puaut and
Peter Puschner and
Jan Staschulat and
Per Stenström The worst-case execution-time
problem---overview of methods and survey
of tools . . . . . . . . . . . . . . . . 36:1--36:??
Fabiano Hessell and
Kenneth Kent and
Dionisios Pnevmatikatos Editorial: Embedded systems --- new
challenges and future directions . . . . 37:1--37:??
Chanik Park and
Wonmoon Cheon and
Jeonguk Kang and
Kangho Roh and
Wonhee Cho and
Jin-Soo Kim A reconfigurable FTL (flash translation
layer) architecture for NAND flash-based
applications . . . . . . . . . . . . . . 38:1--38:??
Katalin Popovici and
Xavier Guerin and
Frederic Rousseau and
Pier Stanislao Paolucci and
Ahmed Amine Jerraya Platform-based software design flow for
heterogeneous MPSoC . . . . . . . . . . 39:1--39:??
A. Chattopadhyay and
H. Ishebabi and
X. Chen and
Z. Rakosi and
K. Karuri and
D. Kammler and
R. Leupers and
G. Ascheid and
H. Meyr Prefabrication and postfabrication
architecture exploration for partially
reconfigurable VLIW processors . . . . . 40:1--40:??
Yi-Neng Lin and
Ying-Dar Lin and
Yuan-Cheng Lai and
Kuo-Kun Tseng Modeling and analysis of core-centric
network processors . . . . . . . . . . . 41:1--41:??
Jerome Hugues Get and
Bechir Zalila Get and
Laurent Pautet Get and
Fabrice Kordon From the prototype to the final embedded
system using the Ocarina AADL tool suite 42:1--42:??
Albert Benveniste and
Beno\^\it Caillaud and
Luca P. Carloni and
Paul Caspi and
Alberto L. Sangiovanni-Vincentelli Composing heterogeneous reactive systems 43:1--43:??
Catherine H. Gebotys and
Brian A. White EM analysis of a wireless Java-based PDA 44:1--44:??
Tolga Ayav and
Pascal Fradet and
Alain Girault Implementing fault-tolerance in
real-time programs by automatic program
transformations . . . . . . . . . . . . 45:1--45:??
Bhuvan Middha and
Matthew Simpson and
Rajeev Barua MTSS: Multitask stack sharing for
embedded systems . . . . . . . . . . . . 46:1--46:??
Hiroaki Inoue and
Junji Sakai and
Sunao Torii and
Masato Edahiro FIDES: an advanced chip multiprocessor
platform for secure next generation
mobile terminals . . . . . . . . . . . . 1:1--1:??
Taejoon Park and
Kang G. Shin Attack-tolerant localization via
iterative verification of locations in
sensor networks . . . . . . . . . . . . 2:1--2:??
Sayan Mitra and
Daniel Liberzon and
Nancy Lynch Verifying average dwell time of hybrid
systems . . . . . . . . . . . . . . . . 3:1--3:??
Gunar Schirner and
Rainer Dömer Quantitative analysis of the
speed/accuracy trade-off in transaction
level modeling . . . . . . . . . . . . . 4:1--4:??
Xiangrong Zhou and
Peter Petrov Direct address translation for virtual
memory in energy-efficient embedded
systems . . . . . . . . . . . . . . . . 5:1--5:??
Jiyong Park and
Jaesoo Lee and
Saehwa Kim and
Seongsoo Hong Quasistatic shared libraries and XIP for
memory footprint reduction in MMU-less
embedded systems . . . . . . . . . . . . 6:1--6:??
Jun Yan and
Wei Zhang Analyzing the worst-case execution time
for instruction caches with prefetching 7:1--7:??
Najwa Aaraj and
Anand Raghunathan and
Niraj K. Jha Analysis and design of a
hardware/software trusted platform
module for embedded systems . . . . . . 8:1--8:??
Dinesh C. Suresh and
Banit Agrawal and
Jun Yang and
Walid Najjar Energy-efficient encoding techniques for
off-chip data buses . . . . . . . . . . 9:1--9:??
Arun Kejariwal and
Alexander V. Veidenbaum and
Alexandru Nicolau and
Milind Girkar and
Xinmin Tian and
Hideki Saito On the exploitation of loop-level
parallelism in embedded applications . . 10:1--10:??
Matin Hashemi and
Soheil Ghiasi Throughput-driven synthesis of embedded
software for pipelined execution on
multicore architectures . . . . . . . . 11:1--11:??
A. Chattopadhyay and
H. Ishebabi and
X. Chen and
Z. Rakosi and
K. Karuri and
D. Kammler and
R. Leupers and
G. Ascheid and
H. Meyr Pre- and postfabrication architecture
exploration for partially reconfigurable
VLIW processors . . . . . . . . . . . . 12:1--12:??
Yi-Neng Lin and
Ying-Dar Lin and
Kuo-Kun Tseng and
Yuan-Cheng Lai Modeling and analysis of core-centric
network processors . . . . . . . . . . . 13:1--13:??
Xiangrong Zhou and
Peter Petrov Cross-layer customization for rapid and
low-cost task preemption in multitasked
embedded systems . . . . . . . . . . . . 14:1--14:??
Joshua Auerbach and
David F. Bacon and
Daniel Iercan and
Christoph M. Kirsch and
V. T. Rajan and
Harald Röck and
Rainer Trummer Low-latency time-portable real-time
programming with Exotasks . . . . . . . 15:1--15:??
Minwook Ahn and
Yunheung Paek Register coalescing techniques for
heterogeneous register architecture with
copy sifting . . . . . . . . . . . . . . 16:1--16:??
Mohammad Mostafizur Rahman Mozumdar and
Luciano Lavagno and
Laura Vanzago A comparison of software platforms for
wireless sensor networks: MANTIS,
TinyOS, and ZigBee . . . . . . . . . . . 17:1--17:??
P. Unnikrishnan and
G. Chen and
M. Kandemir and
M. Karakoy and
I. Kolcu Reducing memory requirements of
resource-constrained applications . . . 17:1--17:??
Ning Weng and
Tilman Wolf Analytic modeling of network processors
for parallel workload mapping . . . . . 18:1--18:??
Kuo-Kun Tseng and
Yuan-Cheng Lai and
Ying-Dar Lin and
Tsern-Huei Lee A fast scalable automaton-matching
accelerator for embedded content
processors . . . . . . . . . . . . . . . 19:1--19:??
Mehrdad Reshadi and
Prabhat Mishra and
Nikil Dutt Hybrid-compiled simulation: an efficient
technique for instruction-set
architecture simulation . . . . . . . . 20:1--20:??
Nghi Nguyen and
Angel Dominguez and
Rajeev Barua Memory allocation for embedded systems
with a compile-time-unknown scratch-pad
size . . . . . . . . . . . . . . . . . . 21:1--21:??
Roman Lysecky and
Frank Vahid Design and implementation of a
MicroBlaze-based warp processor . . . . 22:1--22:??
Lan S. Bai and
Lei Yang and
Robert P. Dick MEMMU: Memory expansion for MMU-less
embedded systems . . . . . . . . . . . . 23:1--23:??
Andreas Doblander and
Andreas Zoufal and
Bernhard Rinner A novel software framework for embedded
multiprocessor smart cameras . . . . . . 24:1--24:??
Zhiyuan Li and
Santosh Pande Editorial: Languages, compilers, and
tools for embedded systems . . . . . . . 25:1--25:??
Alastair C. Murray and
Richard V. Bennett and
Björn Franke and
Nigel Topham Code transformation and instruction set
extension . . . . . . . . . . . . . . . 26:1--26:??
Jie Hu and
Feihui Li and
Vijay Degalahal and
Mahmut Kandemir and
N. Vijaykrishnan and
Mary J. Irwin Compiler-assisted soft error detection
under performance and energy constraints
in embedded systems . . . . . . . . . . 27:1--27:??
Roozbeh Jafari and
Hassan Ghasemzadeh and
Foad Dabiri and
Ani Nahapetian and
Majid Sarrafzadeh An efficient placement and routing
technique for fault-tolerant distributed
embedded computing . . . . . . . . . . . 28:1--28:??
Edward A. Lee and
Xiaojun Liu and
Stephen Neuendorffer Classes and inheritance in
actor-oriented design . . . . . . . . . 29:1--29:??
Elvinia Riccobene and
Patrizia Scandurra and
Sara Bocchio and
Alberto Rosti and
Luigi Lavazza and
Luigi Mantellini SystemC/C-based model-driven design for
embedded systems . . . . . . . . . . . . 30:1--30:??
Enrico Bini and
Giorgio Buttazzo and
Giuseppe Lipari Minimizing CPU energy in real-time
systems with discrete speed management 31:1--31:??
Heon-Mo Koo and
Prabhat Mishra Functional test generation using design
and property decomposition techniques 32:1--32:??
Toomas P. Plaks and
Neil Bergmann and
Bernard Pottier Guest editorial CAPA'08 configurable
computing: Configuring algorithms,
processes, and architecture issue I:
Configuring algorithms and processes . . 1:1--1:??
B. H. Ferri and
A. A. Ferri Reconfiguration of IIR filters in
response to computer resource
availability . . . . . . . . . . . . . . 2:1--2:??
Xiaojun Wang and
Miriam Leeser A truly two-dimensional systolic array
FPGA implementation of QR decomposition 3:1--3:??
Amilcar Do Carmo Lucas and
Henning Sahlbach and
Sean Whitty and
Sven Heithecker and
Rolf Ernst Application development with the
FlexWAFE real-time stream processing
architecture for FPGAs . . . . . . . . . 4:1--4:??
Ani Nahapetian and
Philip Brisk and
Soheil Ghiasi and
Majid Sarrafzadeh An approximation algorithm for
scheduling on heterogeneous
reconfigurable resources . . . . . . . . 5:1--5:??
C. Patterson and
P. Athanas and
M. Shelburne and
J. Bowen and
J. Surís and
T. Dunham and
J. Rice Slotless module-based reconfiguration of
embedded FPGAs . . . . . . . . . . . . . 6:1--6:??
Scott Lloyd and
Quinn Snell A packet-switched network architecture
for reconfigurable computing . . . . . . 7:1--7:??
Enno Lübbers and
Marco Platzner ReconOS: Multithreaded programming for
reconfigurable computers . . . . . . . . 8:1--8:??
Jian Huang and
Matthew Parris and
Jooheung Lee and
Ronald F. Demara Scalable FPGA-based architecture for DCT
computation using dynamic partial
reconfiguration . . . . . . . . . . . . 9:1--9:??
Toomas P. Plaks and
Neil Bergmann and
Bernard Pottier Guest editorial CAPA'08 Configurable
computing: Configuring algorithms,
processes, and architecture Issue II:
Configuring hardware architecture . . . 10:1--10:??
Mythri Alle and
Keshavan Varadarajan and
Alexander Fell and
Ramesh Reddy C. and
Nimmy Joseph and
Saptarsi Das and
Prasenjit Biswas and
Jugantor Chetia and
Adarsh Rao and
S. K. Nandy and
Ranjani Narayan REDEFINE: Runtime reconfigurable
polymorphic ASIC . . . . . . . . . . . . 11:1--11:??
Pritha Banerjee and
Susmita Sur-Kolay and
Arijit Bishnu and
Sandip Das and
Subhas C. Nandy and
Subhasis Bhattacharjee FPGA placement using space-filling
curves: Theory meets practice . . . . . 12:1--12:??
Paul Beckett Power scalability in a mesh-connected
reconfigurable architecture . . . . . . 13:1--13:??
Weisheng Zhao and
Eric Belhaire and
Claude Chappert and
Pascale Mazoyer Spin transfer torque (STT)-MRAM--based
runtime reconfiguration FPGA circuit . . 14:1--14:??
Hyung Sun Lee and
Byung Kook Kim Coscheduling of processor voltage and
control task period for energy-efficient
control systems . . . . . . . . . . . . 15:1--15:??
Rakesh Reddy and
Peter Petrov Cache partitioning for energy-efficient
and interference-free embedded
multitasking . . . . . . . . . . . . . . 16:1--16:??
Bert Geelen and
Vissarion Ferentinos and
Francky Catthoor and
Gauthier Lafruit and
Diederik Verkest and
Rudy Lauwereins and
Thanos Stouraitis Modeling and exploiting spatial locality
trade-offs in wavelet-based applications
under varying resource requirements . . 17:1--17:??
David Bueno and
Chris Conger and
Alan D. George Optimizing rapidIO architectures for
onboard processing . . . . . . . . . . . 18:1--18:??
Hiroaki Inoue and
Junji Sakai and
Masato Edahiro A robust seamless communication
architecture for next-generation mobile
terminals on multi-CPU SoCs . . . . . . 19:1--19:??
Adam Manzanares and
Xiaojun Ruan and
Shu Yin and
Xiao Qin and
Adam Roth and
Mais Najim Conserving energy in real-time storage
systems with I/O burstiness . . . . . . 20:1--20:??
Alexandre Courbot and
Gilles Grimaud and
Jean-Jacques Vandewalle Efficient off-board deployment and
customization of virtual machine-based
embedded systems . . . . . . . . . . . . 21:1--21:??
Chun Jason Xue and
Jingtong Hu and
Zili Shao and
Edwin Sha Iterational retiming with partitioning:
Loop scheduling with complete memory
latency hiding . . . . . . . . . . . . . 22:1--22:??
Hyeonjoong Cho and
Binoy Ravindran and
E. Douglas Jensen Lock-free synchronization for dynamic
embedded real-time systems . . . . . . . 23:1--23:??
Enric Musoll A cost-effective load-balancing policy
for tile-based, massive multi-core
packet processors . . . . . . . . . . . 24:1--24:??
Liang Guang and
Ethiopia Nigussie and
Pekka Rantala and
Jouni Isoaho and
Hannu Tenhunen Hierarchical agent monitoring design
approach towards self-aware parallel
systems-on-chip . . . . . . . . . . . . 25:1--25:??
Ian Vince McLoughlin and
Timo Rolf Bretschneider Reliability through redundant
parallelism for micro-satellite
computing . . . . . . . . . . . . . . . 26:1--26:??
Lei Yang and
Robert P. Dick and
Haris Lekatsas and
Srimat Chakradhar Online memory compression for embedded
systems . . . . . . . . . . . . . . . . 27:1--27:??
Ulpian Cesana and
Zhen He Multi-buffer manager: Energy-efficient
buffer manager for databases on flash
memory . . . . . . . . . . . . . . . . . 28:1--28:??
Milan Tichy and
Jan Schier and
David Gregg GSFAP adaptive filtering using log
arithmetic for resource-constrained
embedded systems . . . . . . . . . . . . 29:1--29:??
Lei Yang and
Robert P. Dick and
Haris Lekatsas and
Srimat Chakradhar High-performance operating system
controlled online memory compression . . 30:1--30:??
Chin-Hsien Wu A self-adjusting flash translation layer
for resource-limited embedded systems 31:1--31:??
Ali Irturk and
Bridget Benson and
Shahnam Mirzaei and
Ryan Kastner GUSTO: an automatic generation and
optimization tool for matrix inversion
architectures . . . . . . . . . . . . . 32:1--32:??
Yue Yu and
Shangping Ren and
Ophir Frieder Feasibility of semiring-based timing
constraints . . . . . . . . . . . . . . 33:1--33:??
Seyed-Abdoreza Tahaee and
Amir Hossein Jahangir A polynomial algorithm for partitioning
problems . . . . . . . . . . . . . . . . 34:1--34:??
Huan-Kai Peng and
Youn-Long Lin An optimal warning-zone-length
assignment algorithm for real-time and
multiple-QoS on-chip bus arbitration . . 35:1--35:??
Bastian Schlich Model checking of software for
microcontrollers . . . . . . . . . . . . 36:1--36:??
Nicola Bombieri and
Franco Fummi and
Davide Quaglia System/network design-space exploration
based on TLM for networked embedded
systems . . . . . . . . . . . . . . . . 37:1--37:??
Chang Hong Lin and
Marilyn Wolf and
Xenefon Koutsoukos and
Sandeep Neema and
Janos Sztipanovits System and software architectures of
distributed smart cameras . . . . . . . 38:1--38:??
Gang Zhou and
Yafeng Wu and
Ting Yan and
Tian He and
Chengdu Huang and
John A. Stankovic and
Tarek F. Abdelzaher A multifrequency MAC specially designed
for wireless sensor network applications 39:1--39:??
Dawoon Jung and
Jeong-Uk Kang and
Heeseung Jo and
Jin-Soo Kim and
Joonwon Lee Superblock FTL: a superblock-based Flash
Translation Layer with a hybrid address
translation scheme . . . . . . . . . . . 40:1--40:??
Kevin Klues and
Guoliang Xing and
Chenyang Lu Link layer driver architecture for
unified radio power management in
wireless sensor networks . . . . . . . . 41:1--41:??
Jupyung Lee and
Kyu Ho Park Interrupt handler migration and direct
interrupt scheduling for rapid
scheduling of interrupt-driven tasks . . 42:1--42:??
Chiu C. Tan and
Bo Sheng and
Haodong Wang and
Qun Li Microsearch: a search engine for
embedded devices used in pervasive
computing . . . . . . . . . . . . . . . 43:1--43:??
M. Teresa Higuera-Toledano and
Doug Locke and
Angelo Corsaro Introduction to special issue on Java
technologies for real-time and embedded
systems . . . . . . . . . . . . . . . . 1:1--1:??
Osmar Marchi Dos Santos and
Andy Wellings Measuring and policing blocking times in
real-time systems . . . . . . . . . . . 2:1--2:??
Alexandros Zerzelidis and
Andy Wellings A framework for flexible scheduling in
the RTSJ . . . . . . . . . . . . . . . . 3:1--3:??
Jesper Honig Spring and
Filip Pizlo and
Jean Privat and
Rachid Guerraoui and
Jan Vitek Reflexes: Abstractions for integrating
highly responsive tasks into Java
applications . . . . . . . . . . . . . . 4:1--4:??
Minseong Kim and
Andy Wellings Efficient asynchronous event handling in
the real-time specification for Java . . 5:1--5:??
Martin Schoeberl and
Wolfgang Puffitsch Nonblocking real-time garbage collection 6:1--6:??
Pablo Basanta-Val and
Marisol García-Valls and
Iria Estévez-Ayres No-Heap Remote Objects for distributed
real-time Java . . . . . . . . . . . . . 7:1--7:??
Edward Curley and
Binoy Ravindran and
Jonathan Anderson and
E. Douglas Jensen Recovering from distributable thread
failures in distributed real-time Java 8:1--8:??
Christof Pitter and
Martin Schoeberl A real-time Java chip-multiprocessor . . 9:1--9:??
William Kaiser and
Majid Sarrafzadeh Introduction to special issue on
wireless health . . . . . . . . . . . . 10:1--10:??
Jeonggil Ko and
Jong Hyun Lim and
Yin Chen and
Rvãzvan Musvaloiu-E and
Andreas Terzis and
Gerald M. Masson and
Tia Gao and
Walt Destler and
Leo Selavo and
Richard P. Dutton MEDiSN: Medical emergency detection in
sensor networks . . . . . . . . . . . . 11:1--11:??
Antonio Coronato and
Giuseppe De Pietro Formal specification of wireless and
pervasive healthcare applications . . . 12:1--12:??
Agustinus Borgy Waluyo and
Wee-Soon Yeoh and
Isaac Pek and
Yihan Yong and
Xiang Chen MobiSense: Mobile body sensor network
for ambulatory monitoring . . . . . . . 13:1--13:??
Muhannad Quwaider and
Jayanthi Rao and
Subir Biswas Transmission power assignment with
postural position inference for on-body
wireless communication links . . . . . . 14:1--14:??
Twan Basten and
Rolf Ernst Editorial: Model-driven embedded-system
design . . . . . . . . . . . . . . . . . 15:1--15:??
Marc Geilen Synchronous dataflow scenarios . . . . . 16:1--16:??
Maarten H. Wiggers and
Marco J. G. Bekooij and
Gerard J. M. Smit Buffer capacity computation for
throughput-constrained modal task graphs 17:1--17:??
Joachim Falk and
Christian Zebelein and
Joachim Keinert and
Christian Haubelt and
Juergen Teich and
Shuvra S. Bhattacharyya Analysis of SystemC actor networks for
efficient synthesis . . . . . . . . . . 18:1--18:??
Niloofar Razavi and
Razieh Behjati and
Hamideh Sabouri and
Ehsan Khamespanah and
Amin Shali and
Marjan Sirjani Sysfier: Actor-based formal verification
of SystemC . . . . . . . . . . . . . . . 19:1--19:??
Rasmus Adler and
Ina Schaefer and
Mario Trapp and
Arnd Poetzsch-Heffter Component-based modeling and
verification of dynamic adaptation in
safety-critical embedded systems . . . . 20:1--20:??
Cormac Driver and
Sean Reilly and
Éamonn Linehan and
Vinny Cahill and
Siobhán Clarke Managing embedded systems complexity
with aspect-oriented model-driven
engineering . . . . . . . . . . . . . . 21:1--21:??
Simon Schliecker and
Rolf Ernst Real-time performance analysis of
multiprocessor systems with shared
memory . . . . . . . . . . . . . . . . . 22:1--22:??
Euiseong Seo and
Sangwon Kim and
Seonyeong Park and
Joonwon Lee Dynamic alteration schemes of real-time
schedules for I/O device energy
efficiency . . . . . . . . . . . . . . . 23:1--23:??
Gianpiero Cabodi and
Marco Murciano and
Massimo Violante Boosting software fault injection for
dependability analysis of real-time
embedded applications . . . . . . . . . 24:1--24:??
Sibin Mohan and
Frank Mueller and
Michael Root and
William Hawkins and
Christopher Healy and
David Whalley and
Emilio Vivancos Parametric timing analysis and its
application to dynamic voltage scaling 25:1--25:??
Dakai Zhu Reliability-aware dynamic energy
management in dependable embedded
real-time systems . . . . . . . . . . . 26:1--26:??
Harini Ramaprasad and
Frank Mueller Tightening the bounds on feasible
preemptions . . . . . . . . . . . . . . 27:1--27:??
Lian Li and
Jingling Xue and
Jens Knoop Scratchpad memory allocation for data
aggregates via interval coloring in
superperfect graphs . . . . . . . . . . 28:1--28:??
Montek Singh and
Steven M. Nowick Call for papers: Deadline: March 15,
2011 . . . . . . . . . . . . . . . . . . 29:1--29:??
Richard West and
Gabriel Parmer Application-specific service
technologies for commodity operating
systems in real-time environments . . . 30:1--30:??
Xue Liu and
Tarek Abdelzaher Nonutilization bounds and feasible
regions for arbitrary fixed-priority
policies . . . . . . . . . . . . . . . . 31:1--31:??
Ajay Nair and
Karthik Shankar and
Roman Lysecky Efficient hardware-based nonintrusive
dynamic application profiling . . . . . 32:1--32:??
Najwa Aaraj and
Anand Raghunathan and
Niraj K. Jha A framework for defending embedded
systems against software attacks . . . . 33:1--33:??
Jasper Berendsen and
Biniam Gebremichael and
Frits W. Vaandrager and
Miaomiao Zhang Formal specification and analysis of
Zeroconf using Uppaal . . . . . . . . . 34:1--34:32
Ch. Ykman-Couvreur and
V. Nollet and
F. Catthoor and
H. Corporaal Fast multidimension multichoice knapsack
heuristic for MP-SoC runtime management 35:1--35:??
Roshan G. Ragel and
Sri Parameswaran A hybrid hardware--software technique to
improve reliability in embedded
processors . . . . . . . . . . . . . . . 36:1--36:??
Johnny Huynh and
José Nelson Amaral and
Paul Berube and
Sid-Ahmed-Ali Touati Evaluating address register assignment
and offset assignment algorithms . . . . 37:1--37:??
Jean-Philippe Diguet and
Yvan Eustache and
Guy Gogniat Closed-loop--based self-adaptive
Hardware/Software-Embedded systems:
Design methodology and smart CAM case
study . . . . . . . . . . . . . . . . . 38:1--38:??
Abdoulaye Gamatié and
Sébastien Le Beux and
Éric Piel and
Rabie Ben Atitallah and
Anne Etien and
Philippe Marquet and
Jean-Luc Dekeyser A Model-Driven Design Framework for
Massively Parallel Embedded Systems . . 39:1--39:??
Seungkyun Kim and
Kiwon Kwon and
Chihun Kim and
Choonki Jang and
Jaejin Lee and
Sang Lyul Min Demand Paging Techniques for Flash
Memory Using Compiler Post-Pass
Optimizations . . . . . . . . . . . . . 40:1--40:??
Gianluca Dini and
Ida M. Savino LARK: a Lightweight Authenticated
ReKeying Scheme for Clustered Wireless
Sensor Networks . . . . . . . . . . . . 41:1--41:??
Martin Schoeberl and
Stephan Korsholm and
Tomas Kalibera and
Anders P. Ravn A Hardware Abstraction Layer in Java . . 42:1--42:??
Michael Gilroy and
James Irvine and
Robert Atkinson RAID 6 Hardware Acceleration . . . . . . 43:1--43:??
Xiaotong Zhuang and
Santosh Pande Compiler-Supported Thread Management for
Multithreaded Network Processors . . . . 44:1--44:??
Matthias Bo Stuart and
Mikkel Bystrup Stensgaard and
Jens Sparsò The ReNoC Reconfigurable
Network-on-Chip: Architecture,
Configuration Algorithms, and Evaluation 45:1--45:??
Tommaso Cucinotta and
Luca Abeni and
Luigi Palopoli and
Giuseppe Lipari A Robust Mechanism for Adaptive
Scheduling of Multimedia Applications 46:1--46:??
Sid-Ahmed-Ali Touati and
Frederic Brault and
Karine Deschinkel and
Beno\^\it Dupont de Dinechin Efficient Spilling Reduction for
Software Pipelined Loops in Presence of
Multiple Register Types in Embedded VLIW
Processors . . . . . . . . . . . . . . . 47:1--47:??
Gang Zhou and
Qiang Li and
Jingyuan Li and
Yafeng Wu and
Shan Lin and
Jian Lu and
Chieh-Yih Wan and
Mark D. Yarvis and
John A. Stankovic Adaptive and Radio-Agnostic QoS for Body
Sensor Networks . . . . . . . . . . . . 48:1--48:??
Ernesto Wandeler and
Alexander Maxiaguine and
Lothar Thiele On the use of greedy shapers in
real-time embedded systems . . . . . . . 1:1--1:??
Juan Hamers and
Lieven Eeckhout Exploiting media stream similarity for
energy-efficient decoding and resource
prediction . . . . . . . . . . . . . . . 2:1--2:??
Ziguo Zhong and
Tian He Wireless sensor node localization by
multisequence processing . . . . . . . . 3:1--3:??
Chunyi Peng and
Guobin Shen and
Yongguang Zhang BeepBeep: a high-accuracy acoustic-based
system for ranging and localization
using COTS devices . . . . . . . . . . . 4:1--4:??
T. S. Rajesh Kumar and
R. Govindarajan and
C. P. Ravikumar On-chip memory architecture exploration
framework for DSP processor-based
embedded system on chip . . . . . . . . 5:1--5:??
Amit Pande and
Joseph Zambreno Poly-DWT: Polymorphic wavelet hardware
support for dynamic image compression 6:1--6:??
Suk-Hyun Seo and
Jin-Ho Kim and
Sung-Ho Hwang and
Key Ho Kwon and
Jae Wook Jeon A reliable gateway for in-vehicle
networks based on LIN, CAN, and FlexRay 7:1--7:??
Kai Huang and
Wolfgang Haid and
Iuliana Bacivarov and
Matthias Keller and
Lothar Thiele Embedding formal performance analysis
into the design cycle of MPSoCs for
real-time streaming applications . . . . 8:1--8:??
Yuan-Hao Chang and
Po-Liang Wu and
Tei-Wei Kuo and
Shih-Hao Hung An adaptive file-system-oriented FTL
mechanism for flash-memory storage
systems . . . . . . . . . . . . . . . . 9:1--9:??
Chunxiao Li and
Niraj K. Jha and
Anand Raghunathan Secure reconfiguration of
software-defined radio . . . . . . . . . 10:1--10:??
Mladen Berekovic and
Samarjit Chakraborty and
Petru Eles and
Andy D. Pimentel Introduction to the Special Section on
ESTIMedia'08 . . . . . . . . . . . . . . 11:1--11:??
Jun Zhu and
Ingo Sander and
Axel Jantsch Performance Analysis of Reconfigurations
in Adaptive Real-Time Streaming
Applications . . . . . . . . . . . . . . 12:1--12:??
Kun-Yuan Hsieh and
Chi-Hua Lai and
Shang-Hong Lai and
Jenq Kuen Lee Parallelization of Belief Propagation on
Cell Processors for Stereo Vision . . . 13:1--13:??
Andrei Terechko and
Jan Hoogerbrugge and
Ghiath Alkadi and
Surendra Guntur and
Anirban Lahiri and
Marc Duranton and
Clemens Wüst and
Phillip Christie and
Axel Nackaerts and
Aatish Kumar Balancing Programmability and Silicon
Efficiency of Heterogeneous Multicore
Architectures . . . . . . . . . . . . . 14:1--14:??
Amin Khajeh and
Minyoung Kim and
Nikil Dutt and
Ahmed M. Eltawil and
Fadi J. Kurdahi Error-Aware Algorithm/Architecture
Coexploration for Video Over Wireless
Applications . . . . . . . . . . . . . . 15:1--15:??
Hassan Salamy and
J. Ramanujam Storage Optimization through Offset
Assignment with Variable Coalescing . . 16:1--16:??
Heiko Falk and
Peter Marwedel Introduction to the Special Section on
SCOPES'09 . . . . . . . . . . . . . . . 17:1--17:??
Jaegeuk Kim and
Hyotaek Shim and
Seon-Yeong Park and
Seungryoul Maeng and
Jin-Soo Kim FlashLight: a Lightweight Flash File
System for Embedded Systems . . . . . . 18:1--18:??
Mattias Eriksson and
Christoph Kessler Integrated Code Generation for Loops . . 19:1--19:??
Alastair Murray and
Björn Franke Adaptive Source-Level Data Assignment to
Dual Memory Banks . . . . . . . . . . . 20:1--20:??
Benoit Boissinot and
Philip Brisk and
Alain Darte and
Fabrice Rastello SSI Properties Revisited . . . . . . . . 21:1--21:??
Björn Franke Statistical Performance Modeling in
Functional Instruction Set Simulators 22:1--22:??
Pramod Chandraiah and
Rainer Dömer Computer-Aided Recoding to Create
Structured and Analyzable System Models 23:1--23:??
Christophe Dubach and
Timothy M. Jones and
Michael F. P. O'Boyle Exploring and Predicting the Effects of
Microarchitectural Parameters and
Compiler Optimizations on Performance
and Energy . . . . . . . . . . . . . . . 24:1--24:??
TECS Staff Abstracts of Papers to appear in Special
Supplemental Issue of TECS (v11,
iSupplemental1) . . . . . . . . . . . . 25:1--25:??
Jongeun Lee and
Aviral Shrivastava PICA: Processor Idle Cycle Aggregation
for Energy-Efficient Embedded Systems 26:1--26:??
Dustin McIntire and
Thanos Stathopoulos and
Sasank Reddy and
Thomas Schmidt and
William J. Kaiser Energy-Efficient Sensing with the Low
Power, Energy Aware Processing (LEAP)
Architecture . . . . . . . . . . . . . . 27:1--27:??
Weixun Wang and
Prabhat Mishra and
Ann Gordon-Ross Dynamic Cache Reconfiguration for Soft
Real-Time Systems . . . . . . . . . . . 28:1--28:??
Gianluca Palermo and
Cristina Silvano and
Vittorio Zaccaria A Variability-Aware Robust Design Space
Exploration Methodology for On-Chip
Multiprocessors Subject to
Application-Specific Constraints . . . . 29:1--29:??
Yoon Seok Yang and
Gwan Choi Unequal Error Protection Based on DVFS
for JSCD in Low-Power Portable
Multimedia Systems . . . . . . . . . . . 30:1--30:??
Ashkan Hosseinzadeh Namin and
Huapeng Wu and
Majid Ahmadi An Efficient Finite Field Multiplier
Using Redundant Representation . . . . . 31:1--31:??
Luis E. Leyva-del-Foyo and
Pedro Mejia-Alvarez and
Dionisio de Niz Integrated Task and Interrupt Management
for Real-Time Systems . . . . . . . . . 32:1--32:??
Siddharth Garg and
Diana Marculescu On the Impact of Manufacturing Process
Variations on the Lifetime of Sensor
Networks . . . . . . . . . . . . . . . . 33:1--33:??
Jan Olaf Blech and
Michaël Périn Generating Invariant-Based Certificates
for Embedded Systems . . . . . . . . . . 34:1--34:??
Jaein Jeong and
David Culler Predicting the Long-Term Behavior of a
Micro-Solar Power System . . . . . . . . 35:1--35:??
Melissa C. Smith and
Gregory D. Peterson Optimization of Shared High-Performance
Reconfigurable Computing Resources . . . 36:1--36:??
Kyoungwoo Lee and
Nikil Dutt and
Nalini Venkatasubramanian EAVE: Error-Aware Video Encoding
Supporting Extended Energy/QoS
Trade-offs for Mobile Embedded Systems 37:1--37:??
Mingsong Chen and
Prabhat Mishra and
Dhrubajyoti Kalita Automatic RTL Test Generation from
SystemC TLM Specifications . . . . . . . 38:1--38:??
Toomas P. Plaks Editorial: Special Section on CAPA'09 39:1--39:??
Anand Paul and
Yung-Chuan Jiang and
Jhing-Fa Wang and
Jar-Ferr Yang Parallel Reconfigurable Computing-Based
Mapping Algorithm for Motion Estimation
in Advanced Video Coding . . . . . . . . 40:1--40:??
Jorge A. Surís and
Adolfo Recio and
Peter Athanas RapidRadio: Signal Classification and
Radio Deployment Framework . . . . . . . 41:1--41:??
Cindy Mark and
Scott Y. L. Chin and
Lesley Shannon and
Steven J. E. Wilton Hierarchical Benchmark Circuit
Generation for FPGA Architecture
Evaluation . . . . . . . . . . . . . . . 42:1--42:??
Casey Reardon and
Brian Holland and
Alan D. George and
Greg Stitt and
Herman Lam RCML: An Environment for Estimation
Modeling of Reconfigurable Computing
Systems . . . . . . . . . . . . . . . . 43:1--43:??
Andrea Di Biagio and
Giovanni Agosta and
Martino Sykora and
Cristina Silvano Architecture Optimization of
Application-Specific Implicit
Instructions . . . . . . . . . . . . . . 44:1--44:??
Ani Napapetian and
William Kaiser and
Majid Sarrafzadeh Editorial: Special Section on WHS'09 . . 45:1--45:??
Eric Guenterberg and
Hassan Ghasemzadeh and
Roozbeh Jafari Automatic Segmentation and Recognition
in Body Sensor Networks Using a Hidden
Markov Model . . . . . . . . . . . . . . 46:1--46:??
Gaurav N. Pradhan and
B. Prabhakaran Analyzing and Visualizing Jump
Performance Using Wireless Body Sensors 47:1--47:??
Gautam Thatte and
Ming Li and
Sangwon Lee and
Adar Emken and
Shrikanth Narayanan and
Urbashi Mitra and
Donna Spruijt-Metz and
Murali Annavaram KNOWME: An Energy-Efficient Multimodal
Body Area Network for Physical Activity
Monitoring . . . . . . . . . . . . . . . 48:1--48:??
Ayan Banerjee and
Sailesh Kandula and
Tridib Mukherjee and
Sandeep K. S. Gupta BAND-AiDe: a Tool for Cyber-Physical
Oriented Analysis and Design of Body
Area Networks and Devices . . . . . . . 49:1--49:??
Mark A. Hanson and
Harry C. Powell, Jr. and
Adam T. Barth and
John Lach Application-Focused Energy-Fidelity
Scalability for Wireless Motion-Based
Health Assessment . . . . . . . . . . . 50:1--50:??
Athanassios Boulis and
Yuriy Tselishchev and
Lavy Libman and
David Smith and
Leif Hanlen Impact of Wireless Channel Temporal
Variation on MAC Design for Body Area
Networks . . . . . . . . . . . . . . . . 51:1--51:??
Georgios Fainekos and
Eric Goubault and
Franjo Ivanci\'c and
Sriram Sankaranarayanan Editorial: Special Section VCPSS'09 . . 52:1--52:??
Tichakorn Wongpiromsarn and
Sayan Mitra and
Andrew Lamperski and
Richard M. Murray Verification of Periodically Controlled
Hybrid Systems: Application to an
Autonomous Vehicle . . . . . . . . . . . 53:1--53:??
Antoine Girard and
Gang Zheng Verification of Safety and Liveness
Properties of Metric Transition Systems 54:1--54:??
Sanjit A. Seshia and
Alexander Rakhlin Quantitative Analysis of Systems Using
Game-Theoretic Learning . . . . . . . . 55:1--55:??
Lan Wu and
Wei Zhang A Model Checking Based Approach to
Bounding Worst-Case Execution Time for
Multicore Processors . . . . . . . . . . 56:1--56:??
Qinghui Tang and
Sandeep K. S. Gupta and
Georgios Varsamopoulos A Unified Methodology for Scheduling in
Distributed Cyber-Physical Systems . . . 57:1--57:??
Truong Nghiem and
George J. Pappas and
Rajeev Alur and
Antoine Girard Time-Triggered Implementations of
Dynamic Controllers . . . . . . . . . . 58:1--58:??
Qi Dong and
Donggang Liu Using Auxiliary Sensors for Pairwise Key
Establishment in WSN . . . . . . . . . . 59:1--59:??
Divya Arora and
Najwa Aaraj and
Anand Raghunathan and
Niraj K. Jha INVISIOS: a Lightweight, Minimally
Intrusive Secure Execution Environment 60:1--60:??
Viacheslav Izosimov and
Paul Pop and
Petru Eles and
Zebo Peng Scheduling and Optimization of
Fault-Tolerant Embedded Systems with
Transparency/Performance Trade-Offs . . 61:1--61:??
Shengqi Yang and
Pallav Gupta and
Marilyn Wolf and
Dimitrios Serpanos and
Vijaykrishnan Narayanan and
Yuan Xie Power Analysis Attack Resistance
Engineering by Dynamic Voltage and
Frequency Scaling . . . . . . . . . . . 62:1--62:??
Hesham Shokry and
Hatem M. El-Boghdadi On Heuristic Solutions to the Simple
Offset Assignment Problem in
Address-Code Optimization . . . . . . . 63:1--63:??
Bruno Girodias and
Luiza Gheorghe Iugan and
Youcef Bouchebaba and
Gabriela Nicolescu and
El Mostapha Abouhamid and
Michel Langevin and
Pierre Paulin Integrating Memory Optimization with
Mapping Algorithms for Multi-Processors
System-on-Chip . . . . . . . . . . . . . 64:1--64:??
Ziguo Zhong and
Tian He Sensor Node Localization with
Uncontrolled Events . . . . . . . . . . 65:1--65:??
Karthik Kumar and
Yamini Nimmagadda and
Yung-Hsiang Lu Energy Conservation for Image Retrieval
on Mobile Systems . . . . . . . . . . . 66:1--66:??
Jaehwan John Lee and
Xiang Xiao Instant Multiunit Resource Hardware
Deadlock Detection Scheme for
System-on-Chips . . . . . . . . . . . . 67:1--67:??
Piero Zappi and
Daniel Roggen and
Elisabetta Farella and
Gerhard Tröster and
Luca Benini Network-Level Power-Performance
Trade-Off in Wearable Activity
Recognition: a Dynamic Sensor Selection
Approach . . . . . . . . . . . . . . . . 68:1--68:??
Jude A. Ambrose and
Roshan G. Ragel and
Sri Parameswaran Randomized Instruction Injection to
Counter Power Analysis Attacks . . . . . 69:1--69:??
Andy D. Pimentel and
Naehyuck Chang and
Mladen Berekovic Introduction to special section
ESTIMedia'09 . . . . . . . . . . . . . . 70:1--70:??
Francesco Paterna and
Andrea Acquaviva and
Francesco Papariello and
Giuseppe Desoli and
Luca Benini Variability-tolerant workload allocation
for MPSoC energy minimization under
real-time constraints . . . . . . . . . 71:1--71:??
Hiroshi Tsutsui and
Koichi Hattori and
Hiroyuki Ochi and
Yukihiro Nakamura A high-throughput pipelined parallel
architecture for JPEG XR encoding . . . 72:1--72:??
Minyoung Kim and
Mark-Oliver Stehr and
Carolyn Talcott and
Nikil Dutt and
Nalini Venkatasubramanian xTune: a formal methodology for
cross-layer tuning of mobile embedded
systems . . . . . . . . . . . . . . . . 73:1--73:??
Robert Dick and
Li Shang and
Nikil Dutt Introduction to special section SCPS'09 74:1--74:??
Xenofon Koutsoukos and
Nicholas Kottenstette and
Joseph Hall and
Emeka Eyisi and
Heath Leblanc and
Joseph Porter and
Janos Sztipanovits A passivity approach for model-based
compositional design of networked
control systems . . . . . . . . . . . . 75:1--75:??
Donghwa Shin and
Jaehyun Park and
Younghyun Kim and
Jaeam Seo and
Naehyuck Chang Control-theoretic cyber-physical system
modeling and synthesis: a case study of
an active direct methanol fuel cell . . 76:1--76:??
Avinash Malik and
Zoran Salcic and
Christopher Chong and
Salman Javed System-level approach to the design of a
smart distributed surveillance system
using SystemJ . . . . . . . . . . . . . 77:1--77:??
Li Hsien Yoong and
Partha S. Roop and
Zoran Salcic Implementing constrained cyber-physical
systems with IEC 61499 . . . . . . . . . 78:1--78:??
Varun Subramanian and
Michael Gilberti and
Alex Doboli and
Dan Pescaru A goal-oriented programming framework
for grid sensor networks with
reconfigurable embedded nodes . . . . . 79:1--79:??
Rui Tan and
Guoliang Xing and
Xue Liu and
Jianguo Yao and
Zhaohui Yuan Adaptive calibration for fusion-based
cyber-physical systems . . . . . . . . . 80:1--80:??
Min-Young Nam and
Kyungtae Kang and
Rodolfo Pellizzoni and
Kyung-Joon Park and
Jung-Eun Kim and
Lui Sha Modeling towards incremental early
analyzability of networked avionics
systems using virtual integration . . . 81:1--81:??
Miroslav Pajic and
Alexander Chernoguzov and
Rahul Mangharam Robust architectures for embedded
wireless network control and actuation 82:1--82:??
Karthik Lakshmanan and
Dionisio De Niz and
Ragunathan (Raj) Rajkumar and
Gabriel Moreno Overload provisioning in
mixed-criticality cyber-physical systems 83:1--83:??
Matthias Woehrle and
Kai Lampka and
Lothar Thiele Conformance testing for cyber-physical
systems . . . . . . . . . . . . . . . . 84:1--84:??
Qi Zhu and
Haibo Zeng and
Wei Zheng and
Marco Di Natale and
Alberto Sangiovanni-Vincentelli Optimization of task allocation and
priority assignment in hard real-time
distributed systems . . . . . . . . . . 85:1--85:??
Tommaso Cucinotta and
Fabio Checconi and
Luca Abeni and
Luigi Palopoli Adaptive real-time scheduling for legacy
multimedia applications . . . . . . . . 86:1--86:??
Christian Scharfenberger and
Samarajiit Chakraborty and
Georg Färber Robust image processing for an
omnidirectional camera-based smart car
door . . . . . . . . . . . . . . . . . . 87:1--87:??
Ann Gordon-Ross and
Frank Vahid and
Nikil Dutt Combining code reordering and cache
configuration . . . . . . . . . . . . . 88:1--88:??
José A. Baiocchi and
Bruce R. Childers and
Jack W. Davidson and
Jason D. Hiser Enabling dynamic binary translation in
embedded systems with scratchpad memory 89:1--89:??
Mohamed Khalgui and
Zhiwu Li Introduction to the Special Issue on
Modeling and Verification of Discrete
Event Systems . . . . . . . . . . . . . 1:1--1:??
Shouguang Wang and
Chengying Wang and
Yanping Yu Design of Liveness-Enforcing Supervisors
for S3PR Based on Complementary Places 2:1--2:??
Yufeng Chen and
Gaiyun Liu Computation of Minimal Siphons in Petri
Nets by Using Binary Decision Diagrams 3:1--3:??
Zhijun Ding and
Changjun Jiang and
Mengchu Zhou Design, Analysis and Verification of
Real-Time Systems Based on Time Petri
Net Refinement . . . . . . . . . . . . . 4:1--4:??
Allan I. McInnes Modeling and Analysis of TinyOS Sensor
Node Firmware: a CSP Approach . . . . . 5:1--5:??
Karen Godary-Dejean and
David Andreu Formal Validation of a Deterministic MAC
Protocol . . . . . . . . . . . . . . . . 6:1--6:??
Hanifa Boucheneb and
Kamel Barkaoui Reducing Interleaving Semantics
Redundancy in Reachability Analysis of
Time Petri Nets . . . . . . . . . . . . 7:1--7:??
Zhiming Zhang and
Weimin Wu Sequence Control of Essential Siphons
for Deadlock Prevention in Petri Nets 8:1--8:??
Zakir Hussain Ahmed A Hybrid Genetic Algorithm for the
Bottleneck Traveling Salesman Problem 9:1--9:??
Naiqi Wu and
Mengchu Zhou and
Gang Hu One-Step Look-Ahead Maximally Permissive
Deadlock Control of AMS by Using Petri
Nets . . . . . . . . . . . . . . . . . . 10:1--10:??
Yi-Sheng Huang and
Yen-Liang Pan and
Pin-June Su Transition-Based Deadlock Detection and
Recovery Policy for FMSs Using Graph
Technique . . . . . . . . . . . . . . . 11:1--11:??
Payam Nazemzadeh and
Abbas Dideban and
Meisam Zareiee Fault Modeling in Discrete Event Systems
Using Petri Nets . . . . . . . . . . . . 12:1--12:??
Tarek Mhamdi and
Osman Hasan and
Sofi\`ene Tahar Formalization of Measure Theory and
Lebesgue Integration for Probabilistic
Analysis in HOL . . . . . . . . . . . . 13:1--13:??
Mohamed Khalgui and
Olfa Mosbahi and
Zhiwu Li Runtime Reconfigurations of Embedded
Controllers . . . . . . . . . . . . . . 14:1--14:??
Dominique Méry and
Neeraj Kumar Singh Formal Specification of Medical Systems
by Proof-Based Refinement . . . . . . . 15:1--15:??
Olfa Mosbahi Combining Formal Methods for the
Development of Reactive Systems . . . . 16:1--16:??
Christoph Sünder and
Valeriy Vyatkin and
Alois Zoitl Formal Verification of Downtimeless
System Evolution in Embedded Automation
Controllers . . . . . . . . . . . . . . 17:1--17:??
Mohamed Khalgui Distributed Reconfigurations of
Autonomous IEC61499 Systems . . . . . . 18:1--18:??
Jian-Jia Chen and
Maurizio Palesi Introduction to the special section on
ESTIMedia'12 . . . . . . . . . . . . . . 32:1--32:??
Antonis Nikitakis and
Savvas Papaioannou and
Ioannis Papaefstathiou A novel low-power embedded object
recognition system working at
multi-frames per second . . . . . . . . 33:1--33:??
Jiali Teddy Zhai and
Hristo Nikolov and
Todor Stefanov Mapping of streaming applications
considering alternative application
specifications . . . . . . . . . . . . . 34:1--34:??
Stefan J. Geuns and
Joost P. H. M. Hausmans and
Marco J. G. Bekooij Sequential specification of time-aware
stream processing applications . . . . . 35:1--35:??
Daeyoung Lee and
Hyunok Oh A lifetime aware buffer assignment
method for streaming applications on
DRAM/PRAM hybrid memory . . . . . . . . 36:1--36:??
Yi-Fan Chung and
Yin-Tsung Lo and
Chung-Ta King Enhancing user experiences by exploiting
energy and launch delay trade-off of
mobile multimedia applications . . . . . 37:1--37:??
Bjorn De Sutter and
Jan Vitek Introduction to the special section on
LCTES'11 . . . . . . . . . . . . . . . . 38:1--38:??
Nicolas Berthier and
Florence Maraninchi and
Laurent Mounier Synchronous programming of device
drivers for global resource control in
embedded operating systems . . . . . . . 39:1--39:??
Christoph Cullmann Cache persistence analysis: Theory and
practice . . . . . . . . . . . . . . . . 40:1--40:??
Joseph Sifakis and
Lothar Thiele and
Reinhard Wilhelm Introduction to the special section on
rigorous embedded systems design . . . . 41:1--41:??
Jan Reineke and
Daniel Grund Sensitivity of cache replacement
policies . . . . . . . . . . . . . . . . 42:1--42:??
Jinkyu Jeong and
Hwanju Kim and
Jeaho Hwang and
Joonwon Lee and
Seungryoul Maeng Rigorous rental memory management for
embedded systems . . . . . . . . . . . . 43:1--43:??
Vasileios Vasilikos and
Georgios Smaragdos and
Christos Strydis and
Ioannis Sourdis Heuristic search for adaptive,
defect-tolerant multiprocessor arrays 44:1--44:??
Maria-Cristina Marinescu and
César Sánchez Fusing statecharts and Java . . . . . . 45:1--45:??
Michael Hübner Introduction to the special section on
multiprocessor system-on-chip for
cyber-physical systems . . . . . . . . . 46:1--46:??
Pierre G. Paulin and
Ali Erdem Özcan and
Vincent Gagné and
Bruno Lavigueur and
Olivier Benny Parallel programming patterns for
multi-processor SoC: Application to
video processing . . . . . . . . . . . . 47:1--47:??
Lothar Thiele and
Lars Schor and
Iuliana Bacivarov and
Hoeseok Yang Predictability for timing and
temperature in multiprocessor
system-on-chip platforms . . . . . . . . 48:1--48:??
Abhijit Davare and
Douglas Densmore and
Liangpeng Guo and
Roberto Passerone and
Alberto L. Sangiovanni-Vincentelli and
Alena Simalatsar and
Qi Zhu metroII: a design environment for
cyber-physical systems . . . . . . . . . 49:1--49:??
Paul Bogdan and
Siddharth Jain and
Radu Marculescu Pacemaker control of heart rate
variability: a cyber physical system
perspective . . . . . . . . . . . . . . 50:1--50:??
Diana Göhringer and
Lukas Meder and
Oliver Oey and
Jürgen Becker Reliable and adaptive network-on-chip
architectures for cyber physical systems 51:1--51:??
Jongsung Kim and
Javier A. Barria and
Morris Chang and
Victor C. M. Leung Special issue on embedded systems for
interactive multimedia services (ES-IMS) 19:1--19:??
Yeong-Sheng Chen and
Yun-Ju Ting and
Chih-Heng Ke and
Naveen Chilamkruti and
Jong Hyuk Park Efficient localization scheme with ring
overlapping by utilizing mobile anchors
in wireless sensor networks . . . . . . 20:1--20:??
Hung-Min Sun and
Chi-Yao Weng and
Shiuh-Jeng Wang and
Cheng-Hsing Yang Data embedding in image-media using
weight-function on modulo operations . . 21:1--21:??
Sanghyun Seo and
Seungtaek Ryoo and
Kyunghyun Yoon Artistic image generation for emerging
multimedia services by impressionist
manner . . . . . . . . . . . . . . . . . 22:1--22:??
Sang Oh Park and
Sung Jo Kim ENFFiS: an enhanced NAND flash memory
file system for mobile embedded
multimedia system . . . . . . . . . . . 23:1--23:??
Jiayin Li and
Meikang Qiu and
Jian-Wei Niu and
Laurence T. Yang and
Yongxin Zhu and
Zhong Ming Thermal-aware task scheduling in $3$D
chip multiprocessor with real-time
constrained workloads . . . . . . . . . 24:1--24:??
Anand Paul and
Bo-Wei Chen and
Karunanithi Bharanitharan and
Jhing-Fa Wang Video search and indexing with
reinforcement agent for interactive
multimedia services . . . . . . . . . . 25:1--25:??
Yunyoung Nam and
Seungmin Rho and
Chulung Lee Physical activity recognition using
multiple sensors embedded in a wearable
device . . . . . . . . . . . . . . . . . 26:1--26:??
Seung-Ho Lim and
Min Choi and
Young Sik Jeong Data reorganization for scalable video
service with embedded mobile devices . . 27:1--27:??
Hyeong-Ju Kang and
Heesuk Seo and
Jin Kwak Area-efficient convolutional
deinterleaver for mobile TV receiver . . 28:1--28:??
K. Bharanitharan and
Jiun-Ren Ding and
Anand Paul and
Kuen-Ming Lee and
Ting-Wei Hou Dependable management system for
ubiquitous camera array service in an
elder-care center . . . . . . . . . . . 29:1--29:??
Chin-Feng Lai and
Min Chen and
Meikang Qiu and
Athanasios V. Vasilakos and
Jong Hyuk Park A RF4CE-based remote controller with
interactive graphical user interface
applied to home automation system . . . 30:1--30:??
Agustinus Borgy Waluyo and
David Taniar and
Bala Srinivasan and
Wenny Rahayu Mobile query services in a participatory
embedded sensing environment . . . . . . 31:1--31:??
Christoph Kirsch and
Vincent Mooney Introduction to Special Section on
Probabilistic Embedded Computing . . . . 86:1--86:??
Krishna Palem and
Avinash Lingamneni Ten Years of Building Broken Chips: The
Physics and Engineering of Inexact
Computing . . . . . . . . . . . . . . . 87:1--87:??
Sasa Misailovic and
Deokhwan Kim and
Martin Rinard Parallelizing Sequential Programs with
Statistical Accuracy Tests . . . . . . . 88:1--88:??
John Sartori and
Rakesh Kumar Exploiting Timing Error Resilience in
Processor Architecture . . . . . . . . . 89:1--89:??
Vinay K. Chippa and
Kaushik Roy and
Srimat T. Chakradhar and
Anand Raghunathan Managing the Quality vs. Efficiency
Trade-off Using Dynamic Effort Scaling 90:1--90:??
Mastooreh Salajegheh and
Yue Wang and
Anxiao (Andrew) Jiang and
Erik Learned-Miller and
Kevin Fu Half-Wits: Software Techniques for
Low-Voltage Probabilistic Storage on
Microcontrollers with NOR Flash Memory 91:1--91:??
Armin Alaghi and
John P. Hayes Survey of Stochastic Computing . . . . . 92:1--92:??
Avinash Lingamneni and
Christian Enz and
Krishna Palem and
Christian Piguet Synthesizing Parsimonious Inexact
Circuits through Probabilistic Design
Techniques . . . . . . . . . . . . . . . 93:1--93:??
Francisco J. Cazorla and
Eduardo Quiñones and
Tullio Vardanega and
Liliana Cucu and
Benoit Triquet and
Guillem Bernat and
Emery Berger and
Jaume Abella and
Franck Wartel and
Michael Houston and
Luca Santinelli and
Leonidas Kosmidis and
Code Lo and
Dorin Maxim PROARTIS: Probabilistically Analyzable
Real-Time Systems . . . . . . . . . . . 94:1--94:??
Houssam Abbas and
Georgios Fainekos and
Sriram Sankaranarayanan and
Franjo Ivanci\'c and
Aarti Gupta Probabilistic Temporal Logic
Falsification of Cyber-Physical Systems 95:1--95:??
Domenic Forte and
Ankur Srivastava Energy- and Thermal-Aware Video Coding
via Encoder/Decoder Workload Balancing 96:1--96:??
Vladimir Uzelac and
Aleksandar Milenkovi\'c Hardware-Based Load Value Trace
Filtering for On-the-Fly Debugging . . . 97:1--97:??
Fengxiang Zhang and
Alan Burns Schedulability analysis of EDF-scheduled
embedded real-time systems with resource
sharing . . . . . . . . . . . . . . . . 67:1--67:??
Yosi Ben-Asher and
Nadav Rotem Using memory profile analysis for
automatic synthesis of pointers code . . 68:1--68:??
Fumin Zhang and
Zhenwu Shi and
Shayok Mukhopadhyay Robustness analysis for
battery-supported cyber-physical systems 69:1--69:??
Nikolaos S. Voros and
Michael Hübner and
Jürgen Becker and
Matthias Kühnle and
Florian Thomaitiv and
Arnaud Grasset and
Paul Brelet and
Philippe Bonnot and
Fabio Campi and
Eberhard Schüler and
Henning Sahlbach and
Sean Whitty and
Rolf Ernst and
Enrico Billich and
Claudia Tischendorf and
Ulrich Heinkel and
Frank Ieromnimon and
Dimitrios Kritharidis and
Axel Schneider and
Joachim Knaeblein and
Wolfram Putzke-Röming MORPHEUS: a heterogeneous dynamically
reconfigurable platform for designing
highly complex embedded systems . . . . 70:1--70:??
Jérémie Crenne and
Romain Vaslin and
Guy Gogniat and
Jean-Philippe Diguet and
Russell Tessier and
Deepak Unnikrishnan Configurable memory security in embedded
systems . . . . . . . . . . . . . . . . 71:1--71:??
Shaoshan Liu and
Richard Neil Pittman and
Alessandro Forin and
Jean-Luc Gaudiot Achieving energy efficiency through
runtime partial reconfiguration on
reconfigurable systems . . . . . . . . . 72:1--72:??
Qi Dong and
Donggang Liu and
Peng Ning Providing DoS resistance for
signature-based broadcast authentication
in sensor networks . . . . . . . . . . . 73:1--73:??
Joachim Falk and
Christian Zebelein and
Christian Haubelt and
Jürgen Teich A rule-based quasi-static scheduling
approach for static islands in dynamic
dataflow graphs . . . . . . . . . . . . 74:1--74:??
Luciano Ost and
Marcelo Mandelli and
Gabriel Marchesan Almeida and
Leandro Moller and
Leandro Soares Indrusiak and
Gilles Sassatelli and
Pascal Benoit and
Manfred Glesner and
Michel Robert and
Fernando Moraes Power-aware dynamic mapping heuristics
for NoC-based MPSoCs using a unified
model-based approach . . . . . . . . . . 75:1--75:??
Tiantian Liu and
Chun Jason Xue and
Minming Li Joint variable partitioning and bank
selection instruction optimization for
partitioned memory architectures . . . . 76:1--76:??
Jingtong Hu and
Chun Jason Xue and
Qingfeng Zhuge and
Wei-Che Tseng and
Edwin H.-M. Sha Write activity reduction on non-volatile
main memories for embedded chip
multiprocessors . . . . . . . . . . . . 77:1--77:??
Sanjoy Baruah Partitioning sporadic task systems upon
memory-constrained multiprocessors . . . 78:1--78:??
Marco Paolieri and
Jörg Mische and
Stefan Metzlaff and
Mike Gerdes and
Eduardo Quiñones and
Sascha Uhrig and
Theo Ungerer and
Francisco J. Cazorla A hard real-time capable multi-core SMT
processor . . . . . . . . . . . . . . . 79:1--79:??
Jeong-Han Yun and
Chul-Joo Kim and
Seonggun Kim and
Kwang-Moo Choe and
Taisook Han Detection of harmful schizophrenic
statements in Esterel . . . . . . . . . 80:1--80:??
Seungjae Baek and
Jongmoo Choi and
Donghee Lee and
Sam H. Noh Energy-efficient and high-performance
software architecture for storage class
memory . . . . . . . . . . . . . . . . . 81:1--81:??
Dongwon Lee and
Marilyn Wolf and
Shuvra S. Bhattacharyya High-performance and low-energy buffer
mapping method for multiprocessor DSP
systems . . . . . . . . . . . . . . . . 82:1--82:??
Stavros Tripakis and
Dai Bui and
Marc Geilen and
Bert Rodiers and
Edward A. Lee Compositionality in synchronous data
flow: Modular code generation from
hierarchical SDF graphs . . . . . . . . 83:1--83:??
Andrew T. Zimmerman and
Jerome P. Lynch and
Frank T. Ferrese Market-based resource allocation for
distributed data processing in wireless
sensor networks . . . . . . . . . . . . 84:1--84:??
Jingqing Mu and
Karthik Shankar and
Roman Lysecky Profiling and online system-level
performance and power estimation for
dynamically adaptable embedded systems 85:1--85:??
Roozbeh Jafari and
John Lach and
Majid Sarrafzadeh and
William Kaiser Introduction to the special section on
wireless health systems . . . . . . . . 98:1--98:??
Jacqueline Wijsman and
Bernard Grundlehner and
Julien Penders and
Hermie Hermens Trapezius muscle EMG as predictor of
mental stress . . . . . . . . . . . . . 99:1--99:??
Rita H. Wouhaybi and
Mark D. Yarvis and
Sangita Sharma and
Philip Muse and
Chieh-Yih Wan and
Sai Prasad and
Lenitra Durham and
Ritu Sahni and
Robert Norton and
Merlin Curry and
Holly Jimison and
Richard Harper and
Robert A. Lowe Experiences with context management in
emergency medicine . . . . . . . . . . . 100:1--100:??
Aris Valtazanos and
D. K. Arvind and
Subramanian Ramamoorthy Latent space segmentation for mobile
gait analysis . . . . . . . . . . . . . 101:1--101:??
Fabien Massé and
Martien Van Bussel and
Aline Serteyn and
Johan Arends and
Julien Penders Miniaturized wireless ECG monitor for
real-time detection of epileptic
seizures . . . . . . . . . . . . . . . . 102:1--102:??
Yu M. Chi and
Patrick Ng and
Gert Cauwenberghs Wireless noncontact ECG and EEG
biopotential sensors . . . . . . . . . . 103:1--103:??
José Flich Cardo and
Maurizio Palesi Introduction to the special section on
on-chip and off-chip network
architectures . . . . . . . . . . . . . 104:1--104:??
Qiaoyan Yu and
Meilin Zhang and
Paul Ampadu Addressing network-on-chip router
transient errors with inherent
information redundancy . . . . . . . . . 105:1--105:??
Alberto Ghiribaldi and
Daniele Ludovici and
Francisco Triviño and
Alessandro Strano and
José Flich and
José Luis Sánchez and
Francisco Alfaro and
Michele Favalli and
Davide Bertozzi A complete self-testing and
self-configuring NoC infrastructure for
cost-effective MPSoCs . . . . . . . . . 106:1--106:??
Frank Olaf Sem-Jacobsen and
Samuel Rodrigo and
Tor Skeie and
Alessandro Strano and
Davide Bertozzi An efficient, low-cost routing framework
for convex mesh partitions to support
virtualization . . . . . . . . . . . . . 107:1--107:??
Ciprian Seiculescu and
Dara Rahmati and
Srinivasan Murali and
Hamid Sarbazi-Azad and
Luca Benini and
Giovanni De Micheli Designing best effort networks-on-chip
to meet hard latency constraints . . . . 108:1--108:??
Eitan Zahavi and
Israel Cidon and
Avinoam Kolodny Gana: a novel low-cost conflict-free NoC
architecture . . . . . . . . . . . . . . 109:1--109:??
Dongki Kim and
Sungjoo Yoo and
Sunggu Lee A network congestion-aware memory
subsystem for manycore . . . . . . . . . 110:1--110:??
Frank Olaf Sem-Jacobsen and
Samuel Rodrigo and
Alessandro Strano and
Tor Skeie and
Davide Bertozzi and
Francisco Gilabert Enabling power efficiency through
dynamic rerouting on-chip . . . . . . . 111:1--111:??
Anonymous Abstracts: Online Supplements Volume 12,
Number 1s, Volume 12, Number 2s . . . . 112:1--112:??
Mo Li and
Zheng Yang and
Yunhao Liu Sea depth measurement with restricted
floating sensors . . . . . . . . . . . . 1:1--1:??
Madhukar Anand and
Sebastian Fischmeister and
Insup Lee A comparison of compositional
schedulability analysis techniques for
hierarchical real-time systems . . . . . 2:1--2:??
Juan Carlos Martinez Santos and
Yunsi Fei Leveraging speculative architectures for
runtime program validation . . . . . . . 3:1--3:??
Ang-Chih Hsieh and
Tingting Hwang Thermal-aware memory mapping in $3$D
designs . . . . . . . . . . . . . . . . 4:1--4:??
Ke Bai and
Aviral Shrivastava A software-only scheme for managing heap
data on limited local memory (LLM)
multicore processors . . . . . . . . . . 5:1--5:??
Ji Gu and
Hui Guo and
Tohru Ishihara DLIC: Decoded loop instructions caching
for energy-aware embedded processors . . 6:1--6:??
Phillip Stanley-Marbell L24: Parallelism, performance, energy
efficiency, and cost trade-offs in
future sensor platforms . . . . . . . . 7:1--7:??
Won So and
Alexander G. Dean Software thread integration for
instruction-level parallelism . . . . . 8:1--8:??
Hassan Ghasemzadeh and
Roozbeh Jafari Ultra low-power signal processing in
wearable monitoring systems: a tiered
screening architecture with optimal bit
resolution . . . . . . . . . . . . . . . 9:1--9:??
Yuan-Hao Chang and
Ming-Chang Yang and
Tei-Wei Kuo and
Ren-Hung Hwang A reliability enhancement design under
the flash translation layer for
MLC-based flash-memory storage systems 10:1--10:??
Chih-Hao Chao and
Kun-Chih Chen and
Tsu-Chu Yin and
Shu-Yen Lin and
An-Yeu (Andy) Wu Transport-layer-assisted routing for
runtime thermal management of $3$D NoC
systems . . . . . . . . . . . . . . . . 11:1--11:??
Christopher G. Kent and
Joann M. Paul Contextual partitioning for speech
recognition . . . . . . . . . . . . . . 12:1--12:??
Sunwoo Kim and
Won Seob Jeong and
Won W. Ro and
Jean-Luc Gaudiot Design and evaluation of random linear
network coding accelerators on FPGAs . . 13:1--13:??
Mirza Beg and
Peter van Beek A constraint programming approach for
integrated spatial and temporal
scheduling for clustered architectures 14:1--14:??
Philip Brisk and
Tulika Mitra Introduction to the special issue on
application-specific processors . . . . 15:1--15:??
Sudhanshu Vyas and
Adwait Gupte and
Christopher D. Gill and
Ron K. Cytron and
Joseph Zambreno and
Phillip H. Jones Hardware architectural support for
control systems and sensor processing 16:1--16:??
Spiridon F. Beldianu and
Sotirios G. Ziavras Multicore-based vector coprocessor
sharing for performance and energy gains 17:1--17:??
Thorsten Jungeblut and
Boris Hübener and
Mario Porrmann and
Ulrich Rückert A systematic approach for optimized
bypass configurations for
application-specific embedded processors 18:1--18:??
Dimitris Theodoropoulos and
Georgi Kuzmanov and
Georgi Gaydadjiev Custom architecture for multicore audio
beamforming systems . . . . . . . . . . 19:1--19:??
Giovanni Mariani and
Gianluca Palermo and
Vittorio Zaccaria and
Cristina Silvano Design-space exploration and runtime
resource management for multicores . . . 20:1--20:??
Yooseong Kim and
Aviral Shrivastava Memory performance estimation of CUDA
programs . . . . . . . . . . . . . . . . 21:1--21:??
Ioannis Stamoulias and
Elias S. Manolakos Parallel architectures for the kNN
classifier --- design of soft IP cores
and FPGA implementations . . . . . . . . 22:1--22:??
Chen Huang and
Frank Vahid and
Tony Givargis Automatic synthesis of physical system
differential equation models to a custom
network of general processing elements
on FPGAs . . . . . . . . . . . . . . . . 23:1--23:??
Andrew Canis and
Jongsok Choi and
Mark Aldham and
Victor Zhang and
Ahmed Kammoona and
Tomasz Czajkowski and
Stephen D. Brown and
Jason H. Anderson LegUp: an open-source high-level
synthesis tool for FPGA-based
processor/accelerator systems . . . . . 24:1--24:??
Alexandros Papakonstantinou and
Karthik Gururaj and
John A. Stratton and
Deming Chen and
Jason Cong and
Wen-Mei W. Hwu Efficient compilation of CUDA kernels
for high-performance computing on FPGAs 25:1--25:??
Editors Introduction to the special section on
ESTIMedia'10 . . . . . . . . . . . . . . 26:1--26:??
Zai Jian Jia and
Tomás Bautista and
Antonio Núñez and
Andy D. Pimentel and
Mark Thompson A system-level infrastructure for
multidimensional MP-SoC design space
co-exploration . . . . . . . . . . . . . 27:1--27:??
Dmitry Nadezhkin and
Hristo Nikolov and
Todor Stefanov Automated generation of polyhedral
process networks from affine nested-loop
programs with dynamic loop bounds . . . 28:1--28:??
Yulei Wu and
Geyong Min and
Dakai Zhu and
Laurence T. Yang An analytical model for on-chip
interconnects in multimedia embedded
systems . . . . . . . . . . . . . . . . 29:1--29:??
Weijia Che and
Karam S. Chatha Scheduling of synchronous data flow
models onto scratchpad memory-based
embedded processors . . . . . . . . . . 30:1--30:??
Florian Schmoll and
Andreas Heinig and
Peter Marwedel and
Michael Engel Improving the fault resilience of an
H.264 decoder using static analysis
methods . . . . . . . . . . . . . . . . 31:1--31:??
Gabriel Parmer and
Richard West Predictable and configurable
component-based scheduling in the
Composite OS . . . . . . . . . . . . . . 32:1--32:??
Bo Zhou and
Xiaobo Sharon Hu and
Danny Z. Chen and
Cedric X. Yu Accelerating radiation dose calculation:
a multi-FPGA solution . . . . . . . . . 33:1--33:??
Pedro Furtado and
José Cecílio Configuration and operation of networked
control systems over heterogeneous WSANs 34:1--34:??
Concepción Sanz and
José Ignacio Gómez and
Christian Tenllado and
Manuel Prieto and
Francky Catthoor System-level memory management based on
statistical variability compensation for
frame-based applications . . . . . . . . 35:1--35:??
Morteza Mohaqeqi and
Mehdi Kargahi and
Maryam Dehghan Adaptive scheduling of real-time systems
cosupplied by renewable and nonrenewable
energy sources . . . . . . . . . . . . . 36:1--36:??
Chen-Kang Lo and
Mao-Lin Li and
Li-Chun Chen and
Yi-Shan Lu and
Ren-Song Tsay and
Hsu-Yao Huang and
Jen-Chieh Yeh Automatic generation of high-speed
accurate TLM models for out-of-order
pipelined bus . . . . . . . . . . . . . 37:1--37:??
Jongeun Lee and
Aviral Shrivastava Software-based register file
vulnerability reduction for embedded
processors . . . . . . . . . . . . . . . 38:1--38:??
Anshul Singh and
Arindam Basu and
Keck-Voon Ling and
Vincent J. Mooney III Models for characterizing noise based
PCMOS circuits . . . . . . . . . . . . . 39:1--39:??
Iraklis Anagnostopoulos and
Jean-Michel Chabloz and
Ioannis Koutras and
Alexandros Bartzas and
Ahmed Hemani and
Dimitrios Soudris Power-aware dynamic memory management on
many-core platforms utilizing DVFS . . . 40:1--40:??
Editors Monitoring massive appliances by a
minimal number of smart meters . . . . . 56:1--56:??
Chenye Wu and
Yiyu Shi and
Soummya Kar Exploring demand flexibility in
heterogeneous aggregators: an LMP-based
pricing scheme . . . . . . . . . . . . . 57:1--57:??
Naehyuck Chang and
Jian-Jia Chen Introduction to the special section on
ESTIMedia'11 . . . . . . . . . . . . . . 58:1--58:??
Tzu-Hsiang Su and
Hsiang-Jen Tsai and
Keng-Hao Yang and
Po-Chun Chang and
Tien-Fu Chen and
Yi-Ting Zhao Reconfigurable vertical profiling
framework for the Android runtime system 59:1--59:??
Wook Song and
Yeseong Kim and
Hakbong Kim and
Jehun Lim and
Jihong Kim Personalized optimization for Android
smartphones . . . . . . . . . . . . . . 60:1--60:??
Davit Mirzoyan and
Benny Akesson and
Kees Goossens Process-variation-aware mapping of
best-effort and real-time streaming
applications to MPSoCs . . . . . . . . . 61:1--61:??
Dong-Heon Jung and
Soo-Mook Moon and
Hyeong-Seok Oh Hybrid compilation and optimization for
Java-based digital TV platforms . . . . 62:1--62:??
Li-Pin Chang and
Chen-Yi Wen Reducing asynchrony in channel
garbage-collection for improving
internal parallelism of multichannel
solid-state disks . . . . . . . . . . . 63:1--63:??
Zheng Li and
Frank Lockom and
Shangping Ren Maintaining real-time application timing
similarity for defect-tolerant NoC-based
many-core systems . . . . . . . . . . . 64:1--64:??
Masud Ahmed and
Nathan Fisher Tractable schedulability analysis and
resource allocation for real-time
multimodal systems . . . . . . . . . . . 65:1--65:??
Rahul Balani and
Lucas F. Wanner and
Mani B. Srivastava Distributed programming framework for
fast iterative optimization in networked
cyber-physical systems . . . . . . . . . 66:1--66:??
Jens Brandt and
Klaus Schneider and
Yu Bai Passive code in synchronous programs . . 67:1--67:??
Yu Gu and
Liang He and
Ting Zhu and
Tian He Achieving energy-synchronized
communication in energy-harvesting
wireless sensor networks . . . . . . . . 68:1--68:??
Jinkyu Lee and
Arvind Easwaran and
Insik Shin Contention-free executions for real-time
multiprocessor scheduling . . . . . . . 69:1--69:??
Huang Huang and
Vivek Chaturvedi and
Gang Quan and
Jeffrey Fan and
Meikang Qiu Throughput maximization for periodic
real-time systems under the maximal
temperature constraint . . . . . . . . . 70:1--70:??
Abdullah Elewi and
Mohamed Shalan and
Medhat Awadalla and
Elsayed M. Saad Energy-efficient task allocation
techniques for asymmetric multiprocessor
embedded systems . . . . . . . . . . . . 71:1--71:??
Anup Das and
Akash Kumar and
Bharadwaj Veeravalli Energy-aware task mapping and scheduling
for reliable embedded computing systems 72:1--72:??
Xiaohang Wang and
Mei Yang and
Yingtao Jiang and
Peng Liu and
Masoud Daneshtalab and
Maurizio Palesi and
Terrence Mak On self-tuning networks-on-chip for
dynamic network-flow dominance
adaptation . . . . . . . . . . . . . . . 73:1--73:??
Garo Bournoutian and
Alex Orailoglu Application-aware adaptive cache
architecture for power-sensitive mobile
processors . . . . . . . . . . . . . . . 41:1--41:??
Bo Zhou and
Kai Xiao and
Danny Z. Chen and
X. Sharon Hu GPU-optimized volume ray tracing for
massive numbers of rays in radiotherapy 42:1--42:??
Yun Liang and
Tulika Mitra An analytical approach for fast and
accurate design space exploration of
instruction caches . . . . . . . . . . . 43:1--43:??
Timothy Bourke and
Arcot Sowmya Analyzing an embedded sensor with timed
automata in Uppaal . . . . . . . . . . . 44:1--44:??
Rebecca L. Collins and
Luca P. Carloni Flexible filters in stream programs . . 45:1--45:??
Matin Hashemi and
Mohammad H. Foroozannejad and
Soheil Ghiasi Throughput-memory footprint trade-off in
synthesis of streaming software on
embedded multiprocessors . . . . . . . . 46:1--46:??
Swarnendu Biswas and
Rajib Mall and
Manoranjan Satpathy A regression test selection technique
for embedded software . . . . . . . . . 47:1--47:??
Rupak Majumdar and
Elaine Render and
Paulo Tabuada A theory of robust omega-regular
software synthesis . . . . . . . . . . . 48:1--48:??
Yi-Ping You and
Shen-Hong Wang Energy-aware code motion for GPU shader
processors . . . . . . . . . . . . . . . 49:1--49:??
Tiantian Liu and
Alex Orailoglu and
Chun Jason Xue and
Minming Li Register allocation for embedded systems
to simultaneously reduce energy and
temperature on registers . . . . . . . . 50:1--50:??
Adrian Lizarraga and
Roman Lysecky and
Susan Lysecky and
Ann Gordon-Ross Dynamic profiling and fuzzy-logic-based
optimization of sensor network platforms 51:1--51:??
Yosi Ben-Asher and
Nadav Rotem The benefits of using variable-length
pipelined operations in high-level
synthesis . . . . . . . . . . . . . . . 52:1--52:??
Yu-Ming Chang and
Pi-Cheng Hsiu and
Yuan-Hao Chang and
Che-Wei Chang A resource-driven DVFS scheme for smart
handheld devices . . . . . . . . . . . . 53:1--53:??
Christos Kyrkou and
Christos Ttofis and
Theocharis Theocharides A hardware architecture for real-time
object detection using depth and edge
information . . . . . . . . . . . . . . 54:1--54:??
Li-Pin Chang and
Tung-Yang Chou and
Li-Chun Huang An adaptive, low-cost wear-leveling
algorithm for multichannel solid-state
disks . . . . . . . . . . . . . . . . . 55:1--55:??
Sandeep K. Shukla Editorial: Embedded systems --- more
than methodology . . . . . . . . . . . . 99:1--99:??
Masoud Daneshtalab and
Maurizio Palesi and
Juha Plosila Editorial: Special issue on design
challenges for many-core processors . . 100:1--100:??
Somayyeh Koohi and
Yawei Yin and
Shaahin Hessabi and
S. J. Ben Yoo Towards a scalable, low-power
all-optical architecture for
networks-on-chip . . . . . . . . . . . . 101:1--101:??
Yves Lhuillier and
Maroun Ojail and
Alexandre Guerre and
Jean-Marc Philippe and
Karim Ben Chehida and
Farhat Thabet and
Caaliph Andriamisaina and
Chafic Jaber and
Raphaël David HARS: a hardware-assisted runtime
software for embedded many-core
architectures . . . . . . . . . . . . . 102:1--102:??
Qiang Yang and
Jian Fu and
Raphael Poss and
Chris Jesshope On-chip traffic regulation to reduce
coherence protocol cost on a
microthreaded many-core architecture
with distributed caches . . . . . . . . 103:1--103:??
Ritesh Parikh and
Valeria Bertacco ForEVeR: a complementary formal and
runtime verification approach to correct
NoC functionality . . . . . . . . . . . 104:1--104:??
Alberto A. Del Barrio and
Nader Bagherzadeh and
Román Hermida Ultra-low-power adder stage design for
exascale floating point units . . . . . 105:1--105:??
Yu-Jen Huang and
Jin-Fu Li Yield-enhancement schemes for multicore
processor and memory stacked $3$D ICs 106:1--106:??
Oliver Arnold and
Emil Matus and
Benedikt Noethen and
Markus Winter and
Torsten Limberg and
Gerhard Fettweis Tomahawk: Parallelism and heterogeneity
in communications signal processing
MPSoCs . . . . . . . . . . . . . . . . . 107:1--107:??
Yuho Jin and
Timothy Mark Pinkston PAIS: Parallelism-aware interconnect
scheduling in multicores . . . . . . . . 108:1--108:??
Mario R. Casu and
Francesco Colonna and
Marco Crepaldi and
Danilo Demarchi and
Mariagrazia Graziano and
Maurizio Zamboni UWB microwave imaging for breast cancer
detection: Many-core, GPU, or FPGA? . . 109:1--109:??
Maurizio Palesi and
Todor Stefanov Editorial: Special Section on
ESTIMedia'13 . . . . . . . . . . . . . . 110:1--110:??
Gang Chen and
Kai Huang and
Alois Knoll Energy optimization for real-time
multiprocessor system-on-chip with
optimal DVFS and DPM combination . . . . 111:1--111:??
Rawan Abdel-Khalek and
Valeria Bertacco Post-silicon platform for the functional
diagnosis and debug of networks-on-chip 112:1--112:??
Dakshina Dasari and
Borislav Nikoli\'c and
Vincent Nélis and
Stefan M. Petters NoC contention analysis using a
branch-and-prune algorithm . . . . . . . 113:1--113:??
Ahmad Lashgar and
Ahmad Khonsari and
Amirali Baniasadi HARP: Harnessing inActive thReads in
many-core Processors . . . . . . . . . . 114:1--114:??
Abbas Banaiyanmofrad and
Gustavo Girão and
Nikil Dutt NoC-based fault-tolerant cache design in
chip multiprocessors . . . . . . . . . . 115:1--115:??
Shirish Bahirat and
Sudeep Pasricha METEOR: Hybrid photonic ring-mesh
network-on-chip for multicore
architectures . . . . . . . . . . . . . 116:1--116:??
Pierfrancesco Foglia and
Marco Solinas Exploiting replication to improve
performances of NUCA-based CMP systems 117:1--117:??
Sandeep K. Shukla Editorial: Embedded everywhere for
everyone . . . . . . . . . . . . . . . . 74:1--74:??
Siew-Kei Lam and
Thambipillai Srikanthan and
Christopher T. Clarke Rapid evaluation of custom instruction
selection approaches with FPGA
estimation . . . . . . . . . . . . . . . 75:1--75:??
Martina Maggio and
Federico Terraneo and
Alberto Leva Task scheduling: a control-theoretical
viewpoint for a general and flexible
solution . . . . . . . . . . . . . . . . 76:1--76:??
Wei Dong and
Yunhao Liu and
Chun Chen and
Lin Gu and
Xiaofan Wu Elon: Enabling efficient and long-term
reprogramming for wireless sensor
networks . . . . . . . . . . . . . . . . 77:1--77:??
Shuai Li and
Yuesheng Lou and
Bo Liu Bluetooth aided mobile phone
localization: a nonlinear neural circuit
approach . . . . . . . . . . . . . . . . 78:1--78:??
Jingtong Hu and
Qingfeng Zhuge and
Chun Jason Xue and
Wei-Che Tseng and
Edwin H.-M. Sha Management and optimization for
nonvolatile memory-based hybrid
scratchpad memory on multicore embedded
processors . . . . . . . . . . . . . . . 79:1--79:??
Heeseok Kim and
Dong-Guk Han and
Seokhie Hong and
Jaecheol Ha Message blinding method requiring no
multiplicative inversion for RSA . . . . 80:1--80:??
Behzad Mahdavikhah and
Ramin Mafi and
Shahin Sirouspour and
Nicola Nicolici A multiple-FPGA parallel computing
architecture for real-time simulation of
soft-object deformation . . . . . . . . 81:1--81:??
Philip Axer and
Rolf Ernst and
Heiko Falk and
Alain Girault and
Daniel Grund and
Nan Guan and
Bengt Jonsson and
Peter Marwedel and
Jan Reineke and
Christine Rochange and
Maurice Sebastian and
Reinhard Von Hanxleden and
Reinhard Wilhelm and
Wang Yi Building timing predictable embedded
systems . . . . . . . . . . . . . . . . 82:1--82:??
Luis Angel D. Bathen and
Nikil D. Dutt Embedded RAIDs-on-chip for bus-based
chip-multiprocessors . . . . . . . . . . 83:1--83:??
Evangelos Logaras and
Orsalia G. Hazapis and
Elias S. Manolakos Python to accelerate embedded SoC
design: a case study for systems biology 84:1--84:??
Rance Rodrigues and
Arunachalam Annamalai and
Sandip Kundu A low-power instruction replay mechanism
for design of resilient microprocessors 85:1--85:??
Mohammad Khavari Tavana and
Nasibeh Teimouri and
Meisam Abdollahi and
Maziar Goudarzi Simultaneous hardware and time
redundancy with online task scheduling
for low energy highly reliable
standby-sparing system . . . . . . . . . 86:1--86:??
Danny P. Riemens and
Georgi N. Gaydadjiev and
Chris I. de Zeeuw and
Christos Strydis Towards scalable arithmetic units with
graceful degradation . . . . . . . . . . 87:1--87:??
Sung Kyu Park and
Min Kyu Maeng and
Ki-Woong Park and
Kyu Ho Park Adaptive wear-leveling algorithm for
PRAM main memory with a DRAM buffer . . 88:1--88:??
Omer Anjum and
Mubashir Ali and
Teemu Pitkänen and
Jari Nurmi Transport triggered architecture to
perform carrier synchronization for LTE 89:1--89:??
Juan Antonio Clemente and
Javier Resano and
Daniel Mozos An approach to manage reconfigurations
and reduce area cost in hard real-time
reconfigurable systems . . . . . . . . . 90:1--90:??
Farhana Dewan and
Nathan Fisher Bandwidth allocation for
fixed-priority-scheduled compositional
real-time systems . . . . . . . . . . . 91:1--91:??
I-Wei Wu and
Jean Jyh-Jiun Shann and
Wei-Chung Hsu and
Chung-Ping Chung Extended Instruction Exploration for
Multiple-Issue Architectures . . . . . . 92:1--92:??
Roger Moussalli and
Mariam Salloum and
Robert Halstead and
Walid Najjar and
Vassilis J. Tsotras A study on parallelizing XML path
filtering using accelerators . . . . . . 93:1--93:??
Hengchang Liu and
Pan Hui and
Zhiheng Xie and
Jingyuan Li and
David Siu and
Gang Zhou and
Liusheng Huang and
John A. Stankovic Providing reliable and real-time
delivery in the presence of body
shadowing in breadcrumb systems . . . . 94:1--94:??
Bertrand Le Gal and
Christophe Jego GPU-like on-chip system for decoding
LDPC codes . . . . . . . . . . . . . . . 95:1--95:??
Umair Ali Khan and
Bernhard Rinner Online learning of timeout policies for
dynamic power management . . . . . . . . 96:1--96:??
Lingkan Gong and
Oliver Diessel Simulation-based functional verification
of dynamically reconfigurable systems 97:1--97:??
François Guimbretiére and
Shenwei Liu and
Han Wang and
Rajit Manohar An asymmetric dual-processor
architecture for low-power information
appliances . . . . . . . . . . . . . . . 98:1--98:??
Anonymous Abstracts: Online Supplements Volume 13,
Number 1s Volume 13, Number 2s Volume
13, Number 3s Volume 13, Number 4s
Volume 13, Number 5s . . . . . . . . . . 99:1--99:??
Marco Di Natale and
Rich West and
Jian-Jia Chen and
Rahul Mangharam Editorial: Special issue on real-time
and embedded technology and applications 119:1--119:??
Jack Whitham and
Neil C. Audsley and
Robert I. Davis Explicit reservation of cache memory in
a predictable, preemptive multitasking
real-time system . . . . . . . . . . . . 120:1--120:??
Shahriar Nirjon and
Angela Nicoara and
Cheng-Hsin Hsu and
Jatinder Pal Singh and
John A. Stankovic MultiNets: a system for real-time
switching between multiple network
interfaces on mobile devices . . . . . . 121:1--121:??
Pratyush Kumar and
Lothar Thiele Worst-case guarantees on a processor
with temperature-based feedback control
of speed . . . . . . . . . . . . . . . . 122:1--122:??
Nan Guan and
Mingsong Lv and
Wang Yi and
Ge Yu WCET analysis with MRU cache:
Challenging LRU for predictability . . . 123:1--123:??
Sudipta Chattopadhyay and
Lee Kee Chong and
Abhik Roychoudhury and
Timon Kelter and
Peter Marwedel and
Heiko Falk A Unified WCET analysis framework for
multicore platforms . . . . . . . . . . 124:1--124:??
Xiuming Zhu and
Pei-Chi Huang and
Jianyong Meng and
Song Han and
Aloysius K. Mok and
Deji Chen and
Mark Nixon ColLoc: a collaborative location and
tracking system on WirelessHART . . . . 125:1--125:??
Huang-Ming Huang and
Christopher Gill and
Chenyang Lu Implementation and evaluation of
mixed-criticality scheduling approaches
for sporadic tasks . . . . . . . . . . . 126:1--126:??
Miroslav Pajic and
Zhihao Jiang and
Insup Lee and
Oleg Sokolsky and
Rahul Mangharam Safety-critical medical device
development using the UPP2SF model
translation tool . . . . . . . . . . . . 127:1--127:??
Abusayeed Saifullah and
Chengjie Wu and
Paras Babu Tiwari and
You Xu and
Yong Fu and
Chenyang Lu and
Yixin Chen Near optimal rate selection for wireless
control systems . . . . . . . . . . . . 128:1--128:??
Pradeep M. Hettiarachchi and
Nathan Fisher and
Masud Ahmed and
Le Yi Wang and
Shinan Wang and
Weisong Shi A Design and Analysis Framework for
Thermal-Resilient Hard Real-Time Systems 146:1--146:??
Sudipta Chattopadhyay and
Abhik Roychoudhury Cache-Related Preemption Delay Analysis
for Multilevel Noninclusive Caches . . . 147:1--147:??
Anand Paul Real-Time Power Management for Embedded
M2M Using Intelligent Learning Methods 148:1--148:??
Haibo Zeng and
Marco Di Natale and
Qi Zhu Minimizing Stack and Communication
Memory Usage in Real-Time Embedded
Applications . . . . . . . . . . . . . . 149:1--149:??
Arup Chakraborty and
Houman Homayoun and
Amin Khajeh and
Nikil Dutt and
Ahmed Eltawil and
Fadi Kurdahi Multicopy Cache: a Highly
Energy-Efficient Cache Architecture . . 150:1--150:??
Vinay Hanumaiah and
Digant Desai and
Benjamin Gaudette and
Carole-Jean Wu and
Sarma Vrudhula STEAM: a Smart Temperature and Energy
Aware Multicore Controller . . . . . . . 151:1--151:??
Judith E. Y. Rossebò and
Siv Hilde Houmb and
Geri Georg and
Virginia N. L. Franqueira and
Dimitrios Serpanos Introduction to Special Issue on Risk
and Trust in Embedded Critical Systems 152:1--152:??
Carson Dunbar and
Gang Qu Designing Trusted Embedded Systems from
Finite State Machines . . . . . . . . . 153:1--153:??
Akshay Dua and
Nirupama Bulusu and
Wu-Chang Feng and
Wen Hu Combating Software and Sybil Attacks to
Data Integrity in Crowd-Sourced Embedded
Systems . . . . . . . . . . . . . . . . 154:1--154:??
Li-Pin Chang and
Tei-Wei Kuo and
Chris Gill and
Jin Nakazawa Introduction to the Special Issue on
Real-Time, Embedded and Cyber-Physical
Systems . . . . . . . . . . . . . . . . 155:1--155:??
Keni Qiu and
Mengying Zhao and
Chun Jason Xue and
Alex Orailoglu Branch Prediction-Directed Dynamic
Instruction Cache Locking for Embedded
Systems . . . . . . . . . . . . . . . . 156:1--156:??
Chih-Kai Kang and
Yu-Jhang Cai and
Chin-Hsien Wu and
Pi-Cheng Hsiu A Hybrid Storage Access Framework for
High-Performance Virtual Machines . . . 157:1--157:??
Santiago Pagani and
Jian-Jia Chen Energy Efficiency Analysis for the
Single Frequency Approximation (SFA)
Scheme . . . . . . . . . . . . . . . . . 158:1--158:??
Gurulingesh Raravi and
Vincent Nélis Task Assignment Algorithms for
Heterogeneous Multiprocessors . . . . . 159:1--159:??
Björn Andersson and
Gurulingesh Raravi Provably Good Task Assignment for
Two-Type Heterogeneous Multiprocessors
Using Cutting Planes . . . . . . . . . . 160:1--160:??
Giulio M. Mancuso and
Enrico Bini and
Gabriele Pannocchia Optimal Priority Assignment to Control
Tasks . . . . . . . . . . . . . . . . . 161:1--161:??
Dionisio De Niz and
Lutz Wrage and
Anthony Rowe and
Ragunathan (Raj) Rajkumar Utility-Based Resource Overbooking for
Cyber-Physical Systems . . . . . . . . . 162:1--162:??
Kai Liu and
Victor C. S. Lee and
Joseph K. Y. Ng and
Sang H. Son and
Edwin H.-M. Sha Scheduling Temporal Data with Dynamic
Snapshot Consistency Requirement in
Vehicular Cyber-Physical Systems . . . . 163:1--163:??
Diana Goehringer Introduction to the Special Issue on
Virtual Prototyping of Parallel and
Embedded Systems (ViPES) . . . . . . . . 164:1--164:??
Christoph Schumacher and
Jan Henrik Weinstock and
Rainer Leupers and
Gerd Ascheid and
Laura Tosoratto and
Alessandro Lonardo and
Dietmar Petras and
Andreas Hoffmann legaSCi: Legacy SystemC Model
Integration into Parallel Simulators . . 165:1--165:??
Parisa Razaghi and
Andreas Gerstlauer Host-Compiled Multicore System
Simulation for Early Real-Time
Performance Evaluation . . . . . . . . . 166:1--166:??
Bojan Mihajlovi\'c and
Zeljko Zili\'c and
Warren J. Gross Dynamically Instrumenting the QEMU
Emulator for Linux Process Trace
Generation with the GDB Debugger . . . . 167:1--167:??
Dionysios Diamantopoulos and
Efstathios Sotiriou-Xanthopoulos and
Kostas Siozios and
George Economakos and
Dimitrios Soudris Plug&Chip: a Framework for Supporting
Rapid Prototyping of $3$D Hybrid Virtual
SoCs . . . . . . . . . . . . . . . . . . 168:1--168:??
Kostas Siozios and
Dimitrios Soudris and
Michael Hübner A Framework for Supporting Adaptive
Fault-Tolerant Solutions . . . . . . . . 169:1--169:??
Sandeep K. Shukla Editorial: Regular, Special, and Related
Issues . . . . . . . . . . . . . . . . . 1:1--1:??
Rimpy Bishnoi and
Vijay Laxmi and
Manoj Singh Gaur and
José Flich and
Francisco Triviño A Brief Comment on ``A Complete
Self-Testing and Self-Configuring NoC
Infrastructure for Cost-Effective
MPSoCs'' [ACM Transactions on Embedded
Computing Systems \bf 12 (2013) Article
106] . . . . . . . . . . . . . . . . . . 2:1--2:??
Arslan Munir and
Joseph Antoon and
Ann Gordon-Ross Modeling and Analysis of Fault Detection
and Fault Tolerance in Wireless Sensor
Networks . . . . . . . . . . . . . . . . 3:1--3:??
Abhik Sarkar and
Frank Mueller and
Harini Ramaprasad Static Task Partitioning for Locked
Caches in Multicore Real-Time Systems 4:1--4:??
Martin Tillenius and
Elisabeth Larsson and
Rosa M. Badia and
Xavier Martorell Resource-Aware Task Scheduling . . . . . 5:1--5:??
Yazhi Huang and
Mengying Zhao and
Chun Jason Xue Joint WCET and Update Activity
Minimization for Cyber-Physical Systems 6:1--6:??
Davide Bertozzi and
Stefano Di Carlo and
Salvatore Galfano and
Marco Indaco and
Piero Olivo and
Paolo Prinetto and
Cristian Zambelli Performance and Reliability Analysis of
Cross-Layer Optimizations of NAND Flash
Controllers . . . . . . . . . . . . . . 7:1--7:??
Ye-Jyun Lin and
Chia-Lin Yang and
Jiao-We Huang and
Tay-Jyi Lin and
Chih-Wen Hsueh and
Naehyuck Chang System-Level Performance and Power
Optimization for MPSoC: a Memory
Access-Aware Approach . . . . . . . . . 8:1--8:??
Johannes Borgstrom and
Ramunas Gutkovas and
Ioana Rodhe and
Björn Victor The Psi-Calculi Workbench: a Generic
Tool for Applied Process Calculi . . . . 9:1--9:??
A. C. Van Hulst and
M. A. Reniers and
W. J. Fokkink Maximal Synthesis for Hennessy--Milner
Logic . . . . . . . . . . . . . . . . . 10:1--10:??
Hanifa Boucheneb and
Kamel Barkaoui Stubborn Sets for Time Petri Nets . . . 11:1--11:??
Abhisek Pan and
Rance Rodrigues and
Sandip Kundu A Hardware Framework for Yield and
Reliability Enhancement in Chip
Multiprocessors . . . . . . . . . . . . 12:1--12:??
Mihai T. Lazarescu and
Luciano Lavagno Interactive Trace-Based Analysis Toolset
for Manual Parallelization of C Programs 13:1--13:??
Wei Quan and
Andy D. Pimentel A Hybrid Task Mapping Algorithm for
Heterogeneous MPSoCs . . . . . . . . . . 14:1--14:??
Vinicius Petrucci and
Orlando Loques and
Daniel Mossé and
Rami Melhem and
Neven Abou Gazala and
Sameh Gobriel Energy-Efficient Thread Assignment
Optimization for Heterogeneous Multicore
Systems . . . . . . . . . . . . . . . . 15:1--15:??
Zhengfeng Yang and
Wang Lin and
Min Wu Exact Safety Verification of Hybrid
Systems Based on Bilinear SOS
Representation . . . . . . . . . . . . . 16:1--16:??
Rance Rodrigues and
Israel Koren and
Sandip Kundu Does the Sharing of Execution Units
Improve Performance/Power of Multicores? 17:1--17:??
Dionysios Diamantopoulos and
Kostas Siozios and
Sotirios Xydis and
Dimitrios Soudris GENESIS: Parallel Application Placement
onto Reconfigurable Architectures
(Invited for the Special Issue on
Runtime Management) . . . . . . . . . . 18:1--18:??
Jared Pager and
Reiley Jeyapaul and
Aviral Shrivastava A Software Scheme for Multithreading on
CGRAs . . . . . . . . . . . . . . . . . 19:1--19:??
Sandeep K. Shukla Editorial: Oh Security --- Where Art
Thou? . . . . . . . . . . . . . . . . . 20:1--20:??
Sergiu Rafiliu and
Petru Eles and
Zebo Peng and
Michael Lemmon Stability of Online Resource Managers
for Distributed Systems under Execution
Time Variations . . . . . . . . . . . . 21:1--21:??
Seng W. Loke and
Keegan Napier and
Abdulaziz Alali and
Niroshinie Fernando and
Wenny Rahayu Mobile Computations with Surrounding
Devices: Proximity Sensing and
MultiLayered Work Stealing . . . . . . . 22:1--22:??
Avinash Malik and
David Gregg Heuristics on Reachability Trees for
Bicriteria Scheduling of Stream Graphs
on Heterogeneous Multiprocessor
Architectures . . . . . . . . . . . . . 23:1--23:??
Paul Martin and
Lucas Wanner and
Mani Srivastava Runtime Optimization of System Utility
with Variable Hardware . . . . . . . . . 24:1--24:??
Manil Dev Gomony and
Benny Akesson and
Kees Goossens A Real-Time Multichannel Memory
Controller and Optimal Mapping of Memory
Clients to Memory Channels . . . . . . . 25:1--25:??
Lo\"\ig Jezequel and
Eric Fabre and
Victor Khomenko Factored Planning: From Automata to
Petri Nets . . . . . . . . . . . . . . . 26:1--26:??
Daisuke Taniuchi and
Takuya Maekawa Automatic Update of Indoor Location
Fingerprints with Pedestrian Dead
Reckoning . . . . . . . . . . . . . . . 27:1--27:??
Xavier Jimenez and
David Novo and
Paolo Ienne Libra: Software-Controlled Cell
Bit-Density to Balance Wear in NAND
Flash . . . . . . . . . . . . . . . . . 28:1--28:??
Li-Pin Chang and
Yo-Chuan Su and
I-Chen Wu Plugging Versus Logging: Adaptive Buffer
Management for Hybrid-Mapping SSDs . . . 29:1--29:??
Zhiping Jia and
Yang Li and
Yi Wang and
Meng Wang and
Zili Shao Temperature-Aware Data Allocation for
Embedded Systems with Cache and
Scratchpad Memory . . . . . . . . . . . 30:1--30:??
Weihua Zhang and
Jiaxin Li and
Yi Li and
Haibo Chen Multilevel Phase Analysis . . . . . . . 31:1--31:??
Abbas Banaiyanmofrad and
Houman Homayoun and
Nikil Dutt Using a Flexible Fault-Tolerant Cache to
Improve Reliability for Ultra Low
Voltage Operation . . . . . . . . . . . 32:1--32:??
Muhsen Owaida and
Gabriel Falcao and
Joao Andrade and
Christos Antonopoulos and
Nikolaos Bellas and
Madhura Purnaprajna and
David Novo and
Georgios Karakonstantis and
Andreas Burg and
Paolo Ienne Enhancing Design Space Exploration by
Extending CPU/GPU Specifications onto
FPGAs . . . . . . . . . . . . . . . . . 33:1--33:??
Tianzheng Wang and
Duo Liu and
Yi Wang and
Zili Shao Towards Write-Activity-Aware Page Table
Management for Non-volatile Main
Memories . . . . . . . . . . . . . . . . 34:1--34:??
Chun-Jen Tsai and
Han-Wen Kuo and
Zigang Lin and
Zi-Jing Guo and
Jun-Fu Wang A Java Processor IP Design for Embedded
SoC . . . . . . . . . . . . . . . . . . 35:1--35:??
Christos Ttofis and
Christos Kyrkou and
Theocharis Theocharides A Hardware-Efficient Architecture for
Accurate Real-Time Disparity Map
Estimation . . . . . . . . . . . . . . . 36:1--36:??
Miguel Peón-quirós and
Alexandros Bartzas and
Stylianos Mamagkakis and
Francky Catthoor and
José Manuel Mendías and
Dimitrios Soudris Placement of Linked Dynamic Data
Structures over Heterogeneous Memories
in Embedded Systems . . . . . . . . . . 37:1--37:??
Juan Segarra and
Clemente Rodríguez and
Rubén Gran and
Luis C. Aparicio and
Víctor Viñals ACDC: Small, Predictable and
High-Performance Data Cache . . . . . . 38:1--38:??
Patrick Bellasi and
Giuseppe Massari and
William Fornaciari Effective Runtime Resource Management
Using Linux Control Groups with the
BarbequeRTRM Framework . . . . . . . . . 39:1--39:??
Patrick Schaumont and
Maire O'Neill and
Tim Güneysu Introduction for Embedded Platforms for
Cryptography in the Coming Decade . . . 40:1--40:??
Sandeep K. Shukla Editorial: Schizoid Design for Critical
Embedded Systems . . . . . . . . . . . . 40e:1--40e:??
James Howe and
Thomas Pöppelmann and
Máire O'Neill and
Elizabeth O'Sullivan and
Tim Güneysu Practical Lattice-Based Digital
Signature Schemes . . . . . . . . . . . 41:1--41:??
Ahmad Boorghany and
Siavash Bayat Sarmadi and
Rasool Jalili On Constrained Implementation of
Lattice-Based Cryptographic Primitives
and Schemes on Smart Cards . . . . . . . 42:1--42:??
Aydin Aysu and
Bilgiday Yuce and
Patrick Schaumont The Future of Real-Time Security:
Latency-Optimized Lattice-Based Digital
Signatures . . . . . . . . . . . . . . . 43:1--43:??
Ingo Von Maurich and
Tobias Oder and
Tim Güneysu Implementing QC--MDPC McEliece
Encryption . . . . . . . . . . . . . . . 44:1--44:??
Pedro Maat C. Massolino and
Paulo S. L. M. Barreto and
Wilson V. Ruggiero Optimized and Scalable Co-Processor for
McEliece with Binary Goppa Codes . . . . 45:1--45:??
Jean-Vivien Millo and
Emilien Kofman and
Robert De Simone Modeling and Analyzing Dataflow
Applications on NoC-Based Many-Core
Architectures . . . . . . . . . . . . . 46:1--46:??
Robert I. Davis and
Alan Burns and
Jose Marinho and
Vincent Nelis and
Stefan M. Petters and
Marko Bertogna Global and Partitioned Multiprocessor
Fixed Priority Scheduling with Deferred
Preemption . . . . . . . . . . . . . . . 47:1--47:??
Andrea Tilli and
Andrea Bartolini and
Matteo Cacciari and
Luca Benini Guaranteed Computational Resprinting via
Model-Predictive Control . . . . . . . . 48:1--48:??
Parinaz Sayyah and
Mihai T. Lazarescu and
Sara Bocchio and
Emad Ebeid and
Gianluca Palermo and
Davide Quaglia and
Alberto Rosti and
Luciano Lavagno Virtual Platform-Based Design Space
Exploration of Power-Efficient
Distributed Embedded Applications . . . 49:1--49:??
Domitian Tamas-Selicean and
Paul Pop Design Optimization of Mixed-Criticality
Real-Time Embedded Systems . . . . . . . 50:1--50:??
Dimitra Papagiannopoulou and
Giuseppe Capodanno and
Tali Moreshet and
Maurice Herlihy and
R. Iris Bahar Energy-Efficient and High-Performance
Lock Speculation Hardware for Embedded
Multicore Systems . . . . . . . . . . . 51:1--51:??
Luca Santinelli and
Liliana Cucu-Grosjean A Probabilistic Calculus for
Probabilistic Real-Time Systems . . . . 52:1--52:??
Kapil Anand and
Rajeev Barua Instruction-Cache Locking for Improving
Embedded Systems Performance . . . . . . 53:1--53:??
Patrick Cooke and
Lu Hao and
Greg Stitt Finite-State-Machine Overlay
Architectures for Fast FPGA Compilation
and Application Portability . . . . . . 54:1--54:??
Lanier Watkins and
William H. Robinson and
Raheem Beyah Using Network Traffic to Infer Hardware
State: a Kernel-Level Investigation . . 55:1--55:??
Steve Kerrison and
Kerstin Eder Energy Modeling of Software for a
Hardware Multithreaded Embedded
Microprocessor . . . . . . . . . . . . . 56:1--56:??
Alessandro Cilardo and
Edoardo Fusella and
Luca Gallo and
Antonino Mazzeo Exploiting Concurrency for the Automated
Synthesis of MPSoC Interconnects . . . . 57:1--57:??
Gilles Geeraerts and
Alexander Heußner and
Jean-François Raskin On the Verification of Concurrent,
Asynchronous Programs with Waiting
Queues . . . . . . . . . . . . . . . . . 58:1--58:??
Kai Huang and
Min Yu and
Rongjie Yan and
Xiaomeng Zhang and
Xiaolang Yan and
Lisane Brisolara and
Ahmed Amine Jerraya and
Jiong Feng Communication Optimizations for
Multithreaded Code Generation from
Simulink Models . . . . . . . . . . . . 59:1--59:??
Jimson Mathew and
Rajat Subhra Chakraborty and
Durga Prasad Sahoo and
Yuanfan Yang and
Dhiraj K. Pradhan A Novel Memristor-Based Hardware
Security Primitive . . . . . . . . . . . 60:1--60:??
Sandeep K. Shukla Editorial: Big Data, Internet of Things,
Cybersecurity --- A New Trinity of
Embedded Systems Research . . . . . . . 61:1--61:??
Kamel Barkaoui and
Luca Bernardinello and
Andrey Mokhov Guest Editorial for Special Issue
Application of Concurrency to System
Design . . . . . . . . . . . . . . . . . 62:1--62:??
Florian Furbach and
Roland Meyer and
Klaus Schneider and
Maximilian Senftleben Memory-Model-Aware Testing: a Unified
Complexity Analysis . . . . . . . . . . 63:1--63:??
Michal Knapik and
Artur Meski and
Wojciech Penczek Action Synthesis for Branching Time
Logic: Theory and Applications . . . . . 64:1--64:??
Antti Siirtola and
Keijo Heljanko Parametrised Modal Interface Automata 65:1--65:??
Sylvain Cotard and
Audrey Queudet and
Jean-Luc Béchennec and
Sébastien Faucou and
Yvon Trinquet STM--HRT: a Robust and Wait-Free STM for
Hard Real-Time Multicore Embedded
Systems . . . . . . . . . . . . . . . . 66:1--66:??
Ferenc Bujtor and
Walter Vogler Failure Semantics for Modal Transition
Systems . . . . . . . . . . . . . . . . 67:1--67:??
Robert De Groote and
Philip K. F. Hölzenspies and
Jan Kuper and
Gerard J. M. Smit Incremental Analysis of Cyclo-Static
Synchronous Dataflow Graphs . . . . . . 68:1--68:??
Vasileios Germanos and
Stefan Haar and
Victor Khomenko and
Stefan Schwoon Diagnosability under Weak Fairness . . . 69:1--69:??
Gung-Yu Pan and
Jed Yang and
Jing-Yang Jou and
Bo-Cheng Charles Lai Scalable Global Power Management Policy
Based on Combinatorial Optimization for
Multiprocessors . . . . . . . . . . . . 70:1--70:??
Jing Lu and
Ke Bai and
Aviral Shrivastava Efficient Code Assignment Techniques for
Local Memory on Software Managed
Multicores . . . . . . . . . . . . . . . 71:1--71:??
Mehdi Kamal and
Ali Afzali-Kusha and
Saeed Safari and
Massoud Pedram OPLE: a Heuristic Custom Instruction
Selection Algorithm Based on
Partitioning and Local Exploration of
Application Dataflow Graphs . . . . . . 72:1--72:??
Daniele Palossi and
Martino Ruggiero and
Luca Benini $3$D CV Descriptor on Parallel
Heterogeneous Platforms . . . . . . . . 73:1--73:??
Guohui Li and
Yi Zhang and
Jianjun Li Crenel-Interval-Based Dynamic Power
Management for Periodic Real-Time
Systems . . . . . . . . . . . . . . . . 74:1--74:??
Bojan Mihajlovi\'c and
Zeljko Zili\'c and
Warren J. Gross Architecture-Aware Real-Time Compression
of Execution Traces . . . . . . . . . . 75:1--75:??
Stanley Bak and
Zhenqi Huang and
Fardin Abdi Taghi Abad and
Marco Caccamo Safety and Progress for Distributed
Cyber-Physical Systems with Unreliable
Communication . . . . . . . . . . . . . 76:1--76:??
Vincenzo Catania and
Andrea Araldo and
Davide Patti Parameter Space Representation of Pareto
Front to Explore Hardware--Software
Dependencies . . . . . . . . . . . . . . 77:1--77:??
Adam Matthews and
Stanislav Bobovych and
Nilanjan Banerjee and
James P. Parkerson and
Ryan Robucci and
Chintan Patel Perpetuu: a Tiered Solar-powered GIS
Microserver . . . . . . . . . . . . . . 78:1--78:??
Ramy Medhat and
Borzoo Bonakdarpour and
Deepak Kumar and
Sebastian Fischmeister Runtime Monitoring of Cyber-Physical
Systems Under Timing and Memory
Constraints . . . . . . . . . . . . . . 79:1--79:??
Catherine H. Gebotys and
Brian A. White A Sliding Window Phase-Only Correlation
Method for Side-Channel Alignment in a
Smartphone . . . . . . . . . . . . . . . 80:1--80:??
Qingling Zhao and
Zonghua Gu and
Haibo Zeng Resource Synchronization and Preemption
Thresholds Within Mixed-Criticality
Scheduling . . . . . . . . . . . . . . . 81:1--81:??
Ming-Ju Wu and
Chun-Jen Tsai A Storage Device Emulator for System
Performance Evaluation . . . . . . . . . 82:1--82:??
Davit Mirzoyan and
Benny Akesson and
Sander Stuijk and
Kees Goossens Maximizing the Number of Good Dies for
Streaming Applications in NoC-Based0
MPSoCs Under Process Variation . . . . . 83:1--83:??
Shiwen Zhang and
Qingquan Zhang and
Sheng Xiao and
Ting Zhu and
Yu Gu and
Yaping Lin Cooperative Data Reduction in Wireless
Sensor Network . . . . . . . . . . . . . 84:1--84:??
Marijn Scheir and
Josep Balasch and
Alfredo Rial and
Bart Preneel and
Ingrid Verbauwhede Anonymous Split E-Cash-Toward Mobile
Anonymous Payments . . . . . . . . . . . 85:1--85:??
Jian-Min Jiang and
Huibiao Zhu and
Qin Li and
Yongxin Zhao and
Lin Zhao and
Shi Zhang and
Ping Gong and
Zhong Hong Analyzing Event-Based Scheduling in
Concurrent Reactive Systems . . . . . . 86:1--86:??
Kalikinkar Mandal and
Xinxin Fan and
Guang Gong Design and Implementation of Warbler
Family of Lightweight Pseudorandom
Number Generators for Smart Devices . . 1:1--1:??
Soumyajit Poddar and
Prasun Ghosal and
Hafizur Rahaman Design of a High-Performance CDMA-Based
Broadcast-Free Photonic Multi-Core
Network on Chip . . . . . . . . . . . . 2:1--2:??
Thiago Santini and
Paolo Rech and
Gabriel Luca Nazar and
Flávio Rech Wagner Beyond Cross-Section: Spatio-Temporal
Reliability Analysis . . . . . . . . . . 3:1--3:??
Catherine H. Gebotys and
Brian A. White and
Edgar Mateos Preaveraging and Carry Propagate
Approaches to Side-Channel Analysis of
HMAC-SHA256 . . . . . . . . . . . . . . 4:1--4:??
Wei Dong and
Luyao Luo and
Chao Huang Dynamic Logging with Dylog in Networked
Embedded Systems . . . . . . . . . . . . 5:1--5:??
Ke Jiang and
Petru Eles and
Zebo Peng Power-Aware Design Techniques of Secure
Multimode Embedded Systems . . . . . . . 6:1--6:??
Mario Bambagini and
Mauro Marinoni and
Hakan Aydin and
Giorgio Buttazzo Energy-Aware Scheduling for Real-Time
Systems: a Survey . . . . . . . . . . . 7:1--7:??
Anna Thomas and
Karthik Pattabiraman Error Detector Placement for Soft
Computing Applications . . . . . . . . . 8:1--8:??
Youenn Corre and
Jean-Philippe Diguet and
Dominique Heller and
Dominique Blouin and
Lo\"\ic Lagadec TBES: Template-Based Exploration and
Synthesis of Heterogeneous
Multiprocessor Architectures on FPGA . . 9:1--9:??
Urbi Chatterjee and
Rajat Subhra Chakraborty and
Hitesh Kapoor and
Debdeep Mukhopadhyay Theory and Application of Delay
Constraints in Arbiter PUF . . . . . . . 10:1--10:??
Se Jin Kwon A Cache-Based Flash Translation Layer
for TLC-Based Multimedia Storage Devices 11:1--11:??
Sheng-Min Huang and
Li-Pin Chang Exploiting Page Correlations for Write
Buffering in Page-Mapping Multichannel
SSDs . . . . . . . . . . . . . . . . . . 12:1--12:??
Li-Pin Chang and
Yu-Syun Liu and
Wen-Huei Lin Stable Greedy: Adaptive Garbage
Collection for Durable Page-Mapping
Multichannel SSDs . . . . . . . . . . . 13:1--13:??
Jinghao Sun and
Nan Guan and
Yang Wang and
Qingxu Deng and
Peng Zeng and
Wang Yi Feasibility of Fork-Join Real-Time Task
Graph Models: Hardness and Algorithms 14:1--14:??
Roberto Di Pietro and
Flavio Lombardi and
Antonio Villani CUDA Leaks: a Detailed Hack for CUDA and
a (Partial) Fix . . . . . . . . . . . . 15:1--15:??
Zhenhuan Zhu and
S. Olutunde Oyadiji Structure Design of Wireless Sensor
Nodes with Energy and Cost Awareness for
Multichannel Signal Measurement . . . . 16:1--16:??
Pi-Cheng Hsiu and
Po-Hsien Tseng and
Wei-Ming Chen and
Chin-Chiang Pan and
Tei-Wei Kuo User-Centric Scheduling and Governing on
Mobile Devices with big.LITTLE
Processors . . . . . . . . . . . . . . . 17:1--17:??
Namita Sharma and
Preeti Ranjan Panda and
Francky Catthoor and
Min Li and
Prashant Agrawal Data Flow Transformation for
Energy-Efficient Implementation of
Givens Rotation-Based QRD . . . . . . . 18:1--18:??
Andreas Emeretlis and
George Theodoridis and
Panayiotis Alefragis and
Nikolaos Voros A Logic-Based Benders Decomposition
Approach for Mapping Applications on
Heterogeneous Multicore Platforms . . . 19:1--19:??
Yohan Ko and
Jihoon Kang and
Jongwon Lee and
Yongjoo Kim and
Joonhyun Kim and
Hwisoo So and
Kyoungwoo Lee and
Yunheung Paek Software-Based Selective Validation
Techniques for Robust CGRAs Against Soft
Errors . . . . . . . . . . . . . . . . . 20:1--20:??
Radoslav Ivanov and
Miroslav Pajic and
Insup Lee Attack-Resilient Sensor Fusion for
Safety-Critical Cyber-Physical Systems 21:1--21:??
Sandeep K. Shukla Editorial: Science of the Big and Small
and Embedded Computing Systems . . . . . 21:1--21:??
Nikil Dutt and
Axel Jantsch and
Santanu Sarma Toward Smart Embedded Systems: a
Self-aware System-on-Chip (SoC)
Perspective . . . . . . . . . . . . . . 22:1--22:??
Sara Vinco and
Christian Pilato Editorial: Special Issue on Innovative
Design Methods for Smart Embedded
Systems . . . . . . . . . . . . . . . . 22:1--22:??
Luca Oneto and
Sandro Ridella and
Davide Anguita Learning Hardware-Friendly Classifiers
Through Algorithmic Stability . . . . . 23:1--23:??
Anup Das and
Bashir M. Al-Hashimi and
Geoff V. Merrett Adaptive and Hierarchical Runtime
Manager for Energy-Aware Thermal
Management of Embedded Systems . . . . . 24:1--24:??
Xiaoqi Gu and
Yongxin Zhu and
Shengyan Zhou and
Chaojun Wang and
Meikang Qiu and
Guoxing Wang A Real-Time FPGA-Based Accelerator for
ECG Analysis and Diagnosis Using
Association-Rule Mining . . . . . . . . 25:1--25:??
Taylor T. Johnson and
Stanley Bak and
Marco Caccamo and
Lui Sha Real-Time Reachability for Verified
Simplex Design . . . . . . . . . . . . . 26:1--26:??
Maria-Iro Baka and
Francky Catthoor and
Dimitrios Soudris Near-Static Shading Exploration for
Smart Photovoltaic Module Topologies
Based on Snake-like Configurations . . . 27:1--27:??
Alirad Malek and
Ioannis Sourdis and
Stavros Tzilis and
Yifan He and
Gerard Rauwerda RQNoC: a Resilient Quality-of-Service
Network-on-Chip with Service Redirection 28:1--28:??
Paolo Ienne and
Jean-Pierre Talpin Guest Editorial: Special Issue on Models
and Methodologies for System Design . . 29:1--29:??
Karol Desnos and
Maxime Pelcat and
Jean-François Nezan and
Slaheddine Aridhi On Memory Reuse Between Inputs and
Outputs of Dataflow Actors . . . . . . . 30:1--30:??
Ayoub Nouri and
Marius Bozga and
Anca Molnos and
Axel Legay and
Saddek Bensalem ASTROLABE: a Rigorous Approach for
System-Level Performance Modeling and
Analysis . . . . . . . . . . . . . . . . 31:1--31:??
Shahzad Ahmad Butt and
Mehdi Roozmeh and
Luciano Lavagno Designing Parameterizable Hardware IPs
in a Model-Based Design Environment for
High-Level Synthesis . . . . . . . . . . 32:1--32:??
Thi Thieu Hoa Le and
Roberto Passerone and
Uli Fahrenberg and
Axel Legay Contract-Based Requirement
Modularization via Synthesis of Correct
Decompositions . . . . . . . . . . . . . 33:1--33:??
Seungmin Rho and
Wenny Rahayu and
Geyong Min Guest Editorial: Challenges of Embedded
Systems as They Evolve into M2M,
Internet of Things . . . . . . . . . . . 34:1--34:??
Jing Zeng and
Laurence T. Yang and
Jianhua Ma A System-Level Modeling and Design for
Cyber-Physical-Social Systems . . . . . 35:1--35:??
Daqiang Zhang and
Jiafu Wan and
Zongjian He and
Shengjie Zhao and
Ke Fan and
Sang Oh Park and
Zhibin Jiang Identifying Region-Wide Functions Using
Urban Taxicab Trajectories . . . . . . . 36:1--36:??
Wen Ji and
Bo-Wei Chen and
Xiangdong Wang and
Haiyong Luo and
Mucheol Kim and
Yiqiang Chen Cross-Layer Opportunistic Scheduling for
Device-to-Device Video Multicast
Services . . . . . . . . . . . . . . . . 37:1--37:??
Lu Liu and
Nick Antonopoulos and
Minghui Zheng and
Yongzhao Zhan and
Zhijun Ding A Socioecological Model for Advanced
Service Discovery in Machine-to-Machine
Communication Networks . . . . . . . . . 38:1--38:??
Awais Ahmad and
Anand Paul and
Mazhar Rathore and
Hangbae Chang An Efficient Multidimensional Big Data
Fusion Approach in Machine-to-Machine
Communication . . . . . . . . . . . . . 39:1--39:??
Eui-Jik Kim and
Jung-Hyok Kwon and
Ken Choi and
Taeshik Shon Unified Medium Access Control
Architecture for Resource-Constrained
Machine-to-Machine Devices . . . . . . . 40:1--40:??
Gianluca Franchino and
Giorgio Buttazzo and
Mauro Marinoni Bandwidth Optimization and Energy
Management in Real-Time Wireless
Networks . . . . . . . . . . . . . . . . 41:1--41:??
Sandeep K. Shukla Editorial: Fence Itself Grazing the
Field --- Security from the Sentries . . 41:1--41:??
Yichuan Wang and
Xin Liu and
Cheng-Hsin Hsu UPDATE: User-Profile-Driven Adaptive
TransfEr for Mobile Devices . . . . . . 42:1--42:??
Efstathios Sotiriou-Xanthopoulos and
Sotirios Xydis and
Kostas Siozios and
George Economakos and
Dimitrios Soudris An Integrated Exploration and Virtual
Platform Framework for Many-Accelerator
Heterogeneous Systems . . . . . . . . . 43:1--43:??
Ivan Beretta and
Vincenzo Rana and
Abdulkadir Akin and
Alessandro Antonio Nacci and
Donatella Sciuto and
David Atienza Parallelizing the Chambolle Algorithm
for Performance-Optimized Mapping on
FPGA Devices . . . . . . . . . . . . . . 44:1--44:??
Kartik Nagar and
Y. N. Srikant Fast and Precise Worst-Case Interference
Placement for Shared Cache Analysis . . 45:1--45:??
Renan Augusto Starke and
Andreu Carminati and
Rômulo Silva De Oliveira Evaluating the Design of a VLIW
Processor for Real-Time Systems . . . . 46:1--46:??
Sang-Hoon Kim and
Jinkyu Jeong and
Jin-Soo Kim and
Seungryoul Maeng SmartLMK: a Memory Reclamation Scheme
for Improving User-Perceived App Launch
Time . . . . . . . . . . . . . . . . . . 47:1--47:??
Dongwon Kim and
Yohan Chon and
Wonwoo Jung and
Yungeun Kim and
Hojung Cha Accurate Prediction of Available Battery
Time for Mobile Applications . . . . . . 48:1--48:??
Rehan Ahmed and
Parameswaran Ramanathan and
Kewal K. Saluja Necessary and Sufficient Conditions for
Thermal Schedulability of Periodic
Real-Time Tasks Under Fluid Scheduling
Model . . . . . . . . . . . . . . . . . 49:1--49:??
Fang Li and
Jiafu Wan and
Ping Zhang and
Di Li and
Daqiang Zhang and
Keliang Zhou Usage-Specific Semantic Integration for
Cyber-Physical Robot Systems . . . . . . 50:1--50:??
Xin An and
Eric Rutten and
Jean-Philippe Diguet and
Abdoulaye Gamatié Model-Based Design of Correct
Controllers for Dynamically
Reconfigurable Architectures . . . . . . 51:1--51:??
Allaa R. Hilal and
Otman Basir A Collaborative Energy-Aware Sensor
Management System Using Team Theory . . 52:1--52:??
Theo Ungerer and
Christian Bradatsch and
Martin Frieb and
Florian Kluge and
Jörg Mische and
Alexander Stegmeier and
Ralf Jahr and
Mike Gerdes and
Pavel Zaykov and
Lucie Matusova and
Zai Jian Jia Li and
Zlatko Petrov and
Bert Böddeker and
Sebastian Kehr and
Hans Regler and
Andreas Hugl and
Christine Rochange and
Haluk Ozaktas and
Hugues Cassé and
Armelle Bonenfant and
Pascal Sainrat and
Nick Lay and
David George and
Ian Broster and
Eduardo Quiñones and
Milos Panic and
Jaume Abella and
Carles Hernandez and
Francisco Cazorla and
Sascha Uhrig and
Mathias Rohde and
Arthur Pyka Parallelizing Industrial Hard Real-Time
Applications for the parMERASA Multicore 53:1--53:??
Bogdan Tanasa and
Unmesh D. Bordoloi and
Petru Eles and
Zebo Peng Correlation-Aware Probabilistic Timing
Analysis for the Dynamic Segment of
FlexRay . . . . . . . . . . . . . . . . 54:1--54:??
Ming-Chang Yang and
Yuan-Hao Chang and
Che-Wei Tsao Byte-Addressable Update Scheme to
Minimize the Energy Consumption of
PCM-Based Storage Systems . . . . . . . 55:1--55:??
Biao Hu and
Kai Huang and
Gang Chen and
Long Cheng and
Alois Knoll Evaluation and Improvements of Runtime
Monitoring Methods for Real-Time Event
Streams . . . . . . . . . . . . . . . . 56:1--56:??
Yaojie Lu and
Seyedamin Rooholamin and
Sotirios G. Ziavras Vector Coprocessor Virtualization for
Simultaneous Multithreading . . . . . . 57:1--57:??
Hwajeong Seo and
Zhe Liu and
Yasuyuki Nogami and
Jongseok Choi and
Howon Kim Hybrid Montgomery Reduction . . . . . . 58:1--58:??
Iason Filippopoulos and
Namita Sharma and
Francky Catthoor and
Per Gunnar Kjeldsberg and
Preeti Ranjan Panda Integrated Exploration Methodology for
Data Interleaving and Data-to-Memory
Mapping on SIMD Architectures . . . . . 59:1--59:??
Ronaldo R. Ferreira and
Gabriel L. Nazar and
Jean Da Rolt and
Álvaro F. Moreira and
Luigi Carro Live-Out Register Fencing:
Interrupt-Triggered Soft Error
Correction Based on the Elimination of
Register-to-Register Communication . . . 60:1--60:??
Ayesha Khalid and
Goutam Paul and
Anupam Chattopadhyay and
Faezeh Abediostad and
Syed Imad Ud Din and
Muhammad Hassan and
Baishik Biswas and
Prasanna Ravi RunStream: a High-Level Rapid
Prototyping Framework for Stream Ciphers 61:1--61:??
Sandeep K. Shukla Editorial: Security of Embedded Systems
and Cyber Irons --- Embedded Systems for
Security . . . . . . . . . . . . . . . . 62:1--62:??
Petru Eles and
Rolf Ernst Guest Editorial for Special Issue of
ESWEEK 2015 . . . . . . . . . . . . . . 63:1--63:??
Yi-Ping You and
Szu-Chien Chen VecRA: a Vector-Aware Register Allocator
for GPU Shader Processors . . . . . . . 64:1--64:??
Weichen Liu and
Chunhua Xiao An Efficient Technique of Application
Mapping and Scheduling on Real-Time
Multiprocessor Systems for Throughput
Optimization . . . . . . . . . . . . . . 65:1--65:??
Karthi Duraisamy and
Hao Lu and
Partha Pratim Pande and
Ananth Kalyanaraman High-Performance and Energy-Efficient
Network-on-Chip Architectures for Graph
Analytics . . . . . . . . . . . . . . . 66:1--66:??
Florian Kriebel and
Semeen Rehman and
Arun Subramaniyan and
Segnon Jean Bruno Ahandagbe and
Muhammad Shafique and
Jörg Henkel Reliability-Aware Adaptations for Shared
Last-Level Caches in Multi-Cores . . . . 67:1--67:??
Jelena Spasic and
Di Liu and
Emanuele Cannella and
Todor Stefanov On the Improved Hard Real-Time
Scheduling of Cyclo-Static Dataflow . . 68:1--68:??
Xavier Allamigeon and
Stéphane Gaubert and
Nikolas Stott and
Éric Goubault and
Sylvie Putot A Scalable Algebraic Method to Infer
Quadratic Invariants of Switched Systems 69:1--69:??
Xueguang Wu and
Liqian Chen and
Antoine Miné and
Wei Dong and
Ji Wang Static Analysis of Runtime Errors in
Interrupt-Driven Programs via
Sequentialization . . . . . . . . . . . 70:1--70:??
Guillaume Baudart and
Albert Benveniste and
Timothy Bourke Loosely Time-Triggered Architectures:
Improvements and Comparisons . . . . . . 71:1--71:??
Jie Shen and
Yingjue Cai and
Yang Ren and
Xiao Yang A Universal Application Storage System
Based on Smart Card . . . . . . . . . . 72:1--72:??
Hadeer A. Hassan and
Sameh A. Salem and
Ahmed M. Mostafa and
E. M. Saad Harmonic Segment-Based Semi-Partitioning
Scheduling on Multi-Core Real-Time
Systems . . . . . . . . . . . . . . . . 73:1--73:??
Chin-Hsien Wu and
Syuan-An Chen JOM: a Joint Operation Mechanism for
NAND Flash Memory . . . . . . . . . . . 74:1--74:??
Wei Ming Chiew and
Feng Lin and
Hock Soon Seah A Novel Embedded Interpolation Algorithm
with Negative Squared Distance for
Real-Time Endomicroscopy . . . . . . . . 75:1--75:??
Chun-Han Lin and
Chih-Kai Kang and
Pi-Cheng Hsiu CURA: a Framework for Quality-Retaining
Power Saving on Mobile OLED Displays . . 76:1--76:??
Josiah Hester and
Nicole Tobias and
Amir Rahmati and
Lanny Sitanayah and
Daniel Holcomb and
Kevin Fu and
Wayne P. Burleson and
Jacob Sorber Persistent Clocks for Batteryless
Sensing Devices . . . . . . . . . . . . 77:1--77:??
Kai Xi and
Jiankun Hu and
B. V. K. Vijaya Kumar FE-SViT: a SViT-Based Fuzzy Extractor
Framework . . . . . . . . . . . . . . . 78:1--78:??
Pierre Olivier and
Jalil Boukhobza and
Eric Senn and
Hamza Ouarnoughi A Methodology for Estimating Performance
and Power Consumption of Embedded Flash
File Systems . . . . . . . . . . . . . . 79:1--79:??
Sandeep K. Shukla Editorial: Distributed Public Ledgers
and Block Chains --- What Good Are They
for Embedded Systems? . . . . . . . . . 1:1--1:2
Jeronimo Castrillon and
Cristina Silvano Guest Editorial: Special Issue on
Virtual Prototyping of Parallel and
Embedded Systems (ViPES) . . . . . . . . 2:1--2:??
Daniele Bortolotti and
Andrea Marongiu and
Luca Benini VirtualSoC: a Research Tool for Modern
MPSoCs . . . . . . . . . . . . . . . . . 3:1--3:??
Philipp Wehner and
Jens Rettkowski and
Tobias Kalb and
Diana Göhringer Simulating Reconfigurable Multiprocessor
Systems-on-Chip with MPSoCSim . . . . . 4:1--4:??
Christian Sauer and
Hans-Peter Loeb A Lightweight Framework for the Dynamic
Creation and Configuration of Virtual
Platforms in SystemC . . . . . . . . . . 5:1--5:??
Rolf Meyer and
Jan Wagner and
Bastian Farkas and
Sven Horsinka and
Patrick Siegl and
Rainer Buchty and
Mladen Berekovic A Scriptable Standard-Compliant
Reporting and Logging Framework for
SystemC . . . . . . . . . . . . . . . . 6:1--6:??
Luis Gabriel Murillo and
R\`obert Lajos Bücs and
Rainer Leupers and
Gerd Ascheid MPSoC Software Debugging on Virtual
Platforms via Execution Control with
Event Graphs . . . . . . . . . . . . . . 7:1--7:??
Efstathios Sotiriou-Xanthopoulos and
Sotirios Xydis and
Kostas Siozios and
George Economakos and
Dimitrios Soudris A Framework for Interconnection-Aware
Domain-Specific Many-Accelerator
Synthesis . . . . . . . . . . . . . . . 8:1--8:??
Dakai Zhu and
Meikang Qiu and
Samarjit Chakraborty Guest Editorial: Special Issue on
Emerging Technologies in Embedded
Software and Systems . . . . . . . . . . 9:1--9:??
Hrishikesh Jayakumar and
Arnab Raha and
Vijay Raghunathan Sleep-Mode Voltage Scaling: Enabling
SRAM Data Retention at Ultra-Low Power
in Embedded Microcontrollers . . . . . . 10:1--10:??
Stephen Marz and
Brad Vander Zanden Reducing Power Consumption and Latency
in Mobile Devices Using an Event Stream
Model . . . . . . . . . . . . . . . . . 11:1--11:??
Renhai Chen and
Yi Wang and
Jingtong Hu and
Duo Liu and
Zili Shao and
Yong Guan Image-Content-Aware I/O Optimization for
Mobile Virtualization . . . . . . . . . 12:1--12:??
Zonghua Gu and
Chao Wang and
Haibo Zeng Cache-Partitioned Preemption Threshold
Scheduling . . . . . . . . . . . . . . . 13:1--13:??
Biao Hu and
Kai Huang and
Gang Chen and
Long Cheng and
Alois Knoll Adaptive Workload Management in
Mixed-Criticality Systems . . . . . . . 14:1--14:??
Cumhur Erkan Tuncali and
Georgios Fainekos and
Yann-Hang Lee Automatic Parallelization of Multirate
Block Diagrams of Control Systems on
Multicore Platforms . . . . . . . . . . 15:1--15:??
Edoardo Fusella and
Alessandro Cilardo Crosstalk-Aware Automated Mapping for
Optical Networks-on-Chip . . . . . . . . 16:1--16:??
Yuki Iida and
Yusuke Fujii and
Takuya Azumi and
Nobuhiko Nishio and
Shinpei Kato GPUrpc: Exploring Transparent Access to
Remote GPUs . . . . . . . . . . . . . . 17:1--17:??
Kun Wang and
Miao Du and
Dejun Yang and
Chunsheng Zhu and
Jian Shen and
Yan Zhang Game-Theory-Based Active Defense for
Intrusion Detection in Cyber-Physical
Embedded Systems . . . . . . . . . . . . 18:1--18:??
Song Tan and
Wen-Zhan Song and
Steve Yothment and
Junjie Yang and
Lang Tong ScorePlus: a Software-Hardware Hybrid
and Federated Experiment Environment for
Smart Grid . . . . . . . . . . . . . . . 19:1--19:??
Charvi A. Majmudar and
Bashir I. Morshed Autonomous OA Removal in Real-Time from
Single Channel EEG Data on a Wearable
Device Using a Hybrid Algebraic-Wavelet
Algorithm . . . . . . . . . . . . . . . 20:1--20:??
Yuan-Hung Kuan and
Yuan-Hao Chang and
Tseng-Yi Chen and
Po-Chun Huang and
Kam-Yiu Lam Space-Efficient Index Scheme for
PCM-Based Multiversion Databases in
Cyber-Physical Systems . . . . . . . . . 21:1--21:??
Yusuf Bora Kartal and
Ece Güran Schmidt and
Klaus Werner Schmidt Modeling Distributed Real-Time Systems
in TIOA and UPPAAL . . . . . . . . . . . 22:1--22:??
Sedigheh Asyaban and
Mehdi Kargahi and
Lothar Thiele and
Morteza Mohaqeqi Analysis and Scheduling of a
Battery-Less Mixed-Criticality System
with Energy Uncertainty . . . . . . . . 23:1--23:??
Kanchan Manna and
Shivam Swami and
Santanu Chattopadhyay and
Indranil Sengupta Integrated Through-Silicon Via Placement
and Application Mapping for $3$D
Mesh-Based NoC Design . . . . . . . . . 24:1--24:??
Hossein Tajik and
Bryan Donyanavard and
Nikil Dutt and
Janmartin Jahn and
Jörg Henkel SPMPool: Runtime SPM Management for
Memory-Intensive Applications in
Embedded Many-Cores . . . . . . . . . . 25:1--25:??
Stefan Schürmans and
Gereon Onnebrink and
Rainer Leupers and
Gerd Ascheid and
Xiaotao Chen Frequency-Aware ESL Power Estimation for
ARM Cortex-A9 Using a Black Box
Processor Model . . . . . . . . . . . . 26:1--26:??
Jan Henrik Weinstock and
Luis Gabriel Murillo and
Rainer Leupers and
Gerd Ascheid Parallel SystemC Simulation for ESL
Design . . . . . . . . . . . . . . . . . 27:1--27:??
Sandeep K. Shukla Editorial: Continuing the Course . . . . 28:1--28:??
Sebastian Fischmeister and
Jason Xue Guest Editorial: Special Issue on LCTES
2015 . . . . . . . . . . . . . . . . . . 29:1--29:??
Marcos Aurélio Pinto Cunha and
Omayma Matoussi and
Frédéric Pétrot Detecting Software Cache Coherence
Violations in MPSoC Using Traces
Captured on Virtual Platforms . . . . . 30:1--30:??
Wenguang Zheng and
Hui Wu Dynamic Data-Cache Locking for
Minimizing the WCET of a Single Task . . 31:1--31:??
Qingrui Liu and
Changhee Jung and
Dongyoon Lee and
Devesh Tiwari Compiler-Directed Soft Error Detection
and Recovery to Avoid DUE and SDC via
Tail-DMR . . . . . . . . . . . . . . . . 32:1--32:??
Adam Procter and
William L. Harrison and
Ian Graves and
Michela Becchi and
Gerard Allwein A Principled Approach to Secure
Multi-core Processor Design with ReWire 33:1--33:??
Li-Pin Chang and
Po-Han Sung and
Po-Tsang Chen and
Po-Hung Chen Eager Synching: a Selective Logging
Strategy for Fast fsync() on Flash-Based
Android Devices . . . . . . . . . . . . 34:1--34:??
Christian Dietrich and
Martin Hoffmann and
Daniel Lohmann Global Optimization of Fixed-Priority
Real-Time Systems by RTOS-Aware
Control-Flow Analysis . . . . . . . . . 35:1--35:??
Jing Liu and
Kenli Li and
Dakai Zhu and
Jianjun Han and
Keqin Li Minimizing Cost of Scheduling Tasks on
Heterogeneous Multicore Embedded Systems 36:1--36:??
Ivan Llopard and
Christian Fabre and
Albert Cohen From a Formalized Parallel Action
Language to Its Efficient Code
Generation . . . . . . . . . . . . . . . 37:1--37:??
Stanislav Manilov and
Björn Franke and
Anthony Magrath and
Cedric Andrieu Free Rider: a Source-Level
Transformation Tool for Retargeting
Platform-Specific Intrinsic Functions 38:1--38:??
Jing Zeng and
Laurence T. Yang and
Man Lin and
Zili Shao and
Dakai Zhu System-Level Design Optimization for
Security-Critical Cyber-Physical-Social
Systems . . . . . . . . . . . . . . . . 39:1--39:??
Stefan Haar and
Roland Meyer Message from the Guest Editors . . . . . 40:1--40:??
Ferenc Bujtor and
Lev Sorokin and
Walter Vogler Testing Preorders for dMTS: Deadlock-
and the New Deadlock-/Divergence Testing 41:1--41:??
Stefan Vijzelaar and
Wan Fokkink Multi-valued Simulation and Abstraction
Using Lattice Operations . . . . . . . . 42:1--42:??
Étienne André and
Thomas Chatain and
César Rodríguez Preserving Partial-Order Runs in
Parametric Time Petri Nets . . . . . . . 43:1--43:??
Béatrice Bérard and
Lo\"\ic Hélouët and
John Mullins Non-interference in Partial Order Models 44:1--44:??
Olli Saarikivi and
Hernán Ponce-De-León and
Kari Kähkönen and
Keijo Heljanko and
Javier Esparza Minimizing Test Suites with Unfoldings
of Multithreaded Programs . . . . . . . 45:1--45:??
Antti Valmari Stop It, and Be Stubborn! . . . . . . . 46:1--46:??
Tobias Isenberg Incremental Inductive Verification of
Parameterized Timed Systems . . . . . . 47:1--47:??
Antti Siirtola and
Stavros Tripakis and
Keijo Heljanko When Do We Not Need Complex
Assume-Guarantee Rules? . . . . . . . . 48:1--48:??
Qi Tang and
Twan Basten and
Marc Geilen and
Sander Stuijk and
Ji-Bo Wei Task-FIFO Co-Scheduling of Streaming
Applications on MPSoCs with Predictable
Memory Hierarchy . . . . . . . . . . . . 49:1--49:??
Kim-Kwang Raymond Choo and
Yunsi Fei and
Yang Xiang and
Yu Yu Embedded Device Forensics and Security 50:1--50:??
Deepak Puthal and
Surya Nepal and
Rajiv Ranjan and
Jinjun Chen DLSeF: a Dynamic Key-Length-Based
Efficient Real-Time Security
Verification Model for Big Data Stream 51:1--51:??
Jun Song and
Fan Yang and
Kim-Kwang Raymond Choo and
Zhijian Zhuang and
Lizhe Wang SIPF: a Secure Installment Payment
Framework for Drive-Thru Internet . . . 52:1--52:??
Zhe Liu and
Jian Weng and
Zhi Hu and
Hwajeong Seo Efficient Elliptic Curve Cryptography
for Embedded Devices . . . . . . . . . . 53:1--53:??
Shan Fu and
Guoai Xu and
Juan Pan and
Zongyue Wang and
An Wang Differential Fault Attack on ITUbee
Block Cipher . . . . . . . . . . . . . . 54:1--54:??
Yang Li and
Mengting Chen and
Zhe Liu and
Jian Wang Reduction in the Number of Fault
Injections for Blind Fault Attack on SPN
Block Ciphers . . . . . . . . . . . . . 55:1--55:??
Arcangelo Castiglione and
Raffaele Pizzolante and
Francesco Palmieri and
Barbara Masucci and
Bruno Carpentieri and
Alfredo De Santis and
Aniello Castiglione On-Board Format-Independent Security of
Functional Magnetic Resonance Images . . 56:1--56:??
Jianghua Liu and
Jinhua Ma and
Wei Wu and
Xiaofeng Chen and
Xinyi Huang and
Li Xu Protecting Mobile Health Records in
Cloud Computing: a Secure, Efficient,
and Anonymous Design . . . . . . . . . . 57:1--57:??
Wei Wang and
Peng Xu and
Laurence Tianruo Yang and
Willy Susilo and
Jinjun Chen Securely Reinforcing Synchronization for
Embedded Online Contests . . . . . . . . 58:1--58:??
Mehran Mozaffari-Kermani and
Reza Azarderakhsh and
Anita Aghaie Fault Detection Architectures for
Post-Quantum Cryptographic Stateless
Hash-Based Secure Signatures Benchmarked
on ASIC . . . . . . . . . . . . . . . . 59:1--59:??
Keke Gai and
Longfei Qiu and
Min Chen and
Hui Zhao and
Meikang Qiu SA--EAST: Security-Aware Efficient Data
Transmission for ITS in Mobile
Heterogeneous Cloud Computing . . . . . 60:1--60:??
Junliang Shu and
Yuanyuan Zhang and
Juanru Li and
Bodong Li and
Dawu Gu Why Data Deletion Fails? A Study on
Deletion Flaws and Data Remanence in
Android Systems . . . . . . . . . . . . 61:1--61:??
Sandeep K. Shukla Editorial: Cyber Security, IoT, Block
Chains-Risks and Opportunities . . . . . 62:1--62:??
Marilyn Wolf and
Jason Xue Guest Editorial: Special Issue on
Embedded Computing for IoT . . . . . . . 63:1--63:??
Giuseppe Ateniese and
Giuseppe Bianchi and
Angelo T. Capossele and
Chiara Petrioli and
Dora Spenza Low-Cost Standard Signatures for
Energy-Harvesting Wireless Sensor
Networks . . . . . . . . . . . . . . . . 64:1--64:??
Hrishikesh Jayakumar and
Arnab Raha and
Jacob R. Stevens and
Vijay Raghunathan Energy-Aware Memory Mapping for Hybrid
FRAM--SRAM MCUs in
Intermittently-Powered IoT Devices . . . 65:1--65:??
Marco Tiloca and
Kirill Nikitin and
Shahid Raza Axiom: DTLS-Based Secure IoT Group
Communication . . . . . . . . . . . . . 66:1--66:??
Urbi Chatterjee and
Rajat Subhra Chakraborty and
Debdeep Mukhopadhyay A PUF-Based Secure Communication
Protocol for IoT . . . . . . . . . . . . 67:1--67:??
Anfeng Liu and
Xiao Liu and
Zhipeng Tang and
Laurence T. Yang and
Zili Shao Preserving Smart Sink-Location Privacy
with Delay Guaranteed Routing Scheme for
WSNs . . . . . . . . . . . . . . . . . . 68:1--68:??
Terrell R. Bennett and
Nicholas Gans and
Roozbeh Jafari Data-Driven Synchronization for
Internet-of-Things Systems . . . . . . . 69:1--69:??
Zhaoyan Shen and
Zhijian He and
Shuai Li and
Qixin Wang and
Zili Shao A Multi-Quadcopter Cooperative
Cyber-Physical System for Timely Air
Pollution Localization . . . . . . . . . 70:1--70:??
Jian Wu and
Roozbeh Jafari Seamless Vision-assisted Placement
Calibration for Wearable Inertial
Sensors . . . . . . . . . . . . . . . . 71:1--71:??
Bo-Wei Chen and
Wen Ji and
Zhu Li Guest Editorial for ACM TECS Special
Issue on Effective Divide-and-Conquer,
Incremental, or Distributed Mechanisms
of Embedded Designs for Extremely Big
Data in Large-Scale Devices . . . . . . 72:1--72:??
Anfeng Liu and
Xiao Liu and
Tianyi Wei and
Laurence T. Yang and
Seungmin (Charlie) Rho and
Anand Paul Distributed Multi-Representative
Re-Fusion Approach for Heterogeneous
Sensing Data Collection . . . . . . . . 73:1--73:??
Xiaogang Chen and
Z. Jane Wang and
Xiangyang Ji A Load-Balancing Divide-and-Conquer SVM
Solver . . . . . . . . . . . . . . . . . 74:1--74:??
Bo Liu and
Xiao-Tong Yuan and
Yang Yu and
Qingshan Liu and
Dimitris N. Metaxas Parallel Sparse Subspace Clustering via
Joint Sample and Parameter Blockwise
Partition . . . . . . . . . . . . . . . 75:1--75:??
Sun-Yuan Kung and
Thee Chanyaswad and
J. Morris Chang and
Peiyuan Wu Collaborative PCA/DCA Learning Methods
for Compressive Privacy . . . . . . . . 76:1--76:??
Tom Fleming and
Huang-Ming Huang and
Alan Burns and
Chris Gill and
Sanjoy Baruah and
Chenyang Lu Corrections to and Discussion of
``Implementation and Evaluation of
Mixed-criticality Scheduling Approaches
for Sporadic Tasks'' . . . . . . . . . . 77:1--77:??
Hasna Bouraoui and
Chadlia Jerad and
Anupam Chattopadhyay and
Nejib Ben Hadj-Alouane Hardware Architectures for Embedded
Speaker Recognition Applications: a
Survey . . . . . . . . . . . . . . . . . 78:1--78:??
Ye Xu and
Israel Koren and
C. Mani Krishna AdaFT: a Framework for Adaptive Fault
Tolerance for Cyber-Physical Systems . . 79:1--79:??
Daniele Jahier Pagliari and
Mario R. Casu and
Luca P. Carloni Accelerators for Breast Cancer Detection 80:1--80:??
Jiunn-Yeu Chen and
Wuu Yang and
Wei-Chung Hsu and
Bor-Yeh Shen and
Quan-Huei Ou On Static Binary Translation of
ARM/Thumb Mixed ISA Binaries . . . . . . 81:1--81:??
Wilson M. Tan and
Paul Sullivan and
Hamish Watson and
Joanna Slota-Newson and
Stephen A. Jarvis An Indoor Test Methodology for
Solar-Powered Wireless Sensor Networks 82:1--82:??
Tseng-Yi Chen and
Yuan-Hao Chang and
Shuo-Han Chen and
Nien-I Hsu and
Hsin-Wen Wei and
Wei-Kuan Shih On Space Utilization Enhancement of File
Systems for Embedded Storage Systems . . 83:1--83:??
Aaron Landy and
Greg Stitt Serial Arithmetic Strategies for
Improving FPGA Throughput . . . . . . . 84:1--84:??
Rajeev Alur and
Vojtech Forejt and
Salar Moarref and
Ashutosh Trivedi Schedulability of Bounded-Rate Multimode
Systems . . . . . . . . . . . . . . . . 85:1--85:??
Maryam Bandari and
Robert Simon and
Hakan Aydin DMS-Based Energy Optimizations for
Clustered WSNs . . . . . . . . . . . . . 86:1--86:??
Rajesh Devaraj and
Arnab Sarkar and
Santosh Biswas Fault-Tolerant Preemptive Aperiodic RT
Scheduling by Supervisory Control of
TDES on Multiprocessors . . . . . . . . 87:1--87:??
Qining Lu and
Guanpeng Li and
Karthik Pattabiraman and
Meeta S. Gupta and
Jude A. Rivers Configurable Detection of SDC-causing
Errors in Programs . . . . . . . . . . . 88:1--88:??
Guoxian Huang and
Lei Wang An FPGA-Based Architecture for
High-Speed Compressed Signal
Reconstruction . . . . . . . . . . . . . 89:1--89:??
Bogdan Groza and
Stefan Murvay and
Anthony Van Herrewege and
Ingrid Verbauwhede LiBrA--CAN: Lightweight Broadcast
Authentication for Controller Area
Networks . . . . . . . . . . . . . . . . 90:1--90:??
Sandeep K. Shukla Editorial: Security of Mobile Devices 91:1--91:??
Jimson Mathew and
Rajat Subhra Chakraborty and
Dhiraj K. Pradhan Guest Editorial: Special Issue on
``Secure and Fault-Tolerant Embedded
Computing'' . . . . . . . . . . . . . . 92:1--92:??
Yohan Ko and
Reiley Jeyapaul and
Youngbin Kim and
Kyoungwoo Lee and
Aviral Shrivastava Protecting Caches from Soft Errors: a
Microarchitect's Perspective . . . . . . 93:1--93:??
Stefano Esposito and
Massimo Violante and
Marco Sozzi and
Marco Terrone and
Massimo Traversone A Novel Method for Online Detection of
Faults Affecting Execution-Time in
Multicore-Based Systems . . . . . . . . 94:1--94:??
Bilgiday Yuce and
Nahid Farhady Ghalaty and
Chinmay Deshpande and
Harika Santapuri and
Conor Patrick and
Leyla Nazhandali and
Patrick Schaumont Analyzing the Fault Injection
Sensitivity of Secure Embedded Software 95:1--95:??
Maria Isabel Mera and
Jonah Caplan and
Seyyed Hasan Mozafari and
Brett H. Meyer and
Peter Milder Area, Throughput, and Power Trade-Offs
for FPGA- and ASIC-Based Execution
Stream Compression . . . . . . . . . . . 96:1--96:??
Kabland Toussaint Gautier Tigori and
Jean-Luc Béchennec and
Sébastien Faucou and
Olivier Henri Roux Formal Model-Based Synthesis of
Application-Specific Static RTOS . . . . 97:1--97:??
Francisco Sant'anna and
Roberto Ierusalimschy and
Noemi Rodriguez and
Silvana Rossetto and
Adriano Branco The Design and Implementation of the
Synchronous Language CéU . . . . . . . . 98:1--98:26
Isabella Stilkerich and
Clemens Lang and
Christoph Erhardt and
Christian Bay and
Michael Stilkerich The Perfect Getaway: Using Escape
Analysis in Embedded Real-Time Systems 99:1--99:30
Mohamed Hassan and
Hiren Patel and
Rodolfo Pellizzoni PMC: a Requirement-Aware DRAM Controller
for Multicore Mixed Criticality Systems 100:1--100:??
Tianyi Wang and
Soamar Homsi and
Linwei Niu and
Shaolei Ren and
Ou Bai and
Gang Quan and
Meikang Qiu Harmonicity-Aware Task Partitioning for
Fixed Priority Scheduling of
Probabilistic Real-Time Tasks on
Multi-Core Platforms . . . . . . . . . . 101:1--101:??
Yi Wang and
Yajun Ha A DFA-Resistant and Masked PRESENT with
Area Optimization for RFID Applications 102:1--102:??
Kartik Nagar and
Y. N. Srikant Refining Cache Behavior Prediction Using
Cache Miss Paths . . . . . . . . . . . . 103:1--103:??
Massimo Benerecetti and
Marco Faella Automatic Synthesis of Switching
Controllers for Linear Hybrid Systems:
Reachability Control . . . . . . . . . . 104:1--104:??
Nathan Sandoval and
Casey Mackin and
Sean Whitsitt and
Vijay Shankar Gopinath and
Sachidanand Mahadevan and
Andrew Milakovich and
Kyle Merry and
Jonathan Sprinkle and
Roman Lysecky Task Transition Scheduling for
Data-Adaptable Systems . . . . . . . . . 105:1--105:??
Xi Zheng and
Christine Julien and
Hongxu Chen and
Rodion Podorozhny and
Franck Cassez Real-Time Simulation Support for Runtime
Verification of Cyber-Physical Systems 106:1--106:??
Kaisheng Ma and
Xueqing Li and
Huichu Liu and
Xiao Sheng and
Yiqun Wang and
Karthik Swaminathan and
Yongpan Liu and
Yuan Xie and
John Sampson and
Vijaykrishnan Narayanan Dynamic Power and Energy Management for
Energy Harvesting Nonvolatile Processor
Systems . . . . . . . . . . . . . . . . 107:1--107:??
Navonil Chatterjee and
Suraj Paul and
Santanu Chattopadhyay Fault-Tolerant Dynamic Task Mapping and
Scheduling for Network-on-Chip-Based
Multicore Platform . . . . . . . . . . . 108:1--108:??
Prashant Ahir and
Mehran Mozaffari-Kermani and
Reza Azarderakhsh Lightweight Architectures for Reliable
and Fault Detection Simon and Speck
Cryptographic Algorithms on FPGA . . . . 109:1--109:??
Chen Pan and
Mimi Xie and
Chengmo Yang and
Yiran Chen and
Jingtong Hu Exploiting Multiple Write Modes of
Nonvolatile Main Memory in Embedded
Systems . . . . . . . . . . . . . . . . 110:1--110:??
Yu Li and
Albert M. K. Cheng Toward a Practical Regularity-based
Model: The Impact of Evenly Distributed
Temporal Resource Partitions . . . . . . 111:1--111:??
Yooseong Kim and
David Broman and
Aviral Shrivastava WCET-Aware Function-Level Dynamic Code
Management on Scratchpad Memory . . . . 112:1--112:??
Guanjun Liu and
Mengchu Zhou and
Changjun Jiang Petri Net Models and Collaborativeness
for Parallel Processes with Resource
Sharing and Message Passing . . . . . . 113:1--113:??
Michal Ciszewski and
Konrad Iwanicki Efficient Automated Code Partitioning
for Microcontrollers with Switchable
Memory Banks . . . . . . . . . . . . . . 114:1--114:??
Yun Liang and
Xiuhong Li Efficient Kernel Management on GPUs . . 115:1--115:??
Yuliang Sun and
Lanjun Wang and
Chen Wang and
Yu Wang Exploiting Stable Data Dependency in
Stream Processing Acceleration on FPGAs 116:1--116:??
Zhe Liu and
Thomas Pöppelmann and
Tobias Oder and
Hwajeong Seo and
Sujoy Sinha Roy and
Tim Güneysu and
Johann Großschädl and
Howon Kim and
Ingrid Verbauwhede High-Performance Ideal Lattice-Based
Cryptography on $8$-Bit AVR
Microcontrollers . . . . . . . . . . . . 117:1--117:??
Avinash Malik and
Partha S. Roop and
Sidharta Andalam and
Mark Trew and
Michael Mendler Modular Compilation of Hybrid Systems
for Emulation and Large Scale Simulation 118:1--118:??
Gabriel Hjort Blindell and
Mats Carlsson and
Roberto Castañeda Lozano and
Christian Schulte Complete and Practical Universal
Instruction Selection . . . . . . . . . 119:1--119:??
Xuesong Su and
Hui Wu and
Jingling Xue An Efficient WCET-Aware Instruction
Scheduling and Register Allocation
Approach for Clustered VLIW Processors 120:1--120:??
Paul-Jules Micolet and
Aaron Smith and
Christophe Dubach A Study of Dynamic Phase Adaptation
Using a Dynamic Multicore Processor . . 121:1--121:??
Roman Trüb and
Georgia Giannopoulou and
Andreas Tretter and
Lothar Thiele Implementation of Partitioned
Mixed-Criticality Scheduling on a
Multi-Core Platform . . . . . . . . . . 122:1--122:??
Ujjwal Gupta and
Chetan Arvind Patil and
Ganapati Bhat and
Prabhat Mishra and
Umit Y. Ogras DyPO: Dynamic Pareto-Optimal
Configuration Selection for
Heterogeneous MpSoCs . . . . . . . . . . 123:1--123:??
Vignyan Reddy Kothinti Naresh and
Dibakar Gope and
Mikko H. Lipasti The CURE: Cluster Communication Using
Registers . . . . . . . . . . . . . . . 124:1--124:??
Lana Josipovic and
Philip Brisk and
Paolo Ienne An Out-of-Order Load-Store Queue for
Spatial Computing . . . . . . . . . . . 125:1--125:??
Brian Crites and
Karen Kong and
Philip Brisk Diagonal Component Expansion for
Flow-Layer Placement of Flow-Based
Microfluidic Biochips . . . . . . . . . 126:1--126:??
Mahmoud Elfar and
Zhanwei Zhong and
Zipeng Li and
Krishnendu Chakrabarty and
Miroslav Pajic Synthesis of Error-Recovery Protocols
for Micro-Electrode-Dot-Array Digital
Microfluidic Biochips . . . . . . . . . 127:1--127:??
Mark Gottscho and
Irina Alam and
Clayton Schoeny and
Lara Dolecek and
Puneet Gupta Low-Cost Memory Fault Tolerance for IoT
Devices . . . . . . . . . . . . . . . . 128:1--128:??
Hasan Erdem Yantir and
Ahmed M. Eltawil and
Fadi J. Kurdahi Approximate Memristive In-memory
Computing . . . . . . . . . . . . . . . 129:1--129:??
Arnab Raha and
Vijay Raghunathan qLUT: Input-Aware Quantized Table Lookup
for Energy-Efficient Approximate
Accelerators . . . . . . . . . . . . . . 130:1--130:??
Begum Egilmez and
Matthew Schuchhardt and
Gokhan Memik and
Raid Ayoub and
Niranjan Soundararajan and
Michael Kishinevsky User-aware Frame Rate Management in
Android Smartphones . . . . . . . . . . 131:1--131:??
Hao Yan and
Lei Jiang and
Lide Duan and
Wei-Ming Lin and
Eugene John FlowPaP and FlowReR: Improving Energy
Efficiency and Performance for
STT-MRAM-Based Handheld Devices under
Read Disturbance . . . . . . . . . . . . 132:1--132:??
Siddharth Rai and
Mainak Chaudhuri Using Criticality of GPU Accesses in
Memory Management for CPU--GPU
Heterogeneous Multi-Core Processors . . 133:1--133:??
Wonkyung Kang and
Dongkun Shin and
Sungjoo Yoo Reinforcement Learning-Assisted Garbage
Collection to Mitigate Long-Tail Latency
in SSD . . . . . . . . . . . . . . . . . 134:1--134:??
Andreas Tretter and
Georgia Giannopoulou and
Matthias Baer and
Lothar Thiele Minimising Access Conflicts on Shared
Multi-Bank Memory . . . . . . . . . . . 135:1--135:??
M. Sadegh Riazi and
Mohammad Samragh and
Farinaz Koushanfar CAMsure: Secure Content-Addressable
Memory for Approximate Search . . . . . 136:1--136:??
Luca Piccolboni and
Alessandro Menon and
Graziano Pravadelli Efficient Control-Flow Subgraph Matching
for Detecting Hardware Trojans in RTL
Models . . . . . . . . . . . . . . . . . 137:1--137:??
Vincent Migliore and
Cédric Seguin and
Maria Méndez Real and
Vianney Lapotre and
Arnaud Tisserand and
Caroline Fontaine and
Guy Gogniat and
Russell Tessier A High-Speed Accelerator for Homomorphic
Encryption using the Karatsuba Algorithm 138:1--138:??
Jiacheng Zhang and
Youyou Lu and
Jiwu Shu and
Xiongjun Qin FlashKV: Accelerating KV Performance
with Open-Channel SSDs . . . . . . . . . 139:1--139:??
Hong Seok Kim and
Eyee Hyun Nam and
Ji Hyuck Yun and
Sheayun Lee and
Sang Lyul Min P-BMS: a Bad Block Management Scheme in
Parallelized Flash Memory Storage
Devices . . . . . . . . . . . . . . . . 140:1--140:??
Fei Wu and
Meng Zhang and
Yajuan Du and
Xubin He and
Ping Huang and
Changsheng Xie and
Jiguang Wan A Program Interference Error Aware LDPC
Scheme for Improving NAND Flash Decoding
Performance . . . . . . . . . . . . . . 141:1--141:??
Yi Wang and
Lisha Dong and
Rui Mao P-Alloc: Process-Variation Tolerant
Reliability Management for $3$D
Charge-Trapping Flash Memory . . . . . . 142:1--142:??
Benjamin Tan and
Morteza Biglari-Abhari and
Zoran Salcic An Automated Security-Aware Approach for
Design of Embedded Systems on MPSoC . . 143:1--143:??
Vasileios Tsoutsouras and
Dimosthenis Masouros and
Sotirios Xydis and
Dimitrios Soudris SoftRM: Self-Organized Fault-Tolerant
Resource Management for Failure
Detection and Recovery in NoC Based
Many-Cores . . . . . . . . . . . . . . . 144:1--144:??
Ganapati Bhat and
Suat Gumussoy and
Umit Y. Ogras Power-Temperature Stability and Safety
Analysis for Multiprocessor Systems . . 145:1--145:??
Siqi Wang and
Guanwen Zhong and
Tulika Mitra CGPredict: Embedded GPU Performance
Estimation from Single-Threaded
Applications . . . . . . . . . . . . . . 146:1--146:??
Amit Kumar Singh and
Alok Prakash and
Karunakar Reddy Basireddy and
Geoff V. Merrett and
Bashir M. Al-Hashimi Energy-Efficient Run-Time Mapping and
Thread Partitioning of Concurrent OpenCL
Applications on CPU--GPU MPSoCs . . . . 147:1--147:??
Kenneth O'neal and
Philip Brisk and
Ahmed Abousamra and
Zack Waters and
Emily Shriver GPU Performance Estimation using
Software Rasterization and Machine
Learning . . . . . . . . . . . . . . . . 148:1--148:??
Pietro Fezzardi and
Marco Lattuada and
Fabrizio Ferrandi Using Efficient Path Profiling to
Optimize Memory Consumption of On-Chip
Debugging for High-Level Synthesis . . . 149:1--149:??
Luca Piccolboni and
Paolo Mantovani and
Giuseppe Di Guglielmo and
Luca P. Carloni COSMOS: Coordination of High-Level
Synthesis and Memory Optimization for
Hardware Accelerators . . . . . . . . . 150:1--150:??
Mohammad Motamedi and
Daniel Fong and
Soheil Ghiasi Machine Intelligence on
Resource-Constrained IoT Devices: The
Case of Thread Granularity Optimization
for CNN Inference . . . . . . . . . . . 151:1--151:??
Ilias Vougioukas and
Andreas Sandberg and
Stephan Diestelhorst and
Bashir M. Al-Hashimi and
Geoff V. Merrett Nucleus: Finding the Sharing Limit of
Heterogeneous Cores . . . . . . . . . . 152:1--152:??
Dimitra Papagiannopoulou and
Andrea Marongiu and
Tali Moreshet and
Maurice Herlihy and
R. Iris Bahar Edge-TM: Exploiting Transactional Memory
for Error Tolerance and Energy
Efficiency . . . . . . . . . . . . . . . 153:1--153:??
Pirmin Vogel and
Andreas Kurth and
Johannes Weinbuch and
Andrea Marongiu and
Luca Benini Efficient Virtual Memory Sharing via
On-Accelerator Page Table Walking in
Heterogeneous Embedded SoCs . . . . . . 154:1--154:??
Hoda Aghaei Khouzani and
Chengmo Yang A DWM-Based Stack Architecture
Implementation for Energy Harvesting
Systems . . . . . . . . . . . . . . . . 155:1--155:??
Jaehyun Park and
Hitesh Joshi and
Hyung Gyu Lee and
Sayfe Kiaei and
Umit Y. Ogras Flexible PV-cell Modeling for Energy
Harvesting in Wearable IoT Applications 156:1--156:??
Sidharta Andalam and
Nathan Allen and
Avinash Malik and
Partha S. Roop and
Mark Trew A Novel Emulation Model of the Cardiac
Conduction System . . . . . . . . . . . 157:1--157:??
Bita Darvish Rouhani and
Azalia Mirhoseini and
Farinaz Koushanfar RISE: an Automated Framework for
Real-Time Intelligent Video Surveillance
on FPGA . . . . . . . . . . . . . . . . 158:1--158:??
Soumya Basu and
Loris Duch and
Rubén Braojos and
Giovanni Ansaloni and
Laura Pozzi and
David Atienza An Inexact Ultra-low Power Bio-signal
Processing Architecture With Lightweight
Error Recovery . . . . . . . . . . . . . 159:1--159:??
Joost Van Pinxten and
Umar Waqas and
Marc Geilen and
Twan Basten and
Lou Somers Online Scheduling of $2$-Re-entrant
Flexible Manufacturing Systems . . . . . 160:1--160:??
Matthias Beckert and
Rolf Ernst Response Time Analysis for Sporadic
Server Based Budget Scheduling in Real
Time Virtualization Environments . . . . 161:1--161:??
Xiaowen Chen and
Zhonghai Lu and
Sheng Liu and
Shuming Chen Round-trip DRAM Access Fairness in $3$D
NoC-based Many-core Systems . . . . . . 162:1--162:??
Jaewoo Lee and
Hoon Sung Chwa and
Linh T. X. Phan and
Insik Shin and
Insup Lee MC-ADAPT: Adaptive Task Dropping in
Mixed-Criticality Scheduling . . . . . . 163:1--163:??
Benjamin Rouxel and
Steven Derrien and
Isabelle Puaut Tightening Contention Delays While
Scheduling Parallel Applications on
Multi-core Architectures . . . . . . . . 164:1--164:??
Rehan Ahmed and
Pengcheng Huang and
Max Millen and
Lothar Thiele On The Design and Application of Thermal
Isolation Servers . . . . . . . . . . . 165:1--165:??
Xavier Allamigeon and
Stéphane Gaubert and
Eric Goubault and
Sylvie Putot and
Nikolas Stott A Fast Method to Compute Disjunctive
Quadratic Invariants of Numerical
Programs . . . . . . . . . . . . . . . . 166:1--166:??
Christoph Schulze and
Rance Cleaveland Improving Invariant Mining via Static
Analysis . . . . . . . . . . . . . . . . 167:1--167:??
Sagar Chaki and
Dionisio De Niz Formal Verification of a Timing Enforcer
Implementation . . . . . . . . . . . . . 168:1--168:??
Mohammadreza Mehrabian and
Mohammad Khayatian and
Aviral Shrivastava and
John C. Eidson and
Patricia Derler and
Hugo A. Andrade and
Ya-Shian Li-Baboud and
Edward Griffor and
Marc Weiss and
Kevin Stanton Timestamp Temporal Logic (TTL) for
Testing the Timing of Cyber-Physical
Systems . . . . . . . . . . . . . . . . 169:1--169:??
Jyotirmoy Deshmukh and
Marko Horvat and
Xiaoqing Jin and
Rupak Majumdar and
Vinayak S. Prabhu Testing Cyber-Physical Systems through
Bayesian Optimization . . . . . . . . . 170:1--170:??
Youcheng Sun and
Marco Di Natale Weakly Hard Schedulability Analysis for
Fixed Priority Scheduling of Periodic
Real-Time Tasks . . . . . . . . . . . . 171:1--171:??
Johannes Schlatow and
Rolf Ernst Response-Time Analysis for Task Chains
with Complex Precedence and Blocking
Relations . . . . . . . . . . . . . . . 172:1--172:??
Philip S. Kurtin and
Marco J. G. Bekooij An Abstraction-Refinement Theory for the
Analysis and Design of Real-Time Systems 173:1--173:??
Iman Azimi and
Arman Anzanpour and
Amir M. Rahmani and
Tapio Pahikkala and
Marco Levorato and
Pasi Liljeberg and
Nikil Dutt HiCH: Hierarchical Fog-Assisted
Computing Architecture for Healthcare
IoT . . . . . . . . . . . . . . . . . . 174:1--174:??
Yecheng Zhao and
Chao Peng and
Haibo Zeng and
Zonghua Gu Optimization of Real-Time Software
Implementing Multi-Rate Synchronous
Finite State Machines . . . . . . . . . 175:1--175:??
Timothy Bourke and
Francois Carcenac and
Jean-Louis Colaço and
Bruno Pagano and
Cédric Pasteur and
Marc Pouzet A Synchronous Look at the Simulink
Standard Library . . . . . . . . . . . . 176:1--176:??
Jiajie Wang and
Michael Mendler and
Partha Roop and
Bruno Bodin Timing Analysis of Synchronous Programs
using WCRT Algebra: Scalability through
Abstraction . . . . . . . . . . . . . . 177:1--177:??
Srinivas Pinisetty and
Partha S. Roop and
Steven Smyth and
Nathan Allen and
Stavros Tripakis and
Reinhard Von Hanxleden Runtime Enforcement of Cyber-Physical
Systems . . . . . . . . . . . . . . . . 178:1--178:??
Qingrui Liu and
Xiaolong Wu and
Larry Kittinger and
Markus Levy and
Changhee Jung BenchPrime: Effective Building of a
Hybrid Benchmark Suite . . . . . . . . . 179:1--179:??
Simon Schuster and
Peter Ulbrich and
Isabella Stilkerich and
Christian Dietrich and
Wolfgang SchröDer-Preikschat Demystifying Soft-Error Mitigation by
Control-Flow Checking --- A New
Perspective on its Effectiveness . . . . 180:1--180:??
Shaswot Shresthamali and
Masaaki Kondo and
Hiroshi Nakamura Adaptive Power Management in Solar
Energy Harvesting Sensor Node Using
Reinforcement Learning . . . . . . . . . 181:1--181:??
Sang-Hoon Kim and
Jinkyu Jeong and
Jin-Soo Kim Application-Aware Swapping for Mobile
Systems . . . . . . . . . . . . . . . . 182:1--182:??
Cheng Ji and
Li-Pin Chang and
Liang Shi and
Congming Gao and
Chao Wu and
Yuangang Wang and
Chun Jason Xue Lightweight Data Compression for Mobile
Flash Storage . . . . . . . . . . . . . 183:1--183:??
Ramy Medhat and
Michael O. Lam and
Barry L. Rountree and
Borzoo Bonakdarpour and
Sebastian Fischmeister Managing the Performance/Error Tradeoff
of Floating-point Intensive Applications 184:1--184:??
Andrew Sogokon and
Khalil Ghorbal and
Taylor T. Johnson Operational Models for Piecewise-Smooth
Systems . . . . . . . . . . . . . . . . 185:1--185:??
Chao Huang and
Xin Chen and
Wang Lin and
Zhengfeng Yang and
Xuandong Li Probabilistic Safety Verification of
Stochastic Hybrid Systems Using Barrier
Certificates . . . . . . . . . . . . . . 186:1--186:??
Xin Chen and
Sergio Mover and
Sriram Sankaranarayanan Compositional Relational Abstraction for
Nonlinear Hybrid Systems . . . . . . . . 187:1--187:??
Vuk Lesi and
Ilija Jovanov and
Miroslav Pajic Security-Aware Scheduling of Embedded
Control Tasks . . . . . . . . . . . . . 188:1--188:??
Sumana Ghosh and
Souradeep Dutta and
Soumyajit Dey and
Pallab Dasgupta A Structured Methodology for Pattern
based Adaptive Scheduling in Embedded
Control . . . . . . . . . . . . . . . . 189:1--189:??
Ivan Gavran and
Rupak Majumdar and
Indranil Saha Antlab: a Multi-Robot Task Server . . . 190:1--190:??
Sandeep K. Shukla Editorial: Trust and Security Must
Become a Primary Design Concern in
Embedded Computing . . . . . . . . . . . 1:1--1:??
Jiming Chen and
Yu (Jason) Gu and
Gil Zussman Guest Editorial for ACM TECS: Special
Issue on Autonomous Battery-Free Sensing
and Communication . . . . . . . . . . . 2:1--2:??
Qi Chen and
Ye Liu and
Guangchi Liu and
Qing Yang and
Xianming Shi and
Hongwei Gao and
Lu Su and
Quanlong Li Harvest Energy from the Water: a
Self-Sustained Wireless Water Quality
Sensing System . . . . . . . . . . . . . 3:1--3:??
Andres Gomez and
Lukas Sigrist and
Thomas Schalch and
Luca Benini and
Lothar Thiele Efficient, Long-Term Logging of Rich
Data Sensors Using Transient Sensor
Nodes . . . . . . . . . . . . . . . . . 4:1--4:??
Zejue Wang and
Hongjia Li and
Dan Hu and
Song Ci Transmission Adaptation for Battery-Free
Relaying . . . . . . . . . . . . . . . . 5:1--5:??
Zhongqin Wang and
Fu Xiao and
Ning Ye and
Ruchuan Wang and
Panlong Yang A See-through-Wall System for
Device-Free Human Motion Sensing Based
on Battery-Free RFID . . . . . . . . . . 6:1--6:??
Chi Lin and
Yanhong Zhou and
Houbing Song and
Chang Wu Yu and
Guowei Wu OPPC: an Optimal Path Planning Charging
Scheme Based on Schedulability
Evaluation for WRSNs . . . . . . . . . . 7:1--7:??
Hang Hu and
Hang Zhang and
Jianxin Guo and
Feng Wang Joint Optimization of Sensing and Power
Allocation in Energy-Harvesting
Cognitive Radio Networks . . . . . . . . 8:1--8:??
Die Wu and
Li Lu and
Muhammad Jawad Hussain and
Songfan Li and
Mo Li and
Fengli Zhang $ R^3 $: Reliable Over-the-Air
Reprogramming on Computational RFIDs . . 9:1--9:??
Songyuan Li and
Lingkun Fu and
Shibo He and
Youxian Sun Near-Optimal Co-Deployment of Chargers
and Sink Stations in Rechargeable Sensor
Networks . . . . . . . . . . . . . . . . 10:1--10:??
Peter Wägemann and
Tobias Distler and
Heiko Janker and
Phillip Raffeck and
Volkmar Sieh and
Wolfgang Schröder-Preikschat Operating Energy-Neutral Real-Time
Systems . . . . . . . . . . . . . . . . 11:1--11:??
MD. Majharul Islam Rajib and
Asis Nasipuri Predictive Retransmissions for
Intermittently Connected Sensor Networks
with Transmission Diversity . . . . . . 12:1--12:??
Chi Xu and
Wei Liang and
Haibin Yu Green-Energy-Powered Cognitive Radio
Networks: Joint Time and Power
Allocation . . . . . . . . . . . . . . . 13:1--13:??
Petru Eles and
Jörg Henkel Guest Editorial for the Special Issue of
ESWEEK 2016 . . . . . . . . . . . . . . 14:1--14:??
Gopalakrishna Hegde and
Siddhartha and
Nachiket Kapre CaffePresso: Accelerating Convolutional
Networks on Embedded SoCs . . . . . . . 15:1--15:??
Cheng Tan and
Aditi Kulkarni and
Vanchinathan Venkataramani and
Manupa Karunaratne and
Tulika Mitra and
Li-Shiuan Peh LOCUS: Low-Power Customizable Many-Core
Architecture for Wearables . . . . . . . 16:1--16:??
Soubhagya Sutar and
Arnab Raha and
Devadatta Kulkarni and
Rajeev Shorey and
Jeffrey Tew and
Vijay Raghunathan D-PUF: an Intrinsically Reconfigurable
DRAM PUF for Device Authentication and
Random Number Generation . . . . . . . . 17:1--17:??
Jie Guo and
Chuhan Min and
Tao Cai and
Yiran Chen Improving Write Performance and
Extending Endurance of Object-Based NAND
Flash Devices . . . . . . . . . . . . . 18:1--18:??
Petra R. Maier and
Veit B. Kleeberger and
Daniel Mueller-Gritschneder and
Ulf Schlichtmann Fault Injection for Test-Driven
Development of Robust SoC Firmware . . . 19:1--19:??
Ayca Balkan and
Paulo Tabuada and
Jyotirmoy V. Deshmukh and
Xiaoqing Jin and
James Kapinski Underminer: a Framework for
Automatically Identifying Nonconverging
Behaviors in Black-Box System Models . . 20:1--20:??
Chuchu Fan and
James Kapinski and
Xiaoqing Jin and
Sayan Mitra Simulation-Driven Reachability Using
Matrix Measures . . . . . . . . . . . . 21:1--21:??
Hyoseung Kim and
Ragunathan (Raj) Rajkumar Predictable Shared Cache Management for
Multi-Core Real-Time Virtualization . . 22:1--22:??
Kari Kähkönen and
Keijo Heljanko Testing Programs with Contextual
Unfoldings . . . . . . . . . . . . . . . 23:1--23:??
Xiaozhe Gu and
Arvind Easwaran Efficient Schedulability Test for
Dynamic-Priority Scheduling of
Mixed-Criticality Real-Time Systems . . 24:1--24:??
Amey Kulkarni and
Colin Shea and
Tahmid Abtahi and
Houman Homayoun and
Tinoosh Mohsenin Low Overhead CS-Based Heterogeneous
Framework for Big Data Acceleration . . 25:1--25:??
Mohammad Taghi Teimoori Nodeh and
Mostafa Bazzaz and
Alireza Ejlali Exploiting Approximate MLC-PCM in
Low-Power Embedded Systems . . . . . . . 26:1--26:??
Salvatore Gaglio and
Giuseppe Lo Re and
Gloria Martorella and
Daniele Peri DC4CD: a Platform for Distributed
Computing on Constrained Devices . . . . 27:1--27:??
Alireza Namazi and
Meisam Abdollahi and
Saeed Safari and
Siamak Mohammadi A Majority-Based Reliability-Aware Task
Mapping in High-Performance Homogeneous
NoC Architectures . . . . . . . . . . . 28:1--28:??
Sandeep K. Shukla Editorial: Industry 4.0 --- a Confluence
of Embedded Artificial Intelligence,
Machine Learning, Robotics and Security 29:1--29:??
Elizabeth Leonard Guest Editorial: Special Issue on Formal
Methods and Models for System Design . . 30:1--30:??
Alexandru Tanase and
Michael Witterauf and
Jürgen Teich and
Frank Hannig Symbolic Multi-Level Loop Mapping of
Loop Programs for Massively Parallel
Processor Arrays . . . . . . . . . . . . 31:1--31:??
Paul C. Attie and
Kinan Dak Al Bab and
Mouhammad Sakr Model and Program Repair via SAT Solving 32:1--32:??
Steven Smyth and
Christian Motika and
Karsten Rathlev and
Reinhard Von Hanxleden and
Michael Mendler SCEst: Sequentially Constructive Esterel 33:1--33:??
Adel Dokhanchi and
Bardh Hoxha and
Georgios Fainekos Formal Requirement Debugging for Testing
and Verification of Cyber-Physical
Systems . . . . . . . . . . . . . . . . 34:1--34:??
Zheng Li and
Shuibing He Fixed-Priority Scheduling for Two-Phase
Mixed-Criticality Systems . . . . . . . 35:1--35:??
Lihao Liang and
Tom Melham and
Daniel Kroening and
Peter Schrammel and
Michael Tautschnig Effective Verification for Low-Level
Software with Competing Interrupts . . . 36:1--36:??
Xinfeng Xie and
Dayou Du and
Qian Li and
Yun Liang and
Wai Teng Tang and
Zhong Liang Ong and
Mian Lu and
Huynh Phung Huynh and
Rick Siow Mong Goh Exploiting Sparsity to Accelerate Fully
Connected Layers of CNN-Based
Applications on Mobile SoCs . . . . . . 37:1--37:??
Sixing Lu and
Roman Lysecky Time and Sequence Integrated Runtime
Anomaly Detection for Embedded Systems 38:1--38:??
Clément Ballabriga and
Julien Forget and
Giuseppe Lipari Symbolic WCET Computation . . . . . . . 39:1--39:??
Sunil Dutt and
Sukumar Nandi and
Gaurav Trivedi Analysis and Design of Adders for
Approximate Computing . . . . . . . . . 40:1--40:??
Charles Leech and
Charan Kumar and
Amit Acharyya and
Sheng Yang and
Geoff V. Merrett and
Bashir M. Al-Hashimi Runtime Performance and Power
Optimization of Parallel Disparity
Estimation on Many-Core Platforms . . . 41:1--41:??
Ganghee Lee and
Ediz Cetin and
Oliver Diessel Fault Recovery Time Analysis for
Coarse-Grained Reconfigurable
Architectures . . . . . . . . . . . . . 42:1--42:??
David C. Harrison and
Winston K. G. Seah and
Ramesh Rayudu Coverage Preservation with Rapid
Forwarding in Energy-Harvesting Wireless
Sensor Networks for Critical Rare Events 43:1--43:??
He Li and
Kaoru Ota and
Mianxiong Dong Energy Cooperation in Battery-Free
Wireless Communications with Radio
Frequency Energy Harvesting . . . . . . 44:1--44:??
Jurn-Gyu Park and
Chen-Ying Hsieh and
Nikil Dutt and
Sung-Soo Lim Synergistic CPU--GPU Frequency Capping
for Energy-Efficient Mobile Games . . . 45:1--45:??
Apurva Narayan and
Greta Cutulenco and
Yogi Joshi and
Sebastian Fischmeister Mining Timed Regular Specifications from
System Traces . . . . . . . . . . . . . 46:1--46:??
Majid Shoushtari and
Bryan Donyanavard and
Luis Angel D. Bathen and
Nikil Dutt ShaVe-ICE: Sharing Distributed
Virtualized SPMs in Many-Core Embedded
Systems . . . . . . . . . . . . . . . . 47:1--47:??
Zhijian He and
Yao Chen and
Zhaoyan Shen Attitude Fusion of Inertial and Magnetic
Sensor under Different Magnetic Filed
Distortions . . . . . . . . . . . . . . 48:1--48:??
Sukanta Bhattacharjee and
Yi-Ling Chen and
Juinn-Dar Huang and
Bhargab B. Bhattacharya Concentration-Resilient Mixture
Preparation with Digital Microfluidic
Lab-on-Chip . . . . . . . . . . . . . . 49:1--49:??
Shuoxin Lin and
Jiahao Wu and
Shuvra S. Bhattacharyya Memory-Constrained Vectorization and
Scheduling of Dataflow Graphs for Hybrid
CPU--GPU Platforms . . . . . . . . . . . 50:1--50:??
Tian Huang and
Yongxin Zhu and
Yajun Ha and
Xu Wang and
Meikang Qiu A Hardware Pipeline with High Energy and
Resource Efficiency for FMM Acceleration 51:1--51:??
Kun Qian and
Chenshu Wu and
Zheng Yang and
Yunhao Liu and
Fugui He and
Tianzhang Xing Enabling Contactless Detection of Moving
Humans with Dynamic Speeds Using CSI . . 52:1--52:??
Danlu Guo and
Mohamed Hassan and
Rodolfo Pellizzoni and
Hiren Patel A Comparative Study of Predictable DRAM
Controllers . . . . . . . . . . . . . . 53:1--53:??
Mehran Mozaffari-Kermani and
Reza Azarderakhsh and
Ausmita Sarker and
Amir Jalali Efficient and Reliable Error Detection
Architectures of Hash-Counter-Hash
Tweakable Enciphering Schemes . . . . . 54:1--54:??
Maria Méndez Real and
Philipp Wehner and
Vianney Lapotre and
Diana Göhringer and
Guy Gogniat Application Deployment Strategies for
Spatial Isolation on Many-Core
Accelerators . . . . . . . . . . . . . . 55:1--55:??
Yulei Sui and
Xiaokang Fan and
Hao Zhou and
Jingling Xue Loop-Oriented Pointer Analysis for
Automatic SIMD Vectorization . . . . . . 56:1--56:??
Feng Li and
Yanbing Yang and
Zicheng Chi and
Liya Zhao and
Yaowen Yang and
Jun Luo Trinity: Enabling Self-Sustaining WSNs
Indoors with Energy-Free Sensing and
Networking . . . . . . . . . . . . . . . 57:1--57:??
Sandeep K. Shukla Editorial: To Use or Not To? Embedded
Systems for Voting . . . . . . . . . . . 58:1--58:??
Jeremy Morse and
Steve Kerrison and
Kerstin Eder On the Limitations of Analyzing
Worst-Case Dynamic Energy of Processing 59:1--59:??
Hwajeong Seo and
Ilwoong Jeong and
Jungkeun Lee and
Woo-Hwan Kim Compact Implementations of ARX-Based
Block Ciphers on IoT Processors . . . . 60:1--60:??
Ding-Yong Hong and
Yu-Ping Liu and
Sheng-Yu Fu and
Jan-Jan Wu and
Wei-Chung Hsu Improving SIMD Parallelism via Dynamic
Binary Translation . . . . . . . . . . . 61:1--61:??
Jiutian Zhang and
Yuhang Liu and
Haifeng Li and
Xiaojing Zhu and
Mingyu Chen PTAT: an Efficient and Precise Tool for
Tracing and Profiling Detailed TLB
Misses . . . . . . . . . . . . . . . . . 62:1--62:??
Mohammad Hosseinabady and
Jose Luis Nunez-Yanez Dynamic Energy Management of FPGA
Accelerators in Embedded Systems . . . . 63:1--63:??
Hyeonggyu Kim and
Minho Ju and
Soontae Kim OnNetwork+: Network Delay-Aware
Management for Mobile Systems . . . . . 64:1--64:??
Vasileios Tsoutsouras and
Iraklis Anagnostopoulos and
Dimosthenis Masouros and
Dimitrios Soudris A Hierarchical Distributed Runtime
Resource Management Scheme for NoC-Based
Many-Cores . . . . . . . . . . . . . . . 65:1--65:??
Hwajeong Seo Compact Software Implementation of
Public-Key Cryptography on MSP430X . . . 66:1--66:??
Yahya H. Yassin and
Francky Catthoor and
Fabian Kloosterman and
Jyh-Jang Sun and
JoãO Couto and
Per Gunnar Kjeldsberg and
Nick Van Helleputte Algorithm/Architecture Co-optimisation
Technique for Automatic Data Reduction
of Wireless Read-Out in High-Density
Electrode Arrays . . . . . . . . . . . . 67:1--67:??
Elena Hammari and
Per Gunnar Kjeldsberg and
Francky Catthoor Runtime Precomputation of Data-Dependent
Parameters in Embedded Systems . . . . . 68:1--68:??
Su-Kyung Yoon and
Jitae Yun and
Jung-Geun Kim and
Shin-Dug Kim Self-Adaptive Filtering Algorithm with
PCM-Based Memory Storage System . . . . 69:1--69:??
Saba Amanollahi and
Ghassem Jaberipur Extended Redundant-Digit Instruction Set
for Energy-Efficient Processors . . . . 70:1--70:??
BJörn Andersson and
Hyoseung Kim and
Dionisio De Niz and
Mark Klein and
Ragunathan (Raj) Rajkumar and
John Lehoczky Schedulability Analysis of Tasks with
Corunner-Dependent Execution Times . . . 71:1--71:??
Kelefouras Vasilios and
Keramidas Georgios and
Voros Nikolaos Combining Software Cache Partitioning
and Loop Tiling for Effective Shared
Cache Management . . . . . . . . . . . . 72:1--72:??
Sandeep K. Shukla Editorial: Early Career Researchers in
Embedded Computing . . . . . . . . . . . 73:1--73:??
Korosh Vatanparvar and
Mohammad Abdullah Al Faruque Design and Analysis of Battery-Aware
Automotive Climate Control for Electric
Vehicles . . . . . . . . . . . . . . . . 74:1--74:??
Wen Pan and
Tao Xie A Mirroring-Assisted Channel-RAID5 SSD
for Mobile Applications . . . . . . . . 75:1--75:??
Hamza Omar and
Qingchuan Shi and
Masab Ahmad and
Halit Dogan and
Omer Khan Declarative Resilience: a Holistic
Soft-Error Resilient Multicore
Architecture that Trades off Program
Accuracy for Efficiency . . . . . . . . 76:1--76:??
Guan Wang and
Chuanqi Zang and
Lei Ju and
Mengying Zhao and
Xiaojun Cai and
Zhiping Jia Shared Last-Level Cache Management and
Memory Scheduling for GPGPUs with Hybrid
Main Memory . . . . . . . . . . . . . . 77:1--77:??
Xiaoxuan Liang and
Zhangqin Huang and
Shengqi Yang and
Lanxin Qiu Device-Free Motion & Trajectory Detection
via RFID . . . . . . . . . . . . . . . . 78:1--78:??
Kecheng Ji and
Ming Ling and
Longxing Shi and
Jianping Pan An Analytical Cache Performance
Evaluation Framework for Embedded
Out-of-Order Processors Using Software
Characteristics . . . . . . . . . . . . 79:1--79:??
Hadi Alizadeh Ara and
Amir Behrouzian and
Martijn Hendriks and
Marc Geilen and
Dip Goswami and
Twan Basten Scalable Analysis for Multi-Scale
Dataflow Models . . . . . . . . . . . . 80:1--80:??
Riham Altawy and
Raghvendra Rohit and
Morgan He and
Kalikinkar Mandal and
Gangqiang Yang and
Guang Gong SLISCP-light: Towards Hardware Optimized
Sponge-specific Cryptographic
Permutations . . . . . . . . . . . . . . 81:1--81:??
Sandeep K. Shukla Editorial: Need for Artifact Verified
Articles in \booktitleACM Transactions 82:1--82:??
Rajshekar Kalayappan and
Smruti R. Sarangi Providing Accountability in
Heterogeneous Systems-on-Chip . . . . . 83:1--83:??
Ashikahmed Bhuiyan and
Zhishan Guo and
Abusayeed Saifullah and
Nan Guan and
Haoyi Xiong Energy-Efficient Real-Time Scheduling of
DAG Tasks . . . . . . . . . . . . . . . 84:1--84:??
Yi-Hung Wei and
Quan Leng and
Wei-Ju Chen and
Aloysius K. Mok and
Song Han Schedule Adaptation for Ensuring
Reliability in RT-WiFi-Based Networked
Embedded Systems . . . . . . . . . . . . 85:1--85:??
Efstathios Sotiriou-Xanthopoulos and
Leonard Masing and
Sotirios Xydis and
Kostas Siozios and
Jürgen Becker and
Dimitrios Soudris OpenCL-based Virtual Prototyping and
Simulation of Many-Accelerator
Architectures . . . . . . . . . . . . . 86:1--86:??
Belal H. Sababha and
Yazan A. Alqudah A Reconfiguration-Based Fault-Tolerant
Anti-Lock Brake-by-Wire System . . . . . 87:1--87:??
Xi Jin and
Nan Guan and
Changqing Xia and
Jintao Wang and
Peng Zeng Packet Aggregation Real-Time Scheduling
for Large-Scale WIA--PA Industrial
Wireless Sensor Networks . . . . . . . . 88:1--88:??
Andreas Weichslgartner and
Stefan Wildermann and
Deepak Gangadharan and
Michael Glaß and
Jürgen Teich A Design--Time/Run-Time Application
Mapping Methodology for Predictable
Execution Time in MPSoCs . . . . . . . . 89:1--89:??
Mohamed Hassan and
Anirudh M. Kaushik and
Hiren Patel Exposing Implementation Details of
Embedded DRAM Memory Controllers through
Latency-based Analysis . . . . . . . . . 90:1--90:??
Sandeep K. Shukla Editorial: Embedded Security Challenge:
Cyber Security Contests in the Embedded
Computing Domain . . . . . . . . . . . . 91:1--91:??
Hui Sun and
Jianzhong Huang and
Xiao Qin and
Changsheng Xie DLSpace: Optimizing SSD Lifetime via An
Efficient Distributed Log Space
Allocation Strategy . . . . . . . . . . 92:1--92:??
Domenico Balsamo and
Benjamin J. Fletcher and
Alex S. Weddell and
Giorgos Karatziolas and
Bashir M. Al-Hashimi and
Geoff V. Merrett Momentum: Power-neutral Performance
Scaling with Intrinsic MPPT for Energy
Harvesting Computing Systems . . . . . . 93:1--93:??
Saad Zia Sheikh and
Muhammad Adeel Pasha Energy-Efficient Multicore Scheduling
for Hard Real-Time Systems: a Survey . . 94:1--94:??
Guoqi Xie and
Gang Zeng and
Ryo Kurachi and
Hiroaki Takada and
Renfa Li and
Keqin Li Exact WCRT Analysis for
Message-Processing Tasks on
Gateway-Integrated In-Vehicle CAN
Clusters . . . . . . . . . . . . . . . . 95:1--95:??
Zhiwei Feng and
Nan Guan and
Mingsong Lv and
Weichen Liu and
Qingxu Deng and
Xue Liu and
Wang Yi An Efficient UAV Hijacking Detection
Method Using Onboard Inertial
Measurement Unit . . . . . . . . . . . . 96:1--96:??
Yin Yan and
Girish Gokul and
Karthik Dantu and
Steven Y. Ko and
Lukasz Ziarek and
Jan Vitek Can Android Run on Time? Extending and
Measuring the Android Platform's
Timeliness . . . . . . . . . . . . . . . 97:1--97:??
Amin B. Abkenar and
Seng W. Loke and
Arkady Zaslavsky and
Wenny Rahayu GroupSense: Recognizing and
Understanding Group Physical Activities
using Multi-Device Embedded Sensing . . 98:1--98:??
Patricia Derler and
Klaus Schneider and
Jean-Pierre Talpin Guest Editorial: Special Issue of ACM
TECS on the ACM--IEEE International
Conference on Formal Methods and Models
for System Design (MEMOCODE 2017) . . . 1:1--1:??
Sandeep K. Shukla Editorial: Human Factors in Embedded
Computing . . . . . . . . . . . . . . . 1:1--1:??
Pierluigi Nuzzo and
Jiwei Li and
Alberto L. Sangiovanni-Vincentelli and
Yugeng Xi and
Dewei Li Stochastic Assume--Guarantee Contracts
for Cyber-Physical System Design . . . . 2:1--2:??
Guillaume Plassan and
Katell Morin-Allory and
Dominique Borrione Mining Missing Assumptions from
Counter-Examples . . . . . . . . . . . . 3:1--3:??
Andreas Fellner and
Willibald Krenn and
Rupert Schlick and
Thorsten Tarrach and
Georg Weissenbacher Model-based, Mutation-driven Test-case
Generation Via Heuristic-guided
Branching Search . . . . . . . . . . . . 4:1--4:??
Stephen A. Edwards and
Richard Townsend and
Martha Barker and
Martha A. Kim Compositional Dataflow Circuits . . . . 5:1--5:??
Thomas N. Reynolds and
Adam Procter and
William L. Harrison and
Gerard Allwein The Mechanized Marriage of Effects and
Monads with Applications to
High-assurance Hardware . . . . . . . . 6:1--6:??
Sudipta Chattopadhyay and
Moritz Beck and
Ahmed Rezine and
Andreas Zeller Quantifying the Information Leakage in
Cache Attacks via Symbolic Execution . . 7:1--7:??
Taeju Park and
Kang G. Shin EACAN: Reliable and Resource-Efficient
CAN Communications . . . . . . . . . . . 8:1--8:??
Daniel J. Pederson and
Christopher J. Quinkert and
Muhammad A. Arafat and
Jesse P. Somann and
Jack D. Williams and
Rebecca A. Bercich and
Zhi Wang and
Gabriel O. Albors and
John G. R. Jefferys and
Pedro P. Irazoqui The Bionode: a Closed-Loop
Neuromodulation Implant . . . . . . . . 9:1--9:??
Vanchinathan Venkataramani and
Mun Choon Chan and
Tulika Mitra Scratchpad-Memory Management for
Multi-Threaded Applications on Many-Core
Architectures . . . . . . . . . . . . . 10:1--10:??
Abhishek Rhisheekesan and
Reiley Jeyapaul and
Aviral Shrivastava Control Flow Checking or Not? (for Soft
Errors) . . . . . . . . . . . . . . . . 11:1--11:??
Debapriya Basu Roy and
Shivam Bhasin and
Ivica Nikoli\'c and
Debdeep Mukhopadhyay Combining PUF with RLUTs: a Two-party
Pay-per-device IP Licensing Scheme on
FPGAs . . . . . . . . . . . . . . . . . 12:1--12:??
Guanwen Zhong and
Akshat Dubey and
Cheng Tan and
Tulika Mitra Synergy: an HW/SW Framework for High
Throughput CNNs on Embedded
Heterogeneous SoC . . . . . . . . . . . 13:1--13:??
Krishnendu Guha and
Debasri Saha and
Amlan Chakrabarti Stigmergy-Based Security for SoC
Operations From Runtime Performance
Degradation of SoC Components . . . . . 14:1--14:??
Alif Ahmed and
Yuanwen Huang and
Prabhat Mishra Cache Reconfiguration Using Machine
Learning for Vulnerability-aware Energy
Optimization . . . . . . . . . . . . . . 15:1--15:??
George Lentaris and
Konstantinos Maragos and
Dimitrios Soudris and
Xenophon Zabulis and
Manolis Lourakis Single- and Multi-FPGA Acceleration of
Dense Stereo Vision for Planetary Rovers 16:1--16:??
Salah Harb and
Moath Jarrah FPGA Implementation of the ECC Over $
{\rm GF}(2^m) $ for Small Embedded
Applications . . . . . . . . . . . . . . 17:1--17:??
Abbas Arghavani and
Haibo Zhang and
Zhiyi Huang and
Yawen Chen Chimp: a Learning-based Power-aware
Communication Protocol for Wireless Body
Area Networks . . . . . . . . . . . . . 18:1--18:??
Zhe Jiang and
Neil Audsley and
Pan Dong BlueIO: a Scalable Real-Time Hardware
I/O Virtualization System for Many-core
Embedded Systems . . . . . . . . . . . . 19:1--19:??
Sandeep K. Shukla Editorial: Reflections on the History of
Cyber-Physical versus Embedded Systems 19:1--19:??
Farid Molazem Tabrizi and
Karthik Pattabiraman Design-Level and Code-Level Security
Analysis of IoT Devices . . . . . . . . 20:1--20:??
Bruce Belson and
Jason Holdsworth and
Wei Xiang and
Bronson Philippa A Survey of Asynchronous Programming
Using Coroutines in the Internet of
Things and Embedded Systems . . . . . . 21:1--21:??
Lejla Batina and
Sherman S. M. Chow and
Gerhard Hancke and
Zhe Liu Introduction to the Special Issue on
Cryptographic Engineering for Internet
of Things: Security Foundations,
Lightweight Solutions, and Attacks . . . 22:1--22:??
Lu Zhou and
Chunhua Su and
Zhi Hu and
Sokjoon Lee and
Hwajeong Seo Lightweight Implementations of NIST
P-256 and SM2 ECC on $8$-bit
Resource-Constraint Embedded Device . . 23:1--23:??
Furkan Turan and
Ingrid Verbauwhede Compact and Flexible FPGA Implementation
of Ed25519 and X25519 . . . . . . . . . 24:1--24:??
Weiqiang Liu and
Lei Zhang and
Zhengran Zhang and
Chongyan Gu and
Chenghua Wang and
Maire O'neill and
Fabrizio Lombardi XOR-Based Low-Cost Reconfigurable PUFs
for IoT Security . . . . . . . . . . . . 25:1--25:??
Robert P. Lee and
Konstantinos Markantonakis and
Raja Naeem Akram Ensuring Secure Application Execution
and Platform-Specific Execution in
Embedded Devices . . . . . . . . . . . . 26:1--26:??
Amina Cherif and
Malika Belkadi and
Damien Sauveron A Lightweight and Secure Data Collection
Serverless Protocol Demonstrated in an
Active RFIDs Scenario . . . . . . . . . 27:1--27:??
Lu Zhou and
Chunhua Su and
Kuo-Hui Yeh A Lightweight Cryptographic Protocol
with Certificateless Signature for the
Internet of Things . . . . . . . . . . . 28:1--28:??
Le-Tian Sha and
Fu Xiao and
Hai-Ping Huang and
Yu Chen and
Ru-Chuan Wang Catching Escapers: a Detection Method
for Advanced Persistent Escapers in
Industry Internet of Things Based on
Identity-based Broadcast Encryption
(IBBE) . . . . . . . . . . . . . . . . . 29:1--29:??
Rehan Ahmed and
Bernhard Buchli and
Stefan Draskovic and
Lukas Sigrist and
Pratyush Kumar and
Lothar Thiele Optimal Power Management with Guaranteed
Minimum Energy Utilization for Solar
Energy Harvesting Systems . . . . . . . 30:1--30:??
Sandeep K. Shukla Editorial: Adversaries and Robustness 30:1--30:??
Daibo Liu and
Zhichao Cao and
Mingyan Liu and
Mengshu Hou and
Hongbo Jinag Contention-Detectable Mechanism for
Receiver-Initiated MAC . . . . . . . . . 31:1--31:??
Xiaokang Wang and
Laurence T. Yang and
Hongguo Li and
Man Lin and
Jianjun Han and
Bernady O. Apduhan NQA: a Nested Anti-collision Algorithm
for RFID Systems . . . . . . . . . . . . 32:1--32:??
Fang Su and
Yongpan Liu and
Xiao Sheng and
Hyung Gyu Lee and
Naehyuck Chang and
Huazhong Yang A Task Failure Rate Aware Dual-Channel
Solar Power System for Nonvolatile
Sensor Nodes . . . . . . . . . . . . . . 33:1--33:??
Mounika Ponugoti and
Aleksandar Milenkovic Enabling On-the-Fly Hardware Tracing of
Data Reads in Multicores . . . . . . . . 34:1--34:??
Zaid Al-bayati and
Youcheng Sun and
Haibo Zeng and
Marco Di Natale and
Qi Zhu and
Brett H. Meyer Partitioning and Selection of Data
Consistency Mechanisms for Multicore
Real-Time Systems . . . . . . . . . . . 35:1--35:??
G. Desirena-López and
A. Ramírez-Treviño and
J. L. Briz and
C. R. Vázquez and
D. Gómez-Gutiérrez Thermal-aware Real-time Scheduling Using
Timed Continuous Petri Nets . . . . . . 36:1--36:??
Marcelo Ruaro and
Axel Jantsch and
Fernando Gehm Moraes Self-Adaptive QoS Management of
Computation and Communication Resources
in Many-Core SoCs . . . . . . . . . . . 37:1--37:??
G. G. Md. Nawaz Ali and
Md. Noor-A-Rahim and
Md. Ashiqur Rahman and
Beshah Ayalew and
Peter H. J. Chong and
Yong Liang Guan Cooperative Cache Transfer-based
On-demand Network Coded Broadcast in
Vehicular Networks . . . . . . . . . . . 38:1--38:??
Yu-Chieh Chen and
Ching-Chih Chang and
Ramesh Perumal and
Shih-Rung Yeh and
Yen-Chung Chang and
Hsin Chen Optimization and Implementation of
Wavelet-based Algorithms for Detecting
High-voltage Spindles in Neuron Signals 39:1--39:??
Michail Noltsis and
Nikolaos Zambelis and
Francky Catthoor and
Dimitrios Soudris A Closed-Loop Controller to Ensure
Performance and Temperature Constraints
for Dynamic Applications . . . . . . . . 40:1--40:??
Guy Durrieu and
Claire Pagetti GRec: Automatic Computation of
Reconfiguration Graphs for Multi-core
Platforms . . . . . . . . . . . . . . . 41:1--41:??
Siwen Zhu and
Yi Tang and
Junxiang Zheng and
Yongzhi Cao and
Hanpin Wang and
Yu Huang and
Marian Margraf Sample Essentiality and Its Application
to Modeling Attacks on Arbiter PUFs . . 42:1--42:??
Manuel Strobel and
Martin Radetzki Power-mode-aware Memory Subsystem
Optimization for Low-power
System-on-Chip Design . . . . . . . . . 43:1--43:??
Mohammad Motamedi and
Felix A. Portillo and
Daniel Fong and
Soheil Ghiasi Distill-Net: Application-Specific
Distillation of Deep Convolutional
Neural Networks for Resource-Constrained
IoT Platforms . . . . . . . . . . . . . 44:1--44:??
Quan Zhou and
Guohui Li and
Jianjun Li and
Chenggang Deng and
Ling Yuan Response Time Analysis for Tasks with
Fixed Preemption Points under Global
Scheduling . . . . . . . . . . . . . . . 111:1--111:??
Jiecao Yu and
Andrew Lukefahr and
Reetuparna Das and
Scott Mahlke TF-Net: Deploying Sub-Byte Deep Neural
Networks on Microcontrollers . . . . . . 45:1--45:??
Larissa Rozales Gonçalves and
Rafael Fão De Moura and
Luigi Carro Aggressive Energy Reduction for Video
Inference with Software-only Strategies 46:1--46:??
Jeff (Jun) Zhang and
Parul Raj and
Shuayb Zarar and
Amol Ambardekar and
Siddharth Garg CompAct: On-chip Compression of
Activations for Low Power Systolic Array
Based CNN Acceleration . . . . . . . . . 47:1--47:??
Jorge Castro-Godínez and
Muhammad Shafique and
Jörg Henkel ECAx: Balancing Error Correction Costs
in Approximate Accelerators . . . . . . 48:1--48:??
Ganapati Bhat and
Yigit Tuncel and
Sizhe An and
Hyung Gyu Lee and
Umit Y. Ogras An Ultra-Low Energy Human Activity
Recognition Accelerator for Wearable
Health Applications . . . . . . . . . . 49:1--49:??
Dhananjaya Wijerathne and
Zhaoying Li and
Manupa Karunarathne and
Anuj Pathania and
Tulika Mitra CASCADE: High Throughput Data Streaming
via Decoupled Access-Execute CGRA . . . 50:1--50:??
Francesco Restuccia and
Marco Pagani and
Alessandro Biondi and
Mauro Marinoni and
Giorgio Buttazzo Is Your Bus Arbiter Really Fair?
Restoring Fairness in AXI Interconnects
for FPGA SoCs . . . . . . . . . . . . . 51:1--51:??
Sumit K. Mandal and
Raid Ayoub and
Michael Kishinevsky and
Umit Y. Ogras Analytical Performance Models for NoCs
with Multiple Priority Traffic Classes 52:1--52:??
Shihao Song and
Anup Das and
Onur Mutlu and
Nagarajan Kandasamy Enabling and Exploiting Partition-Level
Parallelism (PALP) in Phase Change
Memories . . . . . . . . . . . . . . . . 53:1--53:??
Aditya Sridhar and
Mohamed Ibrahim and
Krishnendu Chakrabarty Synterface: Efficient Chip-to-World
Interfacing for Flow-Based Microfluidic
Biochips Using Pin-Count Minimization 54:1--54:??
Minsu Kim and
Jeong-Keun Park and
Sungyeol Kim and
Insu Yang and
Hyunsoo Jung and
Soo-Mook Moon Output-based Intermediate Representation
for Translation of Test-pattern Program 55:1--55:??
Lucas Bragança Da Silva and
Ricardo Ferreira and
Michael Canesche and
Marcelo M. Menezes and
Maria D. Vieira and
Jeronimo Penha and
Peter Jamieson and
José Augusto M. Nacif READY: a Fine-Grained Multithreading
Overlay Framework for Modern CPU--FPGA
Dataflow Applications . . . . . . . . . 56:1--56:??
Sunghyun Park and
Youfeng Wu and
Janghaeng Lee and
Amir Aupov and
Scott Mahlke Multi-objective Exploration for
Practical Optimization Decisions in
Binary Translation . . . . . . . . . . . 57:1--57:??
Marco Dürr and
Georg Von Der Brüggen and
Kuan-Hsun Chen and
Jian-Jia Chen End-to-End Timing Analysis of Sporadic
Cause-Effect Chains in Distributed
Systems . . . . . . . . . . . . . . . . 58:1--58:??
Marcos T. Leipnitz and
Gabriel L. Nazar High-Level Synthesis of Approximate
Designs under Real-Time Constraints . . 59:1--59:??
Samah Mohamed Saeed and
Robert Wille and
Ramesh Karri Locking the Design of Building Blocks
for Quantum Circuits . . . . . . . . . . 60:1--60:??
Ram Prasad Mohanty and
Hasindu Gamaarachchi and
Andrew Lambert and
Sri Parameswaran SWARAM: Portable Energy and Cost
Efficient Embedded System for Genomic
Processing . . . . . . . . . . . . . . . 61:1--61:??
Jihye Kim and
Jiwon Lee and
Hankyung Ko and
Donghwan Oh and
Semin Han and
Gwonho Jeong and
Hyunok Oh AuthCropper: Authenticated Image Cropper
for Privacy Preserving Surveillance
Systems . . . . . . . . . . . . . . . . 62:1--62:??
Daniel D. Fong and
Vivek J. Srinivasan and
Kourosh Vali and
Soheil Ghiasi Optode Design Space Exploration for
Clinically-robust Non-invasive Fetal
Oximetry . . . . . . . . . . . . . . . . 63:1--63:??
Lokesh Siddhu and
Preeti Ranjan Panda PredictNcool: Leakage Aware Thermal
Management for $3$D Memories Using a
Lightweight Temperature Predictor . . . 64:1--64:??
Chenlin Ma and
Zhaoyan Shen and
Lei Han and
Zili Shao RMW-F: a Design of RMW-Free Cache Using
Built-in NAND-Flash for SMR Storage . . 65:1--65:??
Yu-Pei Liang and
Tseng-Yi Chen and
Yuan-Hao Chang and
Shuo-Han Chen and
Kam-Yiu Lam and
Wei-Hsin Li and
Wei-Kuan Shih Enabling Sequential-write-constrained
B+-tree Index Scheme to Upgrade Shingled
Magnetic Recording Storage Performance 66:1--66:??
Weiwen Jiang and
Edwin H.-M. Sha and
Xinyi Zhang and
Lei Yang and
Qingfeng Zhuge and
Yiyu Shi and
Jingtong Hu Achieving Super-Linear Speedup across
Multi-FPGA for Real-Time DNN Inference 67:1--67:??
Wei-Chen Wang and
Yuan-Hao Chang and
Tei-Wei Kuo and
Chien-Chung Ho and
Yu-Ming Chang and
Hung-Sheng Chang Achieving Lossless Accuracy with Lossy
Programming for Efficient Neural-Network
Training on NVM-Based Systems . . . . . 68:1--68:??
Zhengguo Chen and
Quan Deng and
Nong Xiao and
Kirk Pruhs and
Youtao Zhang DWMAcc: Accelerating Shift-based CNNs
with Domain Wall Memories . . . . . . . 69:1--69:??
Shail Dave and
Youngbin Kim and
Sasikanth Avancha and
Kyoungwoo Lee and
Aviral Shrivastava dMazeRunner: Executing Perfectly Nested
Loops on Dataflow Accelerators . . . . . 70:1--70:??
Stefano Spellini and
Michele Lora and
Franco Fummi and
Sudipta Chattopadhyay Compositional Design of Multi-Robot
Systems Control Software on ROS . . . . 71:1--71:??
Hashan Roshantha Mendis and
Pi-Cheng Hsiu Accumulative Display Updating for
Intermittent Systems . . . . . . . . . . 72:1--72:??
Biruk B. Seyoum and
Alessandro Biondi and
Giorgio C. Buttazzo FLORA: FLoorplan Optimizer for
Reconfigurable Areas in FPGAs . . . . . 73:1--73:??
Kasra Moazzemi and
Biswadip Maity and
Saehanseul Yi and
Amir M. Rahmani and
Nikil Dutt HESSLE--FREE: Heterogeneous Systems
Leveraging Fuzzy Control for Runtime
Resource Management . . . . . . . . . . 74:1--74:??
Abhishek Vashist and
Andrew Keats and
Sai Manoj Pudukotai Dinakarrao and
Amlan Ganguly Unified Testing and Security Framework
for Wireless Network-on-Chip Enabled
Multi-Core Chips . . . . . . . . . . . . 75:1--75:??
Alexy Torres Aurora Dugo and
Jean-Baptiste Lefoul and
Felipe Gohring De Magalhaes and
Dahman Assal and
Gabriela Nicolescu Cache Locking Content Selection
Algorithms for ARINC-653 Compliant RTOS 76:1--76:??
Aryan Deshwal and
Nitthilan Kanappan Jayakodi and
Biresh Kumar Joardar and
Janardhan Rao Doppa and
Partha Pratim Pande MOOS: a Multi-Objective Design Space
Exploration and Optimization Framework
for NoC Enabled Manycore Systems . . . . 77:1--77:??
Fedor Smirnov and
Behnaz Pourmohseni and
Michael Glaß and
Jürgen Teich IGOR, Get Me the Optimum! Prioritizing
Important Design Decisions During the
DSE of Embedded Systems . . . . . . . . 78:1--78:??
Zhongqi Cheng and
Rainer Dömer Analyzing Variable Entanglement for
Parallel Simulation of SystemC TLM-2.0
Models . . . . . . . . . . . . . . . . . 79:1--79:??
Minjun Seo and
Fadi Kurdahi Efficient Tracing Methodology Using
Automata Processor . . . . . . . . . . . 80:1--80:??
Hadi Brais and
Preeti Ranjan Panda Alleria: an Advanced Memory Access
Profiling Framework . . . . . . . . . . 81:1--81:??
Kartikeya Bhardwaj and
Ching-Yi Lin and
Anderson Sartor and
Radu Marculescu Memory- and Communication-Aware Model
Compression for Distributed Deep
Learning Inference on IoT . . . . . . . 82:1--82:??
Kamyar Mirzazad Barijough and
Zhuoran Zhao and
Andreas Gerstlauer Quality/Latency-Aware Real-time
Scheduling of Distributed Streaming IoT
Applications . . . . . . . . . . . . . . 83:1--83:??
Youchao Wang and
Sam Willis and
Vasileios Tsoutsouras and
Phillip Stanley-Marbell Deriving Equations from Sensor Data
Using Dimensional Function Synthesis . . 84:1--84:??
Xiaotian Dai and
Wanli Chang and
Shuai Zhao and
Alan Burns A Dual-Mode Strategy for
Performance-Maximisation and
Resource-Efficient CPS Design . . . . . 85:1--85:??
Roberto Passerone and
Íñigo Íncer Romeo and
Alberto L. Sangiovanni-Vincentelli Coherent Extension, Composition, and
Merging Operators in Contract Models for
System Design . . . . . . . . . . . . . 86:1--86:??
Omar Bataineh and
David S. Rosenblum and
Mark Reynolds Efficient Decentralized LTL Monitoring
Framework Using Tableau Technique . . . 87:1--87:??
Jan Baumeister and
Bernd Finkbeiner and
Maximilian Schwenger and
Hazem Torfah FPGA Stream-Monitoring of Real-time
Properties . . . . . . . . . . . . . . . 88:1--88:??
Levente Bajczi and
András Vörös and
Vince Molnár Will My Program Break on This Faulty
Processor?: Formal Analysis of Hardware
Fault Activations in Concurrent Embedded
Software . . . . . . . . . . . . . . . . 89:1--89:??
Youngmoon Lee and
Kang G. Shin and
Hoon Sung Chwa Thermal-Aware Scheduling for Integrated
CPUs--GPU Platforms . . . . . . . . . . 90:1--90:??
Peng Chen and
Weichen Liu and
Xu Jiang and
Qingqiang He and
Nan Guan Timing-Anomaly Free Dynamic Scheduling
of Conditional DAG Tasks on Multi-Core
Systems . . . . . . . . . . . . . . . . 91:1--91:??
Yu Wang and
Mojtaba Zarei and
Borzoo Bonakdarpour and
Miroslav Pajic Statistical Verification of
Hyperproperties for Cyber-Physical
Systems . . . . . . . . . . . . . . . . 92:1--92:??
Zhengxiong Luo and
Feilong Zuo and
Yu Jiang and
Jian Gao and
Xun Jiao and
Jiaguang Sun Polar: Function Code Aware Fuzz Testing
of ICS Protocol . . . . . . . . . . . . 93:1--93:??
Youcheng Sun and
Xiaowei Huang and
Daniel Kroening and
James Sharp and
Matthew Hill and
Rob Ashmore Structural Test Coverage Criteria for
Deep Neural Networks . . . . . . . . . . 94:1--94:??
Yi-Ting Lin and
Hsiang Hsu and
Shang-Chien Lin and
Chung-Wei Lin and
Iris Hui-Ru Jiang and
Changliu Liu Graph-Based Modeling, Scheduling, and
Verification for Intersection Management
of Intelligent Vehicles . . . . . . . . 95:1--95:??
Panagiotis Kyriakis and
Jyotirmoy V. Deshmukh and
Paul Bogdan Specification Mining and Robust Design
under Uncertainty: a Stochastic Temporal
Logic Approach . . . . . . . . . . . . . 96:1--96:??
Bineet Ghosh and
Parasara Sridhar Duggirala Robust Reachable Set: Accounting for
Uncertainties in Linear Dynamical
Systems . . . . . . . . . . . . . . . . 97:1--97:??
Ratan Lal and
Pavithra Prabhakar Counterexample Guided Abstraction
Refinement for Polyhedral Probabilistic
Hybrid Systems . . . . . . . . . . . . . 98:1--98:??
Parasara Sridhar Duggirala and
Stanley Bak Aggregation Strategies in Reachable Set
Computation of Hybrid Systems . . . . . 99:1--99:??
Mahmoud Salamati and
Rocco Salvia and
Eva Darulova and
Sadegh Soudjani and
Rupak Majumdar Memory-Efficient Mixed-Precision
Implementations for Robust Explicit
Model Predictive Control . . . . . . . . 100:1--100:??
Florian Arrestier and
Karol Desnos and
Eduardo Juarez and
Daniel Menard Numerical Representation of Directed
Acyclic Graphs for Efficient Dataflow
Embedded Resource Allocation . . . . . . 101:1--101:??
Andreas Ziegler and
Julian Geus and
Bernhard Heinloth and
Timo Hönig and
Daniel Lohmann Honey, I Shrunk the ELFs: Lightweight
Binary Tailoring of Shared Libraries . . 102:1--102:??
Runyu Pan and
Gabriel Parmer MxU: Towards Predictable, Flexible, and
Efficient Memory Access Control for the
Secure IoT . . . . . . . . . . . . . . . 103:1--103:??
Keun Soo Yim and
Iliyan Malchev and
Andrew Hsieh and
Dave Burke Treble: Fast Software Updates by
Creating an Equilibrium in an Active
Software Ecosystem of Globally
Distributed Stakeholders . . . . . . . . 104:1--104:??
Hoang-Dung Tran and
Feiyang Cai and
Manzanas Lopez Diego and
Patrick Musau and
Taylor T. Johnson and
Xenofon Koutsoukos Safety Verification of Cyber-Physical
Systems with Reinforcement Learning
Control . . . . . . . . . . . . . . . . 105:1--105:??
Chao Huang and
Jiameng Fan and
Wenchao Li and
Xin Chen and
Qi Zhu ReachNN: Reachability Analysis of
Neural-Network Controlled Systems . . . 106:1--106:??
Shakiba Yaghoubi and
Georgios Fainekos Worst-case Satisfaction of STL
Specifications Using Feedforward Neural
Network Controllers: a Lagrange
Multipliers Approach . . . . . . . . . . 107:1--107:??
Dominic Oehlert and
Selma Saidi and
Heiko Falk Code-Inherent Traffic Shaping for Hard
Real-Time Systems . . . . . . . . . . . 108:1--108:??
Muhammad Ali Awan and
Konstantinos Bletsas and
Pedro F. Souto and
Benny Akesson and
Eduardo Tovar Techniques and Analysis for
Mixed-criticality Scheduling with
Mode-dependent Server Execution Budgets 109:1--109:??
Joost Van Pinxten and
Marc Geilen and
Twan Basten Parametric Scheduler Characterization 110:1--110:??
Sandeep K. Shukla Editorial: Embedded Computing and
Society . . . . . . . . . . . . . . . . 1--3
Shubham Jain and
Anand Raghunathan CxDNN: Hardware-software Compensation
Methods for Deep Neural Networks on
Resistive Crossbar Systems . . . . . . . 1--23
Saideep Tiku and
Sudeep Pasricha Overcoming Security Vulnerabilities in
Deep Learning-based Indoor Localization
Frameworks on Mobile Devices . . . . . . 1--24
Sakshi Tiwari and
Shreshth Tuli and
Isaar Ahmad and
Ayushi Agarwal and
Preeti Ranjan Panda and
Sreenivas Subramoney REAL: REquest Arbitration in Last Level
Caches . . . . . . . . . . . . . . . . . 1--24
Surinder Sood and
Avinash Malik and
Partha Roop Robust Design and Validation of
Cyber-physical Systems . . . . . . . . . 1--21
Jia Zhou and
Prachi Joshi and
Haibo Zeng and
Renfa Li BTMonitor: Bit-time-based Intrusion
Detection and Attacker Identification in
Controller Area Network . . . . . . . . 1--23
Mengquan Li and
Weichen Liu and
Nan Guan and
Yiyuan Xie and
Yaoyao Ye Hardware-Software Collaborative Thermal
Sensing in Optical
Network-on-Chip--based Manycore Systems 1--24
Katayoun Neshatpour and
Houman Homayoun and
Avesta Sasan ICNN: The Iterative Convolutional Neural
Network . . . . . . . . . . . . . . . . 1--27
Gustav Cedersjö and
Jörn W. Janneck Tÿcho: a Framework for Compiling Stream
Programs . . . . . . . . . . . . . . . . 1--25
Zain A. H. Hammadeh and
Sophie Quinton and
Rolf Ernst Weakly-hard Real-time Guarantees for
Earliest Deadline First Scheduling of
Independent Tasks . . . . . . . . . . . 1--25
Gnanambikai Krishnakumar and
Kommuru Alekhya Reddy and
Chester Rebeiro ALEXIA: a Processor with Lightweight
Extensions for Memory Safety . . . . . . 1--27
Kaige Yan and
Jingweijia Tan and
Longjun Liu and
Xingyao Zhang and
Stanko R. Brankovic and
Jinghong Chen and
Xin Fu Toward Customized Hybrid Fuel-Cell and
Battery-powered Mobile Device for
Individual Users . . . . . . . . . . . . 1--20
Jian-Jun Han and
Sunlu Gong and
Zhenjiang Wang and
Wen Cai and
Dakai Zhu and
Laurence T. Yang Blocking-Aware Partitioned Real-Time
Scheduling for Uniform Heterogeneous
Multicore Platforms . . . . . . . . . . 1:1--1:25
Vicent Sanz Marco and
Ben Taylor and
Zheng Wang and
Yehia Elkhatib Optimizing Deep Learning Inference on
Embedded Systems Through Adaptive Model
Selection . . . . . . . . . . . . . . . 2:1--2:28
Elham Azari and
Sarma Vrudhula ELSA: a Throughput-Optimized Design of
an LSTM Accelerator for
Energy-Constrained Devices . . . . . . . 3:1--3:21
Nitthilan Kanappan Jayakodi and
Syrine Belakaria and
Aryan Deshwal and
Janardhan Rao Doppa Design and Optimization of
Energy-Accuracy Tradeoff Networks for
Mobile Platforms via Pretrained Deep
Models . . . . . . . . . . . . . . . . . 4:1--4:24
Wojciech Romaszkan and
Tianmu Li and
Puneet Gupta 3PXNet: Pruned-Permuted-Packed XNOR
Networks for Edge Machine Learning . . . 5:1--5:23
Clemens Lang and
Isabella Stilkerich Design and Implementation of an Escape
Analysis in the Context of
Safety-Critical Embedded Systems . . . . 6:1--6:20
Wenjian He and
Sanjeev Das and
Wei Zhang and
Yang Liu BBB-CFI: Lightweight CFI Approach
Against Code-Reuse Attacks Using Basic
Block Information . . . . . . . . . . . 7:1--7:22
Adrian Lizarraga and
Jonathan Sprinkle and
Roman Lysecky Automated Model-Based Optimization of
Data-Adaptable Embedded Systems . . . . 8:1--8:22
Sumana Ghosh and
Soumyajit Dey and
Pallab Dasgupta Pattern Guided Integrated Scheduling and
Routing in Multi-Hop Control Networks 9:1--9:28
Fupeng Chen and
Heng Yu and
Yajun Ha Quality Estimation and Optimization of
Adaptive Stereo Matching Algorithms for
Smart Vehicles . . . . . . . . . . . . . 10:1--10:24
Hamid Nejatollahi and
Felipe Valencia and
Subhadeep Banik and
Francesco Regazzoni and
Rosario Cammarota and
Nikil Dutt Synthesis of Flexible Accelerators for
Early Adoption of Ring-LWE Post-quantum
Cryptography . . . . . . . . . . . . . . 11:1--11:17
Osvaldo Navarro and
Jones Yudi and
Javier Hoffmann and
Hector Gerardo Muñoz Hernandez and
Michael Hübner A Machine Learning Methodology for Cache
Memory Design Based on Dynamic
Instructions . . . . . . . . . . . . . . 12:1--12:20
Philipp H. Kindt and
Daniel Yunge and
Robert Diemer and
Samarjit Chakraborty Energy Modeling for the Bluetooth Low
Energy Protocol . . . . . . . . . . . . 13:1--13:32
Arno Luppold and
Dominic Oehlert and
Heiko Falk Compiling for the Worst Case: Memory
Allocation for Multi-task and Multi-core
Hard Real-time Systems . . . . . . . . . 14:1--14:26
Afzal Ahmad and
Muhammad Adeel Pasha FFConv: an FPGA-based Accelerator for
Fast Convolution Layers in Convolutional
Neural Networks . . . . . . . . . . . . 15:1--15:24
Sandeep K. Shukla TECS Editorial: Rethinking and
Re-evaluating in the Time of Crisis . . 16e:1--16e:3
Sanjay Ganapathy and
Swagath Venkataramani and
Giridhur Sriraman and
Balaraman Ravindran and
Anand Raghunathan DyVEDeep: Dynamic Variable Effort Deep
Neural Networks . . . . . . . . . . . . 16:1--16:24
Hugues Smeets and
Matteo Ceriotti and
Pedro José Marrón Adapting Recursive Sinusoidal Software
Oscillators for Low-power Fixed-point
Processors . . . . . . . . . . . . . . . 17:1--17:26
Yuan Cheng and
Guangya Li and
Ngai Wong and
Hai-Bao Chen and
Hao Yu DEEPEYE: a Deeply Tensor-Compressed
Neural Network for Video Comprehension
on Terminal Devices . . . . . . . . . . 18:1--18:25
Ehsan Aerabi and
Milad Bohlouli and
Mohammad Hasan Ahmadi Livany and
Mahdi Fazeli and
Athanasios Papadimitriou and
David Hely Design Space Exploration for
Ultra-Low-Energy and Secure IoT MCUs . . 19:1--19:34
Hwajeong Seo and
Kyuhwang An and
Hyeokdong Kwon and
Zhi Hu Montgomery Multiplication for Public Key
Cryptography on MSP430X . . . . . . . . 20:1--20:15
Saurav Kumar Ghosh and
Jaffer Sheriff R. C. and
Vibhor Jain and
Soumyajit Dey Reliable and Secure
Design-Space-Exploration for
Cyber-Physical Systems . . . . . . . . . 21:1--21:29
Zhuoran Zhao and
Kamyar Mirzazad Barijough and
Andreas Gerstlauer Network-level Design Space Exploration
of Resource-constrained
Networks-of-Systems . . . . . . . . . . 22:1--22:26
Sai Praveen Kadiyala and
Manaar Alam and
Yash Shrivastava and
Sikhar Patranabis and
Muhamed Fauzi Bin Abbas and
Arnab Kumar Biswas and
Debdeep Mukhopadhyay and
Thambipillai Srikanthan LAMBDA: Lightweight Assessment of
Malware for emBeddeD Architectures . . . 23:1--23:31
Tuhin Subhra Das and
Prasun Ghosal and
Navonil Chatterjee and
Arnab Nath and
Akash Banerjee and
Subhojyoti Khastagir Application of Logical Sub-networking in
Congestion-aware Deadlock-free SDmesh
Routing . . . . . . . . . . . . . . . . 24:1--24:26
Yi-Jing Chuang and
Shuo-Han Chen and
Yuan-Hao Chang and
Yu-Pei Liang and
Hsin-Wen Wei and
Wei-Kuan Shih DSTL: a Demand-Based Shingled
Translation Layer for Enabling Adaptive
Address Mapping on SMR Drives . . . . . 25:1--25:21
Amir Behrouzian and
Hadi Alizadeh Ara and
Marc Geilen and
Dip Goswami and
Twan Basten Firmness Analysis of Real-time Tasks . . 26:1--26:24
Ke Liu and
Mengying Zhao and
Lei Ju and
Zhiping Jia and
Jingtong Hu and
Chun Jason Xue Applying Multiple Level Cell to
Non-volatile FPGAs . . . . . . . . . . . 27:1--27:22
Saad Zia Sheikh and
Muhammad Adeel Pasha Energy-efficient Real-time Scheduling on
Multicores: a Novel Approach to Model
Cache Contention . . . . . . . . . . . . 28:1--28:25
Junyan Hu and
Kenli Li and
Chubo Liu and
Keqin Li Game-Based Task Offloading of Multiple
Mobile Devices with QoS in Mobile Edge
Computing Systems of Limited Computation
Capacity . . . . . . . . . . . . . . . . 29:1--29:21
Debasri Saha and
Susmita Sur-Kolay Minimization of WCRT with Recovery
Assurance from Hardware Trojans for
Tasks on FPGA-based Cloud . . . . . . . 1:1--1:25
Vegesna S. M. Srinivasavarma and
Shiv Vidhyut and
Noor Mahammad S. A TCAM-based Caching Architecture
Framework for Packet Classification . . 2:1--2:19
Paolo Pazzaglia and
Youcheng Sun and
Marco Di Natale Generalized Weakly Hard Schedulability
Analysis for Real-Time Periodic Tasks 3:1--3:26
Suraj Paul and
Navonil Chatterjee and
Prasun Ghosal and
Jean-Philippe Diguet Adaptive Task Allocation and Scheduling
on NoC-based Multicore Platforms with
Multitasking Processors . . . . . . . . 4:1--4:26
Sukarn Agarwal and
Hemangee K. Kapoor Improving the Performance of Hybrid
Caches Using Partitioned Victim Caching 5:1--5:27
Jiaji He and
Haocheng Ma and
Yanjiang Liu and
Yiqiang Zhao Golden Chip-Free Trojan Detection
Leveraging Trojan Trigger's Side-Channel
Fingerprinting . . . . . . . . . . . . . 6:1--6:18
Radoslav Ivanov and
Taylor J. Carpenter and
James Weimer and
Rajeev Alur and
George J. Pappas and
Insup Lee Verifying the Safety of Autonomous
Systems with Neural Network Controllers 7:1--7:26
Omar Adel Ibrahim and
Savio Sciancalepore and
Gabriele Oligeri and
Roberto Di Pietro MAGNETO: Fingerprinting USB Flash Drives
via Unintentional Magnetic Emissions . . 8:1--8:26
Mahdi Mohammadpour Fard and
Mahmood Hasanloo and
Mehdi Kargahi Analytical Program Power
Characterization for Battery
Depletion-time Estimation . . . . . . . 9:1--9:9
George Ungureanu and
José Edil Guimarães De Medeiros and
Timmy Sundström and
Ingemar Söderquist and
Anders Åhlander and
Ingo Sander ForSyDe-Atom: Taming Complexity in Cyber
Physical System Design with Layers . . . 10:1--10:27
Keqin Li Heuristic Computation Offloading
Algorithms for Mobile Users in Fog
Computing . . . . . . . . . . . . . . . 11:1--11:28
Celia Dharmaraj and
Vinita Vasudevan and
Nitin Chandrachoodan Optimization of Signal Processing
Applications Using Parameterized Error
Models for Approximate Adders . . . . . 12:1--12:25
Ehsan Atoofian and
Zayan Shaikh and
Ali Jannesari Reducing Energy in GPGPUs through
Approximate Trivial Bypassing . . . . . 13:1--13:27
Nadir A. Carreon and
Sixing Lu and
Roman Lysecky Probabilistic Estimation of Threat
Intrusion in Embedded Systems for
Runtime Detection . . . . . . . . . . . 14:1--14:27
Ali Akbari and
Jonathan Martinez and
Roozbeh Jafari Facilitating Human Activity Data
Annotation via Context-Aware Change
Detection on Smartwatches . . . . . . . 15:1--15:20
Yousun Ko and
Alex Chadwick and
Daniel Bates and
Robert Mullins Lane Compression: a Lightweight Lossless
Compression Method for Machine Learning
on Embedded Systems . . . . . . . . . . 16:1--16:26
Johanna Sepúlveda and
Mathieu Gross and
Andreas Zankl and
Georg Sigl Beyond Cache Attacks: Exploiting the
Bus-based Communication Structure for
Powerful On-Chip Microarchitectural
Attacks . . . . . . . . . . . . . . . . 17:1--17:23
Tulika Mitra Editorial: Reimagining \booktitleACM
Transactions on Embedded Computing
Systems (TECS) . . . . . . . . . . . . . 18e:1--18e:3
David Langerman and
Alan George Real-time, High-resolution Depth
Upsampling on Embedded Accelerators . . 18:1--18:22
Hwajeong Seo and
Pakize Sanal and
Reza Azarderakhsh SIKE in 32-bit ARM Processors Based on
Redundant Number System for NIST
Level-II . . . . . . . . . . . . . . . . 19:1--19:23
Mingze Ma and
Rizos Sakellariou Code-size-aware Scheduling of
Synchronous Dataflow Graphs on Multicore
Systems . . . . . . . . . . . . . . . . 20:1--20:24
Bo Yuan and
Xiaofen Lu and
Ke Tang and
Xin Yao Cooperative Coevolution-based Design
Space Exploration for Multi-mode
Dataflow Mapping . . . . . . . . . . . . 21:1--21:25
Vasileios Leon and
George Lentaris and
Evangelos Petrongonas and
Dimitrios Soudris and
Gianluca Furano and
Antonis Tavoularis and
David Moloney Improving
Performance-Power-Programmability in
Space Avionics with Edge Devices: VBN on
Myriad2 SoC . . . . . . . . . . . . . . 22:1--22:23
Elham Shamsa and
Alma Pröbstl and
Nima TaheriNejad and
Anil Kanduri and
Samarjit Chakraborty and
Amir M. Rahmani and
Pasi Liljeberg UBAR: User- and Battery-aware Resource
Management for Smartphones . . . . . . . 23:1--23:25
Michel Rottleuthner and
Thomas C. Schmidt and
Matthias Wählisch Sense Your Power: The ECO Approach to
Energy Awareness for IoT Devices . . . . 24:1--24:25
James Marshall and
Robert Gifford and
Gedare Bloom and
Gabriel Parmer and
Rahul Simha Precise Cache Profiling for Studying
Radiation Effects . . . . . . . . . . . 25:1--25:25
Prawar Poudel and
Biswajit Ray and
Aleksandar Milenkovic Microcontroller Fingerprinting Using
Partially Erased NOR Flash Memory Cells 26:1--26:23
Alain Girault and
Reinhard Von Hanxleden Introduction to the Special Issue on
Specification and Design Languages (FDL
2019) . . . . . . . . . . . . . . . . . 27:1--27:3
Zhendong Shi and
Haocheng Ma and
Qizhi Zhang and
Yanjiang Liu and
Yiqiang Zhao and
Jiaji He Test Generation for Hardware Trojan
Detection Using Correlation Analysis and
Genetic Algorithm . . . . . . . . . . . 28:1--28:20
Riley Jackson and
Jonathan Gresl and
Ramon Lawrence Efficient External Sorting for
Memory-Constrained Embedded Devices with
Flash Memory . . . . . . . . . . . . . . 29:1--29:21
Mahbubur Rahman and
Dali Ismail and
Venkata P. Modekurthy and
Abusayeed Saifullah LPWAN in the TV White Spaces: a
Practical Implementation and Deployment
Experiences . . . . . . . . . . . . . . 30:1--30:26
Nicola Bombieri and
Silvia Scaffeo and
Antonio Mastrandrea and
Simone Caligola and
Tommaso Carlucci and
Franco Fummi and
Carlo Laudanna and
Gabriela Constantin and
Rosalba Giugno SystemC Implementation of Stochastic
Petri Nets for Simulation and
Parameterization of Biological Networks 31:1--31:20
Lukas Gressl and
Christian Steger and
Ulrich Neffe Design Space Exploration for Secure IoT
Devices and Cyber-Physical Systems . . . 32:1--32:24
Friederike Bruns and
Irune Yarza and
Philipp Ittershagen and
Kim Grüttner Time Measurement and Control Blocks for
Bare-Metal C++ Applications . . . . . . 34:1--34:26
Guillaume Dupont and
Yamine Ait-Ameur and
Neeraj Kumar Singh and
Marc Pantel Event-B Hybridation: a Proof and
Refinement-based Framework for Modelling
Hybrid Systems . . . . . . . . . . . . . 35:1--35:37
Alexander Schulz-Rosengarten and
Steven Smyth and
Michael Mendler Toward Object-oriented Modeling in
SCCharts . . . . . . . . . . . . . . . . 37:1--37:26
David Broman Interactive Programmatic Modeling . . . 33:1--33:26
Marten Lohstroh and
Christian Menard and
Soroush Bateni and
Edward A. Lee Toward a Lingua Franca for Deterministic
Concurrent Systems . . . . . . . . . . . 36:1--36:27
Aviral Shrivastava and
Jian-Jia Chen and
Youtao Zhang Introduction to the Special Issue on
Languages, Compilers, Tools, and Theory
of Embedded Systems: Part 1 . . . . . . 30:1--30:3
Wanli Chang and
Ran Wei and
Shuai Zhao and
Andy Wellings and
Jim Woodcock and
Alan Burns Development Automation of Real-Time
Java: Model-Driven Transformation and
Synthesis . . . . . . . . . . . . . . . 31:1--31:26
Vanchinathan Venkataramani and
Aditi Kulkarni and
Tulika Mitra and
Li-Shiuan Peh SPECTRUM: a Software-defined Predictable
Many-core Architecture for LTE/5G
Baseband Processing . . . . . . . . . . 32:1--32:28
Federico Reghenzani and
Luca Santinelli and
William Fornaciari Dealing with Uncertainty in pWCET
Estimations . . . . . . . . . . . . . . 33:1--33:23
Alejandro J. Calderón and
Leonidas Kosmidis and
Carlos F. Nicolás and
Francisco J. Cazorla and
Peio Onaindia GMAI: Understanding and Exploiting the
Internals of GPU Resource Allocation in
Critical Systems . . . . . . . . . . . . 34:1--34:23
Chundong Wang and
Sudipta Chattopadhyay and
Gunavaran Brihadiswarn Crab-tree: a Crash Recoverable B+-tree
Variant for Persistent Memory with ARMv8
Architecture . . . . . . . . . . . . . . 35:1--35:26
Cyril Bresch and
David Hély and
Roman Lysecky and
Stéphanie Chollet and
Ioannis Parissis TrustFlow-X: a Practical Framework for
Fine-grained Control-flow Integrity in
Critical Systems . . . . . . . . . . . . 36:1--36:26
Georgy Lukyanov and
Andrey Mokhov and
Jakob Lechner Formal Verification of Spacecraft
Control Programs . . . . . . . . . . . . 37:1--37:18
Sai Praveen Kadiyala and
Pranav Jadhav and
Siew-Kei Lam and
Thambipillai Srikanthan Hardware Performance Counter-Based
Fine-Grained Malware Detection . . . . . 38:1--38:17
Greg Stitt and
David Campbell PANDORA: an Architecture-Independent
Parallelizing Approximation-Discovery
Framework . . . . . . . . . . . . . . . 39:1--39:17
Ehsan Atoofian Approximate Cache in GPGPUs . . . . . . 40:1--40:22
Aviral Shrivastava and
Jian-Jia Chen and
Youtao Zhang Introduction to the Special Issue on
Languages, Compilers, Tools, and Theory
of Embedded Systems: Part 2 . . . . . . 41:1--41:2
Luke Hsiao and
Sen Wu and
Nicholas Chiang and
Christopher Ré and
Philip Levis Creating Hardware Component Knowledge
Bases with Training Data Generation and
Multi-task Learning . . . . . . . . . . 42:1--42:26
Mohammad Samragh and
Mojan Javaheripi and
Farinaz Koushanfar EncoDeep: Realizing Bit-flexible
Encoding for Deep Neural Networks . . . 43:1--43:29
Asif Ali Khan and
Norman A. Rink and
Fazal Hameed and
Jeronimo Castrillon Optimizing Tensor Contractions for
Embedded Devices with Racetrack and DRAM
Memories . . . . . . . . . . . . . . . . 44:1--44:26
Saad Ahmed and
Naveed Anwar Bhatti and
Muhammad Hamad Alizai and
Junaid Haroon Siddiqui and
Luca Mottola Fast and Energy-Efficient State
Checkpointing for Intermittent Computing 45:1--45:27
Xinyi Li and
Lei Zhang and
Xipeng Shen DIAC: an Inter-app Conflicts Detector
for Open IoT Systems . . . . . . . . . . 46:1--46:25
Saad Ahmed and
Muhammad Nawaz and
Abu Bakar and
Naveed Anwar Bhatti and
Muhammad Hamad Alizai and
Junaid Haroon Siddiqui and
Luca Mottola Demystifying Energy Consumption Dynamics
in Transiently powered Computers . . . . 47:1--47:25
April W. Wade and
Prasad A. Kulkarni and
Michael R. Jantz Exploring Impact of Profile Data on Code
Quality in the HotSpot JVM . . . . . . . 48:1--48:26
Nico Reissmann and
Jan Christian Meyer and
Helge Bahmann and
Magnus Själander RVSDG: an Intermediate Representation
for Optimizing Compilers . . . . . . . . 49:1--49:28
Ioannis Latifis and
Karthick Parashar and
Grigoris Dimitroulakos and
Hans Cappelle and
Christakis Lezos and
Konstantinos Masselos and
Francky Catthoor A Retargetable MATLAB-to-C Compiler
Exploiting Custom Instructions and Data
Parallelism . . . . . . . . . . . . . . 50:1--50:27
Alexandru E. Susu A Vector-Length Agnostic Compiler for
the Connex-S Accelerator with Scratchpad
Memory . . . . . . . . . . . . . . . . . 51:1--51:30
Edward A. Lee Determinism . . . . . . . . . . . . . . 38:1--38:34
Vasileios Leon and
Theodora Paparouni and
Evangelos Petrongonas and
Dimitrios Soudris and
Kiamal Pekmestzi Improving Power of DSP and CNN Hardware
Accelerators Using Approximate
Floating-point Multipliers . . . . . . . 39:1--39:21
Andrés Amaya García and
David May and
Ed Nutting Integrated Hardware Garbage Collection 40:1--40:25
Yuanbin Zhou and
Soheil Samii and
Petru Eles and
Zebo Peng Reliability-aware Scheduling and Routing
for Messages in Time-sensitive
Networking . . . . . . . . . . . . . . . 41:1--41:24
Giacomo Valente and
Tiziana Fanni and
Carlo Sau and
Tania Di Mascio and
Luigi Pomante and
Francesca Palumbo A Composable Monitoring System for
Heterogeneous Embedded Platforms . . . . 42:1--42:34
Deniz Akdur Skills Gaps in the Industry: Opinions of
Embedded Software Practitioners . . . . 43:1--43:39
Rashid Aligholipour and
Mohammad Baharloo and
Behnam Farzaneh and
Meisam Abdollahi and
Ahmad Khonsari TAMA: Turn-aware Mapping and
Architecture --- a Power-efficient
Network-on-Chip Approach . . . . . . . . 44:1--44:24
Sanjit Kumar Roy and
Rajesh Devaraj and
Arnab Sarkar and
Debabrata Senapati SLAQA: Quality-level Aware Scheduling of
Task Graphs on Heterogeneous Distributed
Systems . . . . . . . . . . . . . . . . 45:1--45:31
Venkata P. Modekurthy and
Abusayeed Saifullah and
Sanjay Madria A Distributed Real-time Scheduling
System for Industrial Wireless Networks 46:1--46:28
Björn Forsberg and
Marco Solieri and
Marko Bertogna and
Luca Benini and
Andrea Marongiu The Predictable Execution Model in
Practice: Compiling Real Applications
for COTS Hardware . . . . . . . . . . . 47:1--47:25
Biswadip Maity and
Bryan Donyanavard and
Anmol Surhonne and
Amir Rahmani and
Andreas Herkersdorf and
Nikil Dutt SEAMS: Self-Optimizing Runtime Manager
for Approximate Memory Hierarchies . . . 48:1--48:26
Michael Witterauf and
Dominik Walter and
Frank Hannig and
Jürgen Teich Symbolic Loop Compilation for Tightly
Coupled Processor Arrays . . . . . . . . 49:1--49:31
Márton Búr and
Kristóf Marussy and
Brett H. Meyer and
Dániel Varró Worst-case Execution Time Calculation
for Query-based Monitors by Witness
Generation . . . . . . . . . . . . . . . 107:1--107:36
Jurn-Gyu Park and
Nikil Dutt and
Sung-Soo Lim An Interpretable Machine Learning Model
Enhanced Integrated CPU--GPU DVFS
Governor . . . . . . . . . . . . . . . . 108:1--108:28
Kaustabha Ray and
Ansuman Banerjee Horizontal Auto-Scaling for Multi-Access
Edge Computing Using Safe Reinforcement
Learning . . . . . . . . . . . . . . . . 109:1--109:33
Furkan Aydin and
Aydin Aysu and
Mohit Tiwari and
Andreas Gerstlauer and
Michael Orshansky Horizontal Side-Channel Vulnerabilities
of Post-Quantum Key Exchange and
Encapsulation Protocols . . . . . . . . 110:1--110:22
J. S. P. Giraldo and
Marian Verhelst Hardware Acceleration for Embedded
Keyword Spotting: Tutorial and Survey 111:1--111:25
Junio Cezar Ribeiro Da Silva and
Lorena Leão and
Vinicius Petrucci and
Abdoulaye Gamatié and
Fernando Magno Quintão Pereira Mapping Computations in Heterogeneous
Multicore Systems with Statistical
Regression on Program Inputs . . . . . . 112:1--112:35
Yu Wang and
Nima Roohi and
Matthew West and
Mahesh Viswanathan and
Geir E. Dullerud Verifying Stochastic Hybrid Systems with
Temporal Logic Specifications via Model
Reduction . . . . . . . . . . . . . . . 113:1--113:27
Jason Servais and
Ehsan Atoofian Adaptive Computation Reuse for
Energy-Efficient Training of Deep Neural
Networks . . . . . . . . . . . . . . . . 114:1--114:24
Kanika Saini and
Sheetal Kalra and
Sandeep K. Sood IoT-Fog-Cloud Centric Earthquake
Monitoring and Prediction . . . . . . . 115:1--115:26
Yuan-Hao Chang and
Jalil Boukhobza and
Song Han Introduction to the Special Issue on
Memory and Storage Systems for Embedded
and IoT Applications . . . . . . . . . . 1:1--1:4
Sheel Sindhu Manohar and
Sparsh Mittal and
Hemangee K. Kapoor CORIDOR: Using COherence and TempoRal
LocalIty to Mitigate Read Disurbance
ErrOR in STT--RAM Caches . . . . . . . . 2:1--2:24
Tommaso Marinelli and
José Ignacio Gómez Pérez and
Christian Tenllado and
Manu Komalan and
Mohit Gupta and
Francky Catthoor Microarchitectural Exploration of
STT--MRAM Last-level Cache Parameters
for Energy-efficient Devices . . . . . . 3:1--3:20
Robert Wittig and
Philipp Schulz and
Emil Matus and
Gerhard P. Fettweis Accurate Estimation of Service Rates in
Interleaved Scratchpad Memory Systems 4:1--4:15
Christian Hakert and
Kuan-Hsun Chen and
Horst Schirmeier and
Lars Bauer and
Paul R. Genssler and
Georg von der Brüggen and
Hussam Amrouch and
Jörg Henkel and
Jian-Jia Chen Software-Managed Read and Write
Wear-Leveling for Non-Volatile Main
Memory . . . . . . . . . . . . . . . . . 5:1--5:24
Kazi Asifuzzaman and
Rommel Sánchez Verdejo and
Petar Radojkovi\'c Performance and Power Estimation of
STT--MRAM Main Memory with Reliable
System-level Simulation . . . . . . . . 6:1--6:25
Dongsuk Shin and
Hakbeom Jang and
Kiseok Oh and
Jae W. Lee An Energy-Efficient DRAM Cache
Architecture for Mobile Platforms With
PCM-Based Main Memory . . . . . . . . . 7:1--7:22
Fei Wen and
Mian Qin and
Paul Gratz and
Narasimha Reddy Software Hint-Driven Data Management for
Hybrid Memory in Mobile Systems . . . . 8:1--8:18
Yu Zou and
Amro Awad and
Mingjie Lin DirectNVM: Hardware-accelerated NVMe
SSDs for High-performance Embedded
Computing . . . . . . . . . . . . . . . 9:1--9:24
Katherine Missimer and
Manos Athanassoulis and
Richard West Telomere: Real-Time NAND Flash Storage 10:1--10:24
Yu Zou and
Kazi Abu Zubair and
Mazen Alwadi and
Rakin Muhammad Shadab and
Sanjay Gandham and
Amro Awad and
Mingjie Lin ARES: Persistently Secure Non-Volatile
Memory with Processor-transparent and
Hardware-friendly Integrity Verification
and Metadata Recovery . . . . . . . . . 11:1--11:32
Albin Eldstål-Ahrens and
Angelos Arelakis and
Ioannis Sourdis L$^2$C: Combining Lossy and Lossless
Compression on Memory and I/O . . . . . 12:1--12:27
Lanshun Nie and
Chenghao Fan and
Shuang Lin and
Li Zhang and
Yajuan Li and
Jing Li Holistic Resource Allocation Under
Federated Scheduling for Parallel
Real-time Tasks . . . . . . . . . . . . 13:1--13:29
Svetlana Minakova and
Dolly Sapra and
Todor Stefanov and
Andy D. Pimentel Scenario Based Run-Time Switching for
Adaptive CNN-Based Applications at the
Edge . . . . . . . . . . . . . . . . . . 14:1--14:33
Xing Chen and
Umit Ogras and
Chaitali Chakrabarti Probabilistic Risk-Aware Scheduling with
Deadline Constraint for Heterogeneous
SoCs . . . . . . . . . . . . . . . . . . 15:1--15:27
Jiankuo Dong and
Fangyu Zheng and
Jingqiang Lin and
Zhe Liu and
Fu Xiao and
Guang Fan EC-ECC: Accelerating Elliptic Curve
Cryptography for Edge Computing on
Embedded GPU TX2 . . . . . . . . . . . . 16:1--16:25
Arnab Kumar Biswas and
Biplab Sikdar Protecting Network-on-Chip Intellectual
Property Using Timing Channel
Fingerprinting . . . . . . . . . . . . . 17:1--17:21
Jianwei Liao and
Jun Li and
Mingwang Zhao and
Zhibing Sha and
Zhigang Cai Read Refresh Scheduling and Data
Reallocation against Read Disturb in
SSDs . . . . . . . . . . . . . . . . . . 18:1--18:27
Ziyang Hong and
C. Patrick Yue Efficient-Grad: Efficient Training Deep
Convolutional Neural Networks on Edge
Devices with Gradient Optimizations . . 19:1--19:24
Qingling Zhao and
Mengfei Qu and
Zonghua Gu and
Haibo Zeng Minimizing Stack Memory for Partitioned
Mixed-criticality Scheduling on
Multiprocessor Platforms . . . . . . . . 20:1--20:30
Yuan-Hao Chang and
Jalil Boukhobza and
Song Han Introduction to the Special Issue on
Memory and Storage Systems for Embedded
and IoT Applications: Part 2 . . . . . . 21:1--21:2
Saransh Gupta and
Behnam Khaleghi and
Sahand Salamat and
Justin Morris and
Ranganathan Ramkumar and
Jeffrey Yu and
Aniket Tiwari and
Jaeyoung Kang and
Mohsen Imani and
Baris Aksanli and
Tajana Simuni\'c Rosing Store-n-Learn: Classification and
Clustering with Hyperdimensional
Computing across Flash Hierarchy . . . . 22:1--22:25
Julian L. Rrushi Physics-Driven Page Fault Handling for
Customized Deception against CPS Malware 23:1--23:36
Wei-Ting Lin and
Hsiang-Yun Cheng and
Chia-Lin Yang and
Meng-Yao Lin and
Kai Lien and
Han-Wen Hu and
Hung-Sheng Chang and
Hsiang-Pang Li and
Meng-Fan Chang and
Yen-Ting Tsou and
Chin-Fu Nien DL-RSIM: a Reliability and Deployment
Strategy Simulation Framework for
ReRAM-based CNN Accelerators . . . . . . 24:1--24:29
Qian Wei and
Bingzhe Li and
Wanli Chang and
Zhiping Jia and
Zhaoyan Shen and
Zili Shao A Survey of Blockchain Data Management
Systems . . . . . . . . . . . . . . . . 25:1--25:28
Zhenyu Bai and
Hugues Cassé and
Marianne De Michiel and
Thomas Carle and
Christine Rochange A Framework for Calculating WCET Based
on Execution Decision Diagrams . . . . . 26:1--26:26
Shihao Song and
Harry Chong and
Adarsha Balaji and
Anup Das and
James Shackleford and
Nagarajan Kandasamy DFSynthesizer: Dataflow-based Synthesis
of Spiking Neural Networks to
Neuromorphic Hardware . . . . . . . . . 27:1--27:35
Jun Xiao and
Yixian Shen and
Andy D. Pimentel Cache Interference-aware Task
Partitioning for Non-preemptive
Real-time Multi-core Systems . . . . . . 28:1--28:28
Salim Ullah and
Siva Satyendra Sahoo and
Nemath Ahmed and
Debabrata Chaudhury and
Akash Kumar AppAxO: Designing Application-specific
Approximate Operators for FPGA-based
Embedded Systems . . . . . . . . . . . . 29:1--29:31
Yi-Syuan Lin and
Yu-Pei Liang and
Tseng-Yi Chen and
Yuan-Hao Chang and
Shuo-Han Chen and
Hsin-Wen Wei and
Wei-Kuan Shih How to Enable Index Scheme for Reducing
the Writing Cost of DNA Storage on
Insertion and Deletion . . . . . . . . . 30:1--30:25
Pani Prithvi Raj and
Pakala Akhil Reddy and
Nitin Chandrachoodan Reduced Memory Viterbi Decoding for
Hardware-accelerated Speech Recognition 31:1--31:18
Harsh Desai and
Matteo Nardello and
Davide Brunelli and
Brandon Lucia Camaroptera: a Long-range Image Sensor
with Local Inference for Remote Sensing
Applications . . . . . . . . . . . . . . 32:1--32:25
Jiachen Mao and
Qing Yang and
Ang Li and
Kent W. Nixon and
Hai Li and
Yiran Chen Toward Efficient and Adaptive Design of
Video Detection System with Deep Neural
Networks . . . . . . . . . . . . . . . . 33:1--33:21
Cong Chen and
Zhong Hong and
Jian-Min Jiang Scheduling in Real-Time Mobile Systems 34:1--34:36
Jelena Trajkovic and
Sara Karimi and
Samantha Hangsan and
Wenlu Zhang Prediction Modeling for
Application-Specific Communication
Architecture Design of Optical NoC . . . 35:1--35:??
Archanaa S. Krishnan and
Patrick Schaumont Benchmarking and Configuring Security
Levels in Intermittent Computing . . . . 36:1--36:??
Shihua Huang and
Luc Waeijen and
Henk Corporaal How Flexible is Your Computing System? 37:1--37:??
Samuel Isuwa and
Somdip Dey and
Andre P. Ortega and
Amit Kumar Singh and
Bashir M. Al-Hashimi and
Geoff V. Merrett QUAREM: Maximising QoE Through Adaptive
Resource Management in Mobile MPSoC
Platforms . . . . . . . . . . . . . . . 38:1--38:??
Yanfeng Chen and
Tianyu Zhang and
Fanxin Kong and
Lin Zhang and
Qingxu Deng Attack-resilient Fusion of Sensor Data
with Uncertain Delays . . . . . . . . . 39:1--39:??
Maxime France-Pillois and
Abdoulaye Gamatié and
Gilles Sassatelli A Segmented Adaptive Router for Near
Energy-Proportional Networks-on-Chip . . 40:1--40:??
Tanmaya Mishra and
Thidapat Chantem and
Ryan Gerdes Survey of Control-flow Integrity
Techniques for Real-time Embedded
Systems . . . . . . . . . . . . . . . . 41:1--41:??
Tse-Yuan Wang and
Chun-Feng Wu and
Che-Wei Tsao and
Yuan-Hao Chang and
Tei-Wei Kuo and
Xue Liu Rethinking the Interactivity of OS and
Device Layers in Memory Management . . . 42:1--42:??
Xiangzhen Ouyang and
Yian Zhu \pkgwfspan: Wait-free Dynamic Memory
Management . . . . . . . . . . . . . . . 43:1--43:??
Kyubaik Choi and
Gerald E. Sobelman An Efficient CNN Accelerator for
Low-Cost Edge Systems . . . . . . . . . 44:1--44:??
Qingling Zhao and
Mingqiang Chen and
Zonghua Gu and
Siyu Luan and
Haibo Zeng and
Samarjit Chakrabory CAN Bus Intrusion Detection Based on
Auxiliary Classifier GAN and
Out-of-distribution Detection . . . . . 45:1--45:??
Francesco Daghero and
Alessio Burrello and
Chen Xie and
Marco Castellano and
Luca Gandolfi and
Andrea Calimera and
Enrico Macii and
Massimo Poncino and
Daniele Jahier Pagliari Human Activity Recognition on
Microcontrollers with Quantized and
Adaptive Deep Neural Networks . . . . . 46:1--46:??
Muhammad Shafique and
Theocharis Theocharides and
Hai Li and
Chun Jason Xue Introduction to the Special Issue on
Accelerating AI on the Edge --- Part 1 47:1--47:??
Javier Mendez and
Kay Bierzynski and
M. P. Cuéllar and
Diego P. Morales Edge Intelligence: Concepts,
Architectures, Applications, and Future
Directions . . . . . . . . . . . . . . . 48:1--48:??
Chih-Kai Kang and
Hashan Roshantha Mendis and
Chun-Han Lin and
Ming-Syan Chen and
Pi-Cheng Hsiu More Is Less: Model Augmentation for
Intermittent Deep Inference . . . . . . 49:1--49:??
Shien Zhu and
Luan H. K. Duong and
Weichen Liu TAB: Unified and Optimized Ternary,
Binary, and Mixed-precision Neural
Network Inference on the Edge . . . . . 50:1--50:??
Eunjin Jeong and
Jangryul Kim and
Soonhoi Ha TensorRT-Based Framework and
Optimization Methodology for Deep
Learning Inference on Jetson Boards . . 51:1--51:??
Souvik Kundu and
Yao Fu and
Bill Ye and
Peter A. Beerel and
Massoud Pedram Toward Adversary-aware Non-iterative
Model Pruning through Dynamic Network
Rewiring of DNNs . . . . . . . . . . . . 52:1--52:??
Francesco Paissan and
Alberto Ancilotto and
Elisabetta Farella PhiNets: a Scalable Backbone for
Low-power AI at the Edge . . . . . . . . 53:1--53:??
Andres Gomez and
Andreas Tretter and
Pascal Alexander Hager and
Praveenth Sanmugarajah and
Luca Benini and
Lothar Thiele Dataflow Driven Partitioning of Machine
Learning Applications for Optimal Energy
Use in Batteryless Systems . . . . . . . 54:1--54:??
Basar Kutukcu and
Sabur Baidya and
Anand Raghunathan and
Sujit Dey Contention Grading and Adaptive Model
Selection for Machine Vision in Embedded
Systems . . . . . . . . . . . . . . . . 55:1--55:??
Petar Jokic and
Erfan Azarkhish and
Andrea Bonetti and
Marc Pons and
Stephane Emery and
Luca Benini A Construction Kit for Efficient Low
Power Neural Network Accelerator Designs 56:1--56:??
Salonik Resch and
S. Karen Khatamifard and
Zamshed I. Chowdhury and
Masoud Zabihi and
Zhengyang Zhao and
Husrev Cilasun and
Jian-Ping Wang and
Sachin S. Sapatnekar and
Ulya R. Karpuzcu Energy-efficient and Reliable Inference
in Nonvolatile Memory under Extreme
Operating Conditions . . . . . . . . . . 57:1--57:??
Benedict Herzog and
Stefan Reif and
Judith Hemp and
Timo Hönig and
Wolfgang Schröder-Preikschat Resource-demand Estimation for Edge
Tensor Processing Units . . . . . . . . 58:1--58:??
Maedeh Hemmat and
Joshua San Miguel and
Azadeh Davoodi CAP'NN: a Class-aware Framework for
Personalized Neural Network Inference 59:1--59:??
Jun-Hyung Park and
Kang-Min Kim and
Sangkeun Lee Quantized Sparse Training: a Unified
Trainable Framework for Joint Pruning
and Quantization in DNNs . . . . . . . . 60:1--60:??
Mohammadreza Baharani and
Hamed Tabkhi ATCN: Resource-efficient Processing of
Time Series on Edge . . . . . . . . . . 61:1--61:??
Vidushi Goyal and
Reetuparna Das and
Valeria Bertacco Hardware-friendly User-specific Machine
Learning for Edge Devices . . . . . . . 62:1--62:??
Biji George and
Om Ji Omer and
Ziaul Choudhury and
Anoop V and
Sreenivas Subramoney A Unified Programmable Edge Matrix
Processor for Deep Neural Networks and
Matrix Algebra . . . . . . . . . . . . . 63:1--63:??
Halima Bouzidi and
Hamza Ouarnoughi and
Smail Niar and
Abdessamad Ait El Cadi Performance Modeling of Computer
Vision-based CNN on Edge GPUs . . . . . 64:1--64:??
Geng Yuan and
Peiyan Dong and
Mengshu Sun and
Wei Niu and
Zhengang Li and
Yuxuan Cai and
Yanyu Li and
Jun Liu and
Weiwen Jiang and
Xue Lin and
Bin Ren and
Xulong Tang and
Yanzhi Wang Mobile or FPGA? A Comprehensive
Evaluation on Energy Efficiency and a
Unified Optimization Framework . . . . . 65:1--65:??
Mehdi Ghasemi and
Daler Rakhmatov and
Carole-Jean Wu and
Sarma Vrudhula EdgeWise: Energy-efficient CNN
Computation on Edge Devices under
Stochastic Communication Delays . . . . 66:1--66:??
Muhammad Shafique and
Theocharis Theocharides and
Hai (Helen) Li and
Chun Jason Xue Introduction to the Special Issue on
Accelerating AI on the Edge --- Part 2 67:1--67:??
Kuan-Hsun Chen and
Chiahui Su and
Christian Hakert and
Sebastian Buschjäger and
Chao-Lin Lee and
Jenq-Kuen Lee and
Katharina Morik and
Jian-Jia Chen Efficient Realization of Decision Trees
for Real-Time Inference . . . . . . . . 68:1--68:??
Hongyi Pan and
Diaa Badawi and
Ahmet Enis Cetin Block Walsh-Hadamard Transform-based
Binary Layers in Deep Neural Networks 69:1--69:??
Arijit Mukherjee and
Jayeeta Mondal and
Swarnava Dey Accelerated Fire Detection and
Localization at Edge . . . . . . . . . . 70:1--70:??
Mario Almeida and
Stefanos Laskaridis and
Stylianos I. Venieris and
Ilias Leontiadis and
Nicholas D. Lane DynO: Dynamic Onloading of Deep Neural
Networks from Cloud to Device . . . . . 71:1--71:??
Vinod Ganesan and
Pratyush Kumar Design and Scaffolded Training of an
Efficient DNN Operator for Computer
Vision on the Edge . . . . . . . . . . . 72:1--72:??
Sina Shahhosseini and
Dongjoo Seo and
Anil Kanduri and
Tianyi Hu and
Sung-Soo Lim and
Bryan Donyanavard and
Amir M. Rahmani and
Nikil Dutt Online Learning for Orchestration of
Inference in Multi-user End-edge-cloud
Networks . . . . . . . . . . . . . . . . 73:1--73:??
Vasileios Tsouvalas and
Aaqib Saeed and
Tanir Ozcelebi Federated Self-training for
Semi-supervised Audio Recognition . . . 74:1--74:??
Edgar Lemaire and
Beno\^\it Miramond and
Sébastien Bilavarn and
Hadi Saoud and
Nassim Abderrahmane Synaptic Activity and Hardware Footprint
of Spiking Neural Networks in Digital
Neuromorphic Systems . . . . . . . . . . 75:1--75:??
Yi Yang and
Murugan Sankaradas and
Srimat Chakradhar DyCo: Dynamic, Contextualized AI Models 76:1--76:??
Shihao Song and
Adarsha Balaji and
Anup Das and
Nagarajan Kandasamy Design-Technology Co-Optimization for
NVM-Based Neuromorphic Processing
Elements . . . . . . . . . . . . . . . . 77:1--77:??
Justin Morris and
Kazim Ergun and
Behnam Khaleghi and
Mohen Imani and
Baris Aksanli and
Tajana Simunic HyDREA: Utilizing Hyperdimensional
Computing for a More Robust and
Efficient Machine Learning System . . . 78:1--78:??
Asif Ali Khan and
Sébastien Ollivier and
Stephen Longofono and
Gerald Hempel and
Jeronimo Castrillon and
Alex K. Jones Brain-inspired Cognition in
Next-generation Racetrack Memories . . . 79:1--79:??
Syed Asad Alam and
Andrew Anderson and
Barbara Barabasz and
David Gregg Winograd Convolution for Deep Neural
Networks: Efficient Point Selection . . 80:1--80:??
Shayan Hassantabar and
Joe Zhang and
Hongxu Yin and
Niraj K. Jha MHDeep: Mental Health Disorder Detection
System Based on Wearable Sensors and
Artificial Neural Networks . . . . . . . 81:1--81:??
Ali HeydariGorji and
Siavash Rezaei and
Mahdi Torabzadehkashi and
Hossein Bobarshad and
Vladimir Alves and
Pai H. Chou Leveraging Computational Storage for
Power-Efficient Distributed Data
Analytics . . . . . . . . . . . . . . . 82:1--82:??
Shuwei Li and
Changhai Man and
Ao Shen and
Ziyi Guan and
Wei Mao and
Shaobo Luo and
Rumin Zhang and
Hao Yu A Fall Detection Network by $2$D\slash
$3$D Spatio-temporal Joint Models with
Tensor Compression on Edge . . . . . . . 83:1--83:??
Taha Soliman and
Nellie Laleni and
Tobias Kirchner and
Franz Müller and
Ashish Shrivastava and
Thomas Kämpfe and
Andre Guntoro and
Norbert Wehn FELIX: a Ferroelectric FET Based Low
Power Mixed-Signal In-Memory
Architecture for DNN Acceleration . . . 84:1--84:??
Clayton Frederick Souza Leite and
Yu Xiao Resource-Efficient Continual Learning
for Sensor-Based Human Activity
Recognition . . . . . . . . . . . . . . 85:1--85:??
Subhankar Pal and
Swagath Venkataramani and
Viji Srinivasan and
Kailash Gopalakrishnan OnSRAM: Efficient Inter-Node On-Chip
Scratchpad Management in Deep Learning
Accelerators . . . . . . . . . . . . . . 86:1--86:??
Xuyi Cai and
Ying Wang and
Lei Zhang Optimus: an Operator Fusion Framework
for Deep Neural Networks . . . . . . . . 1:1--1:??
Deok-Jae Oh and
Yaebin Moon and
Do Kyu Ham and
Tae Jun Ham and
Yongjun Park and
Jae W. Lee and
Jung Ho Ahn and
Eojin Lee MaPHeA: a Framework for Lightweight
Memory Hierarchy-aware Profile-guided
Heap Allocation . . . . . . . . . . . . 2:1--2:??
David Monniaux and
Cyril Six Formally Verified Loop-Invariant Code
Motion and Assorted Optimizations . . . 3:1--3:??
Elliott Wen and
Gerald Weber and
Suranga Nanayakkara WasmAndroid: a Cross-Platform Runtime
for Native Programming Languages on
Android . . . . . . . . . . . . . . . . 4:1--4:??
Weiwei Chen and
Ying Wang and
Ying Xu and
Chengsi Gao and
Cheng Liu and
Lei Zhang A Framework for Neural Network
Architecture and Compile Co-optimization 5:1--5:??
May Young and
Alan J. Hu and
Guy G. F. Lemieux Cache Abstraction for Data Race
Detection in Heterogeneous Systems with
Non-coherent Accelerators . . . . . . . 6:1--6:??
Gianluca Brilli and
Roberto Cavicchioli and
Marco Solieri and
Paolo Valente and
Andrea Marongiu Evaluating Controlled Memory Request
Injection for Efficient Bandwidth
Utilization and Predictable Execution in
Heterogeneous SoCs . . . . . . . . . . . 7:1--7:??
Satyajit Das and
Kevin Martin and
Thomas Peyret and
Philippe Coussy An Efficient and Flexible Stochastic
CGRA Mapping Approach . . . . . . . . . 8:1--8:??
Iman Saberi and
Fathiyeh Faghih and
Farzad Sobhi Bavil A Passive Online Technique for Learning
Hybrid Automata from Input\slash Output
Traces . . . . . . . . . . . . . . . . . 9:1--9:??
Rachel Cleaveland and
Stefan Mitsch and
André Platzer Formally Verified Next-generation
Airborne Collision Avoidance Games in
ACAS X . . . . . . . . . . . . . . . . . 10:1--10:??
Anindan Mondal and
Shubrojyoti Karmakar and
Mahabub Hasan Mahalat and
Suchismita Roy and
Bibhash Sen and
Anupam Chattopadhyay Hardware Trojan Detection using
Transition Probability with Minimal Test
Vectors . . . . . . . . . . . . . . . . 11:1--11:??
Pascal Fradet and
Alain Girault and
Ruby Krishnaswamy and
Xavier Nicollin and
Arash Shafiei RDF: a Reconfigurable Dataflow Model of
Computation . . . . . . . . . . . . . . 12:1--12:??
Alena Rodionova and
Lars Lindemann and
Manfred Morari and
George Pappas Temporal Robustness of Temporal Logic
Specifications: Analysis and Control
Design . . . . . . . . . . . . . . . . . 13:1--13:??
Zirui Xu and
Fuxun Yu and
Chenchen Liu and
Xiang Chen LanCeX: a Versatile and Lightweight
Defense Method against Condensed
Adversarial Attacks in Image and Audio
Recognition . . . . . . . . . . . . . . 14:1--14:??
Wenbo Huang and
Lei Zhang and
Shuoyuan Wang and
Hao Wu and
Aiguo Song Deep Ensemble Learning for Human
Activity Recognition Using Wearable
Sensors via Filter Activation . . . . . 15:1--15:??
Salah Hessien and
Mohamed Hassan PISCOT: a Pipelined Split-Transaction
COTS-Coherent Bus for Multi-Core
Real-Time Systems . . . . . . . . . . . 16:1--16:??
Po-Chen Yeh and
Chin-Hsien Wu and
Yung-Hsiang Lin and
Ming-Yan Wu A Write-Related and Read-Related DRAM
Allocation Strategy Inside Solid-State
Drives (SSDs) . . . . . . . . . . . . . 17:1--17:??
Ali J. Ben Ali and
Marziye Kouroshli and
Sofiya Semenova and
Zakieh Sadat Hashemifar and
Steven Y. Ko and
Karthik Dantu Edge-SLAM: Edge-Assisted Visual
Simultaneous Localization and Mapping 18:1--18:??
Jaime Koh and
Bruno Bodin $K$-Periodic Scheduling for
Throughput-Buffering Trade-Off
Exploration of CSDF . . . . . . . . . . 19:1--19:??
Rolf Ernst and
Dominik Stöhrmann and
Alex Bendrick and
Adam Kostrzewa Application-centric Network Management
--- Addressing Safety and Real-time in
V2X Applications . . . . . . . . . . . . 20:1--20:??
Roger Pujol and
Josep Jorba and
Hamid Tabani and
Leonidas Kosmidis and
Enrico Mezzetti and
Jaume Abella and
Francisco Cazorla Vector Extensions in COTS Processors to
Increase Guaranteed Performance in
Real-Time Systems . . . . . . . . . . . 21:1--21:??
Mir Sarwar and
Rajarshi Ray and
Ansuman Banerjee A Contrastive Plan Explanation Framework
for Hybrid System Models . . . . . . . . 22:1--22:??
Ferhat Erata and
Eren Yildiz and
Arda Goknil and
Kasim Sinan Yildirim and
Jakub Szefer and
Ruzica Piskac and
Gokcin Sezgin ETAP: Energy-aware Timing Analysis of
Intermittent Programs . . . . . . . . . 23:1--23:??
Maria Rafaela Gkeka and
Alexandros Patras and
Nikolaos Tavoularis and
Stylianos Piperakis and
Emmanouil Hourdakis and
Panos Trahanias and
Christos D. Antonopoulos and
Spyros Lalis and
Nikolaos Bellas Reconfigurable System-on-Chip
Architectures for Robust Visual SLAM on
Humanoid Robots . . . . . . . . . . . . 24:1--24:??
Xinyi Hu and
Debiao He and
Min Luo and
Cong Peng and
Qi Feng and
Xinyi Huang High-Performance Implementation of the
Identity-Based Signature Scheme in IEEE
P1363 on GPU . . . . . . . . . . . . . . 25:1--25:??
Atanu Kundu and
Sarthak Das and
Rajarshi Ray SAT-Reach: a Bounded Model Checker for
Affine Hybrid Systems . . . . . . . . . 26:1--26:??
Umit Y. Ogras and
Radu Marculescu and
Trevor N. Mudge and
Michael Kishinevsky Introduction to the Special Issue on
Domain-Specific System-on-Chip
Architectures and Run-Time Management
Techniques . . . . . . . . . . . . . . . 27:1--27:??
Anish Krishnakumar and
Umit Ogras and
Radu Marculescu and
Mike Kishinevsky and
Trevor Mudge Domain-Specific Architectures: Research
Problems and Promising Approaches . . . 28:1--28:??
Yueting Li and
Wang Kang and
Kunyu Zhou and
Keni Qiu and
Weisheng Zhao Experimental Demonstration of
STT-MRAM-based Nonvolatile Instantly
On/Off System for IoT Applications: Case
Studies . . . . . . . . . . . . . . . . 29:1--29:??
Reza Yazdani Aminabadi and
Olatunji Ruwase and
Minjia Zhang and
Yuxiong He and
Jose-Maria Arnau and
Antonio Gonazalez SHARP: an Adaptable, Energy-Efficient
Accelerator for Recurrent Neural
Networks . . . . . . . . . . . . . . . . 30:1--30:??
Behzad Boroujerdian and
Ying Jing and
Devashree Tripathy and
Amit Kumar and
Lavanya Subramanian and
Luke Yen and
Vincent Lee and
Vivek Venkatesan and
Amit Jindal and
Robert Shearer and
Vijay Janapa Reddi FARSI: an Early-stage Design Space
Exploration Framework to Tame the
Domain-specific System-on-chip
Complexity . . . . . . . . . . . . . . . 31:1--31:??
Iulian Brumar and
Georgios Zacharopoulos and
Yuan Yao and
Saketh Rama and
David Brooks and
Gu-Yeon Wei Early DSE and Automatic Generation of
Coarse-grained Merged Accelerators . . . 32:1--32:??
Ahmet Inci and
Siri Virupaksha and
Aman Jain and
Ting-Wu Chin and
Venkata Thallam and
Ruizhou Ding and
Diana Marculescu QUIDAM: a Framework for
Quantization-aware DNN Accelerator and
Model Co-Exploration . . . . . . . . . . 33:1--33:??
Hamzeh Ahangari and
Muhammet Mustafa Özdal and
Özcan Öztürk HLS-based High-throughput and
Work-efficient Synthesizable Graph
Processing Template Pipeline . . . . . . 34:1--34:??
Kalhan Koul and
Jackson Melchert and
Kavya Sreedhar and
Leonard Truong and
Gedeon Nyengele and
Keyi Zhang and
Qiaoyi Liu and
Jeff Setter and
Po-Han Chen and
Yuchen Mei and
Maxwell Strange and
Ross Daly and
Caleb Donovick and
Alex Carsello and
Taeyoung Kong and
Kathleen Feng and
Dillon Huff and
Ankita Nayak and
Rajsekhar Setaluri and
James Thomas and
Nikhil Bhagdikar and
David Durst and
Zachary Myers and
Nestan Tsiskaridze and
Stephen Richardson and
Rick Bahr and
Kayvon Fatahalian and
Pat Hanrahan and
Clark Barrett and
Mark Horowitz and
Christopher Torng and
Fredrik Kjolstad and
Priyanka Raina AHA: an Agile Approach to the Design of
Coarse-Grained Reconfigurable
Accelerators and Compilers . . . . . . . 35:1--35:??
Joshua Mack and
Sahil Hassan and
Nirmal Kumbhare and
Miguel Castro Gonzalez and
Ali Akoglu CEDR: a Compiler-integrated, Extensible
DSSoC Runtime . . . . . . . . . . . . . 36:1--36:??
Huili Chen and
Xinqiao Zhang and
Ke Huang and
Farinaz Koushanfar AdaTest: Reinforcement Learning and
Adaptive Sampling for On-chip Hardware
Trojan Detection . . . . . . . . . . . . 37:1--37:??
Jeff Anderson and
Engin Kayraklioglu and
Hamid Reza Imani and
Chen Shen and
Mario Miscuglio and
Volker J. Sorger and
Tarek El-Ghazawi Virtualizing a Post-Moore's Law Analog
Mesh Processor: The Case of a Photonic
PDE Accelerator . . . . . . . . . . . . 38:1--38:??
Aswathy N. S. and
Arnab Sarkar and
Hemangee Kapoor A Predictable QoS-aware Memory Request
Scheduler for Soft Real-time Systems . . 39:1--39:??
Joseph Sifakis and
David Harel Trustworthy Autonomous System
Development . . . . . . . . . . . . . . 40:1--40:??
Aviral Shrivastava and
Jian-Jia Chen and
Akash Kumar and
Anup Das ACM TECS Special Issue on Embedded
System Security Tutorials . . . . . . . 41:1--41:??
Huili Chen and
Farinaz Koushanfar Tutorial: Toward Robust Deep Learning
against Poisoning Attacks . . . . . . . 42:1--42:??
Jakob Feldtkeller and
Pascal Sasdrich and
Tim Güneysu Challenges and Opportunities of
Security-Aware EDA . . . . . . . . . . . 43:1--43:??
Antti Rautakoura and
Timo Hämäläinen Does SoC Hardware Development Become
Agile by Saying So: a Literature Review
and Mapping Study . . . . . . . . . . . 44:1--44:??
Hammond Pearce and
Ramesh Karri and
Benjamin Tan High-Level Approaches to Hardware
Security: a Tutorial . . . . . . . . . . 45:1--45:??
Kevin Immanuel Gubbi and
Banafsheh Saber Latibari and
Anirudh Srikanth and
Tyler Sheaves and
Sayed Arash Beheshti-Shirazi and
Sai Manoj PD and
Satareh Rafatirad and
Avesta Sasan and
Houman Homayoun and
Soheil Salehi Hardware Trojan Detection Using Machine
Learning: a Tutorial . . . . . . . . . . 46:1--46:??
Tailin Liang and
Lei Wang and
Shaobo Shi and
John Glossner and
Xiaotong Zhang TCX: a RISC Style Tensor Computing
Extension and a Programmable Tensor
Processor . . . . . . . . . . . . . . . 47:1--47:??
Yi Dong and
Wei Huang and
Vibhav Bharti and
Victoria Cox and
Alec Banks and
Sen Wang and
Xingyu Zhao and
Sven Schewe and
Xiaowei Huang Reliability Assessment and Safety
Arguments for Machine Learning
Components in System Assurance . . . . . 48:1--48:??
Zujia Yan and
Yi Zhuang and
Weining Zheng and
Jingjing Gu Multi-bit Data Flow Error Detection
Method Based on SDC Vulnerability
Analysis . . . . . . . . . . . . . . . . 49:1--49:??
Leonie Köhler and
Phil Hertha and
Matthias Beckert and
Alex Bendrick and
Rolf Ernst Robust Cause-Effect Chains with Bounded
Execution Time and System-Level Logical
Execution Time . . . . . . . . . . . . . 50:1--50:??
Shikhar Tuli and
Chia-Hao Li and
Ritvik Sharma and
Niraj K. Jha CODEBench: a Neural Architecture and
Hardware Accelerator Co-Design Framework 51:1--51:??
Saehanseul Yi and
Tae-Wook Kim and
Jong-Chan Kim and
Nikil Dutt EASYR: Energy-Efficient Adaptive System
Reconfiguration for Dynamic Deadlines in
Autonomous Driving on Multicore
Processors . . . . . . . . . . . . . . . 52:1--52:??
Georgios Zacharopoulos and
Adel Ejjeh and
Ying Jing and
En-Yu Yang and
Tianyu Jia and
Iulian Brumar and
Jeremy Intan and
Muhammad Huzaifa and
Sarita Adve and
Vikram Adve and
Gu-Yeon Wei and
David Brooks Trireme: Exploration of Hierarchical
Multi-level Parallelism for Hardware
Acceleration . . . . . . . . . . . . . . 53:1--53:??
Lars Lindemann and
Lejun Jiang and
Nikolai Matni and
George J. Pappas Risk of Stochastic Systems for Temporal
Logic Specifications . . . . . . . . . . 54:1--54:??
Jun Yin and
Marian Verhelst CNN-based Robust Sound Source
Localization with SRP-PHAT for the
Extreme Edge . . . . . . . . . . . . . . 55:1--55:??
Enrico Tabanelli and
Giuseppe Tagliavini and
Luca Benini DNN Is Not All You Need: Parallelizing
Non-neural ML Algorithms on
Ultra-low-power IoT Processors . . . . . 56:1--56:??
Yirui Wu and
Lilai Zhang and
Zonghua Gu and
Hu Lu and
Shaohua Wan Edge-AI-Driven Framework with Efficient
Mobile Network Design for Facial
Expression Recognition . . . . . . . . . 57:1--57:??
Berivan Isik and
Kristy Choi and
Xin Zheng and
Tsachy Weissman and
Stefano Ermon and
H.-S. Philip Wong and
Armin Alaghi Neural Network Compression for Noisy
Storage Devices . . . . . . . . . . . . 58:1--58:??
Tomasz Kloda and
Giovani Gracioli and
Rohan Tabish and
Reza Mirosanlou and
Renato Mancuso and
Rodolfo Pellizzoni and
Marco Caccamo Lazy Load Scheduling for
Mixed-criticality Applications in
Heterogeneous MPSoCs . . . . . . . . . . 59:1--59:??
Pablo Parra and
Antonio Da Silva and
Borja Losa and
J. Ignacio García and
Óscar R. Polo and
Agustín Martínez and
Sebastián Sánchez Tailor-made Virtualization Monitor
Design for CPU Virtualization on LEON
Processors . . . . . . . . . . . . . . . 60:1--60:??
Alexios Papaioannou and
Charalampos S. Kouzinopoulos and
Dimosthenis Ioannidis and
Dimitrios Tzovaras An Ultra-low-power Embedded AI Fire
Detection and Crowd Counting System for
Indoor Areas . . . . . . . . . . . . . . 61:1--61:??
Abhiroop Bhattacharjee and
Abhishek Moitra and
Priyadarshini Panda XploreNAS: Explore Adversarially Robust
and Hardware-efficient Neural
Architectures for Non-ideal Xbars . . . 62:1--62:??
Mario Günzel and
Kuan-Hsun Chen and
Niklas Ueter and
Georg von der Brüggen and
Marco Dürr and
Jian-Jia Chen Compositional Timing Analysis of
Asynchronized Distributed Cause-effect
Chains . . . . . . . . . . . . . . . . . 63:1--63:??
Rakin Muhammad Shadab and
Yu Zou and
Sanjay Gandham and
Amro Awad and
Mingjie Lin HMT: a Hardware-centric Hybrid Bonsai
Merkle Tree Algorithm for
High-performance Authentication . . . . 64:1--64:??
Donghyun Min and
Kihyun Kim and
Chaewon Moon and
Awais Khan and
Seungjin Lee and
Changhwan Yun and
Woosuk Chung and
Youngjae Kim A Multi-tenant Key-value SSD with
Secondary Index for Search Query
Processing and Analysis . . . . . . . . 65:1--65:??
Lin Zhang and
Zifan Wang and
Fanxin Kong Optimal Checkpointing Strategy for
Real-time Systems with Both Logical and
Timing Correctness . . . . . . . . . . . 66:1--66:??
Richard West and
Ahmad Golchin and
Anton Njavro Real-Time USB Networking and Device I/O 67:1--67:??
Maximilian A. Köhl and
Holger Hermanns Model-Based Diagnosis of Real-Time
Systems: Robustness Against Varying
Latency, Clock Drift, and Out-of-Order
Observations . . . . . . . . . . . . . . 68:1--68:??
Prerit Terway and
Niraj K. Jha REPAIRS: Gaussian Mixture Model-based
Completion and Optimization of Partially
Specified Systems . . . . . . . . . . . 69:1--69:??
Yao-Jen Hsu and
Chin-Hsien Wu and
Yu-Chieh Tsai and
Chia-Cheng Liu A Granularity-Based Clustering Method
for Reducing Write Amplification in
Solid-State Drives . . . . . . . . . . . 70:1--70:??
Mina Niknafs and
Petru Eles and
Zebo Peng Runtime Resource Management with
Multiple-Step-Ahead Workload Prediction 71:1--71:??
Alberto Bosio and
Lara Dolecek and
Alexandra Kourfali and
Sri Parameswaran and
Alessandro Savino Special Issue: ``Approximation at the
Edge'' . . . . . . . . . . . . . . . . . 72:1--72:??
Chetana Pradhan and
Martin Letras and
Jürgen Teich Efficient Table-based Function
Approximation on FPGAs Using Interval
Splitting and BRAM Instantiation . . . . 73:1--73:??
Sibendu Paul and
Utsav Drolia and
Y. Charlie Hu and
Srimat Chakradhar AQuA: a New Image Quality Metric for
Optimizing Video Analytics Systems . . . 74:1--74:??
Luis G. León-Vega and
Eduardo Salazar-Villalobos and
Alejandro Rodriguez-Figueroa and
Jorge Castro-Godínez Automatic Generation of Resource and
Accuracy Configurable Processing
Elements . . . . . . . . . . . . . . . . 75:1--75:??
Muhammad Awais and
Ali Zahir and
Syed Ayaz Ali Shah and
Pedro Reviriego and
Anees Ullah and
Nasim Ullah and
Adam Khan and
Hazrat Ali Toward Optimal Softcore Carry-aware
Approximate Multipliers on Xilinx FPGAs 76:1--76:??
Soumendu Kumar Ghosh and
Arnab Raha and
Vijay Raghunathan Energy-Efficient Approximate Edge
Inference Systems . . . . . . . . . . . 77:1--77:??
Ioannis Tsounis and
Dimitris Agiakatsikas and
Mihalis Psarakis A Methodology for Fault-tolerant
Pareto-optimal Approximate Designs of
FPGA-based Accelerators . . . . . . . . 78:1--78:??
Yunjie Pan and
Jiecao Yu and
Andrew Lukefahr and
Reetuparna Das and
Scott Mahlke BitSET: Bit-Serial Early Termination for
Computation Reduction in Convolutional
Neural Networks . . . . . . . . . . . . 98:1--98:??
Zhao Yang and
Qingshuang Sun Energy-efficient Personalized Federated
Search with Graph for Edge Computing . . 99:1--99:??
Yitu Wang and
Shiyu Li and
Qilin Zheng and
Andrew Chang and
Hai Li and
Yiran Chen EMS-i: an Efficient Memory System Design
with Specialized Caching Mechanism for
Recommendation Inference . . . . . . . . 100:1--100:??
Siva Satyendra Sahoo and
Salim Ullah and
Akash Kumar AxOTreeS: a Tree Search Approach to
Synthesizing FPGA-based Approximate
Operators . . . . . . . . . . . . . . . 101:1--101:??
Salma Afifi and
Febin Sunny and
Amin Shafiee and
Mahdi Nikdast and
Sudeep Pasricha GHOST: a Graph Neural Network
Accelerator using Silicon Photonics . . 102:1--102:??
Jiankang Ren and
Chunxiao Liu and
Chi Lin and
Ran Bi and
Simeng Li and
Zheng Wang and
Yicheng Qian and
Zhichao Zhao and
Guozhen Tan Protection Window Based Security-Aware
Scheduling against Schedule-Based
Attacks . . . . . . . . . . . . . . . . 103:1--103:??
Zhibing Sha and
Jiaojiao Wu and
Jun Li and
Balazs Gerofi and
Zhigang Cai and
Jianwei Liao Proactive Stripe Reconstruction to
Improve Cache Use Efficiency of
SSD-Based RAID Systems . . . . . . . . . 104:1--104:??
Hamid Mousavi and
Mohammad Loni and
Mina Alibeigi and
Masoud Daneshtalab DASS: Differentiable Architecture Search
for Sparse Neural Networks . . . . . . . 105:1--105:??
Judicael Clair and
Guy Eichler and
Luca P. Carloni SpikeHard: Efficiency-Driven
Neuromorphic Hardware for Heterogeneous
Systems-on-Chip . . . . . . . . . . . . 106:1--106:??
Artem Klashtorny and
Zhuanhao Wu and
Anirudh Mohan Kaushik and
Hiren Patel Predictable GPU Wavefront Splitting for
Safety-Critical Systems . . . . . . . . 107:1--107:??
Mohanad Odema and
Halima Bouzidi and
Hamza Ouarnoughi and
Smail Niar and
Mohammad Abdullah Al Faruque MaGNAS: a Mapping-Aware Graph Neural
Architecture Search Framework for
Heterogeneous MPSoC Deployment . . . . . 108:1--108:??
Anupam Mondal and
Shreya Gangopadhyay and
Durba Chatterjee and
Harishma Boyapally and
Debdeep Mukhopadhyay PReFeR: Physically Related Function
based Remote Attestation Protocol . . . 109:1--109:??
Sosei Ikeda and
Hiromitsu Awano and
Takashi Sato Modular DFR: Digital Delayed Feedback
Reservoir Model for Enhancing Design
Flexibility . . . . . . . . . . . . . . 110:1--110:??
Vishesh Mishra and
Sparsh Mittal and
Neelofar Hassan and
Rekha Singhal and
Urbi Chatterjee VADF: Versatile Approximate Data Formats
for Energy-Efficient Computing . . . . . 111:1--111:??
Dipal Halder and
Maneesh Merugu and
Sandip Ray ObNoCs: Protecting Network-on-Chip
Fabrics Against Reverse-Engineering
Attacks . . . . . . . . . . . . . . . . 112:1--112:??
Toygun Basaklar and
A. Alper Goksoy and
Anish Krishnakumar and
Suat Gumussoy and
Umit Y. Ogras DTRL: Decision Tree-based
Multi-Objective Reinforcement Learning
for Runtime Task Scheduling in
Domain-Specific System-on-Chips . . . . 113:1--113:??
Tzung-Han Juang and
Christof Schlaak and
Christophe Dubach Let Coarse-Grained Resources Be Shared:
Mapping Entire Neural Networks on FPGAs 114:1--114:??
Suyash Bakshi and
Lennart Johnsson Computationally Efficient DNN Mapping
Search Heuristic using Deep
Reinforcement Learning . . . . . . . . . 115:1--115:??
Dina Hussein and
Ganapati Bhat CIM: a Novel Clustering-based
Energy-Efficient Data Imputation Method
for Human Activity Recognition . . . . . 116:1--116:??
Akshara Ravi and
Vivek Chaturvedi and
Muhammad Shafique ViT4Mal: Lightweight Vision Transformer
for Malware Detection on Edge Devices 117:1--117:??
Dipika Deb and
John Jose ZPP: a Dynamic Technique to Eliminate
Cache Pollution in NoC based MPSoCs . . 118:1--118:??
Shin-Ting Wu and
Liang-Chi Chen and
Po-Chun Huang and
Yuan-Hao Chang and
Chien-Chung Ho and
Wei-Kuan Shih WARM-tree: Making Quadtrees
Write-efficient and Space-economic on
Persistent Memories . . . . . . . . . . 119:1--119:??
Yixian Shen and
Leo Schreuders and
Anuj Pathania and
Andy D. Pimentel Thermal Management for $3$D-Stacked
Systems via Unified Core-Memory Power
Regulation . . . . . . . . . . . . . . . 120:1--120:??
Flavio Ponzina and
Marco Rios and
Alexandre Levisse and
Giovanni Ansaloni and
David Atienza Overflow-free Compute Memories for Edge
AI Acceleration . . . . . . . . . . . . 121:1--121:??
Kourosh Vali and
Ata Vafi and
Begum Kasap and
Soheil Ghiasi BASS: Safe Deep Tissue Optical Sensing
for Wearable Embedded Systems . . . . . 122:1--122:??
Shuo Huai and
Hao Kong and
Xiangzhong Luo and
Shiqing Li and
Ravi Subramaniam and
Christian Makaya and
Qian Lin and
Weichen Liu CRIMP: Compact & Reliable DNN Inference
on In-Memory Processing via
Crossbar-Aligned Compression and
Non-ideality Adaptation . . . . . . . . 123:1--123:??
Chih-Hsuan Yen and
Hashan Roshantha Mendis and
Tei-Wei Kuo and
Pi-Cheng Hsiu Keep in Balance: Runtime-reconfigurable
Intermittent Deep Inference . . . . . . 124:1--124:??
Danish Gufran and
Sudeep Pasricha FedHIL: Heterogeneity Resilient
Federated Learning for Robust Indoor
Localization with Mobile Devices . . . . 125:1--125:??
Chengpeng Xia and
Yawen Chen and
Haibo Zhang and
Jigang Wu STADIA: Photonic Stochastic Gradient
Descent for Neural Network Accelerators 126:1--126:??
Jung-Hsiu Chang and
Tzu-Yu Chang and
Yi-Chao Shih and
Tseng-Yi Chen LaDy: Enabling Locality-aware
Deduplication Technology on Shingled
Magnetic Recording Drives . . . . . . . 127:1--127:??
Yi-Han Lien and
Yen-Ting Chen and
Yuan-Hao Chang and
Yu-Pei Liang and
Wei-Kuan Shih FSIMR: File-system-aware Data Management
for Interlaced Magnetic Recording . . . 128:1--128:??
Wentong Li and
Liang Shi and
Hang Li and
Changlong Li and
Edwin Hsing-Mean Sha IOSR: Improving I/O Efficiency for
Memory Swapping on Mobile Devices Via
Scheduling and Reshaping . . . . . . . . 129:1--129:??
Garima Modi and
Aritra Bagchi and
Neetu Jindal and
Ayan Mandal and
Preeti Ranjan Panda CABARRE: Request Response Arbitration
for Shared Cache Management . . . . . . 130:1--130:??
Soyed Tuhin Ahmed and
Kamal Danouchi and
Michael Hefenbrock and
Guillaume Prenat and
Lorena Anghel and
Mehdi B. Tahoori SpinBayes: Algorithm-Hardware Co-Design
for Uncertainty Estimation Using
Bayesian In-Memory Approximation on
Spintronic-Based Architectures . . . . . 131:1--131:??
Harsh Sharma and
Lukas Pfromm and
Rasit Onur Topaloglu and
Janardhan Rao Doppa and
Umit Y. Ogras and
Ananth Kalyanraman and
Partha Pratim Pande Florets for Chiplets: Data Flow-aware
High-Performance and Energy-efficient
Network-on-Interposer for CNN Inference
Tasks . . . . . . . . . . . . . . . . . 132:1--132:??
Hassan Nassar and
Lars Bauer and
Jörg Henkel ANV-PUF: Machine-Learning-Resilient
NVM-Based Arbiter PUF . . . . . . . . . 133:1--133:??
Giuseppe Sorrentino and
Marco Venere and
Davide Conficconi and
Eleonora D'Arnese and
Marco Domenico Santambrogio Hephaestus: Codesigning and Automating
$3$D Image Registration on
Reconfigurable Architectures . . . . . . 134:1--134:??
Yigit Tuncel and
Toygun Basaklar and
Dina Carpenter-Graffy and
Umit Ogras A Self-Sustained CPS Design for Reliable
Wildfire Monitoring . . . . . . . . . . 135:1--135:??
Debasmita Lohar and
Clothilde Jeangoudoux and
Anastasia Volkova and
Eva Darulova Sound Mixed Fixed-Point Quantization of
Neural Networks . . . . . . . . . . . . 136:1--136:??
Timothy Bourke and
Basile Pesin and
Marc Pouzet Verified Compilation of Synchronous
Dataflow with State Machines . . . . . . 137:1--137:??
Edward A. Lee and
Ravi Akella and
Soroush Bateni and
Shaokai Lin and
Marten Lohstroh and
Christian Menard Consistency vs. Availability in
Distributed Cyber-Physical Systems . . . 138:1--138:??
Jonas Peeck and
Rolf Ernst Improving Worst-case TSN Communication
Times of Large Sensor Data Samples by
Exploiting Synchronization . . . . . . . 139:1--139:??
Yi-Quan Chou and
Lin-Wei Shen and
Li-Pin Chang Rectifying Skewed Kernel Page
Reclamation in Mobile Devices for
Improving User-Perceivable Latency . . . 140:1--140:??
Rupak Majumdar and
Mahmoud Salamati and
Sadegh Soudjani Neural Abstraction-Based Controller
Synthesis and Deployment . . . . . . . . 141:1--141:??
Osama Khan and
Gwanjong Park and
Euiseong Seo DaCapo: an On-Device Learning Scheme for
Memory-Constrained Embedded Systems . . 142:1--142:??
Mario Günzel and
Niklas Ueter and
Kuan-Hsun Chen and
Georg von der Brüggen and
Jian-Jia Chen Probabilistic Reaction Time Analysis . . 143:1--143:??
Nils Vreman and
Martina Maggio Stochastic Analysis of Control Systems
Subject to Communication and Computation
Faults . . . . . . . . . . . . . . . . . 144:1--144:??
Yongchun Zheng and
Changlong Li and
Yi Xiong and
Weihong Liu and
Cheng Ji and
Zongwei Zhu and
Lichen Yu iAware: Interaction Aware Task
Scheduling for Reducing Resource
Contention in Mobile Systems . . . . . . 145:1--145:??
Hanrui Zhao and
Niuniu Qi and
Lydia Dehbi and
Xia Zeng and
Zhengfeng Yang Formal Synthesis of Neural Barrier
Certificates for Continuous Systems via
Counterexample Guided Learning . . . . . 146:1--146:??
Andrew Loveless and
Linh Thi Xuan Phan and
Lisa Erickson and
Ronald Dreslinski and
Baris Kasikci CrossTalk: Making Low-Latency Fault
Tolerance Cheap by Exploiting Redundant
Networks . . . . . . . . . . . . . . . . 147:1--147:??
Junya Shijubo and
Masaki Waga and
Kohei Suenaga Probabilistic Black-Box Checking via
Active MDP Learning . . . . . . . . . . 148:1--148:??
Nikhilesh Singh and
Karthikeyan Renganathan and
Chester Rebeiro and
Jithin Jose and
Ralph Mader Kryptonite: Worst-Case Program
Interference Estimation on Multi-Core
Embedded Systems . . . . . . . . . . . . 149:1--149:??
Sanjoy Baruah and
Alan Burns and
Robert Ian Davis Optimal Synthesis of Robust IDK
Classifier Cascades . . . . . . . . . . 150:1--150:??
Lélio Brun and
Christophe Garion and
Pierre-Lo\"\ic Garoche and
Xavier Thirioux Equation-Directed Axiomatization of
Lustre Semantics to Enable Optimized
Code Validation . . . . . . . . . . . . 151:1--151:??
Jean-Louis Colaço and
Michael Mendler and
Baptiste Pauget and
Marc Pouzet A Constructive State-based Semantics and
Interpreter for a Synchronous Data-flow
Language with State Machines . . . . . . 152:1--152:??
Thilanka Thilakasiri and
Matthias Becker Methods to Realize Preemption in Phased
Execution Models . . . . . . . . . . . . 153:1--153:??
Matthew Szeto and
Edward Andert and
Aviral Shrivastava and
Martin Reisslein and
Chung-Wei Lin and
Christ Richmond B-AWARE: Blockage Aware RSU Scheduling
for 5G Enabled Autonomous Vehicles . . . 154:1--154:??
Shaokai Lin and
Yatin A. Manerkar and
Marten Lohstroh and
Elizabeth Polgreen and
Sheng-Jung Yu and
Chadlia Jerad and
Edward A. Lee and
Sanjit A. Seshia Towards Building Verifiable CPS using
Lingua Franca . . . . . . . . . . . . . 155:1--155:??
Ezio Bartocci and
Cristinel Mateis and
Eleonora Nesterini and
Dejan Ni\vckovi\'c Mining Hyperproperties using Temporal
Logics . . . . . . . . . . . . . . . . . 156:1--156:??
David Metz and
Vineet Kumar and
Magnus Själander BISDU: a Bit-Serial Dot-Product Unit for
Microcontrollers . . . . . . . . . . . . 79:1--79:??
Hyeokdong Kwon and
Hyunjun Kim and
Minjoo Sim and
Wai-Kong Lee and
Hwajeong Seo Look-up the Rainbow: Table-based
Implementation of Rainbow Signature on
64-bit ARMv8 Processors . . . . . . . . 80:1--80:??
Klaus Schneider and
Anoop Bhagyanath Consistency Constraints for Mapping
Dataflow Graphs to Hybrid Dataflow/von
Neumann Architectures . . . . . . . . . 81:1--81:??
Luca Caronti and
Khakim Akhunov and
Matteo Nardello and
Kasim Sinan Yildirim and
Davide Brunelli Fine-grained Hardware Acceleration for
Efficient Batteryless Intermittent
Inference on the Edge . . . . . . . . . 82:1--82:??
Douwei Lei and
Debiao He and
Cong Peng and
Min Luo and
Zhe Liu and
Xinyi Huang Faster Implementation of Ideal
Lattice-Based Cryptography Using AVX512 83:1--83:??
Wei-Ju Chen and
Peng Wu and
Pei-Chi Huang and
Aloysius K. Mok and
Song Han Regular Composite Resource Partitioning
and Reconfiguration in Open Systems . . 84:1--84:??
Saya Inagaki and
Mingyu Yang and
Yang Li and
Kazuo Sakiyama and
Yuko Hara-Azumi Power Side-channel Attack Resistant
Circuit Designs of ARX Ciphers Using
High-level Synthesis . . . . . . . . . . 85:1--85:??
Yuling Luo and
Shiqi Zhang and
Shunsheng Zhang and
Junxiu Liu and
Yanhu Wang and
Su Yang A Secure and Efficient Framework for
Outsourcing Large-scale Matrix
Determinant and Linear Equations . . . . 86:1--86:??
Davide Li Calsi and
Vittorio Zaccaria Interruptible Remote Attestation of
Low-end IoT Microcontrollers via
Performance Counters . . . . . . . . . . 87:1--87:??
Leandro Soares Indrusiak and
Alan Burns Real-Time Guarantees in Routerless
Networks-on-Chip . . . . . . . . . . . . 88:1--88:??
Yun (Eric) Liang and
Wei Zhang and
Stephen Neuendorffer and
Wayne Luk Special Issue: ``AI Acceleration on
FPGAs'' . . . . . . . . . . . . . . . . 89:1--89:??
Xianghong Hu and
Hongmin Huang and
Xueming Li and
Xin Zheng and
Qinyuan Ren and
Jingyu He and
Xiaoming Xiong High-performance Reconfigurable DNN
Accelerator on a Bandwidth-limited
Embedded System . . . . . . . . . . . . 90:1--90:??
Xiaoyang Wang and
Zhe Zhou and
Zhihang Yuan and
Jingchen Zhu and
Yulong Cao and
Yao Zhang and
Kangrui Sun and
Guangyu Sun FD-CNN: a Frequency-Domain FPGA
Acceleration Scheme for CNN-Based
Image-Processing Applications . . . . . 91:1--91:??
Zhengzheng Ma and
Tuo Dai and
Xuechao Wei and
Guojie Luo An Intermediate-Centric Dataflow for
Transposed Convolution Acceleration on
FPGA . . . . . . . . . . . . . . . . . . 92:1--92:??
Wenhua Ye and
Xu Zhou and
Joey Zhou and
Cen Chen and
Kenli Li Accelerating Attention Mechanism on
FPGAs based on Efficient Reconfigurable
Systolic Array . . . . . . . . . . . . . 93:1--93:??
Syed Asad Alam and
David Gregg and
Giulio Gambardella and
Thomas Preusser and
Michaela Blott On the RTL Implementation of FINN Matrix
Vector Unit . . . . . . . . . . . . . . 94:1--94:??
Kaijie Feng and
Xiaoya Fan and
Jianfeng An and
Chuxi Li and
Kaiyue Di and
Jiangfei Li ACDSE: a Design Space Exploration Method
for CNN Accelerator based on Adaptive
Compression Mechanism . . . . . . . . . 95:1--95:??
Jiwu Shu and
Kedong Fang and
Youmin Chen and
Shuo Wang TH-iSSD: Design and Implementation of a
Generic and Reconfigurable Near-Data
Processing Framework . . . . . . . . . . 96:1--96:??
Yu Fu and
Jingqiang Lin and
Dengguo Feng and
Wei Wang and
Mingyu Wang and
Wenjie Wang RegKey: a Register-based Implementation
of ECC Signature Algorithms Against
One-shot Memory Disclosure . . . . . . . 97:1--97:??
Chulhong Min and
Akhil Mathur and
Utku Günay Acer and
Alessandro Montanari and
Fahim Kawsar SensiX++: Bringing MLOps and
Multi-tenant Model Serving to Sensory
Edge Devices . . . . . . . . . . . . . . 98:1--98:??
Ahmed El Yaacoub and
Luca Mottola and
Thiemo Voigt and
Philipp Rümmer Scheduling Dynamic Software Updates in
Mobile Robots . . . . . . . . . . . . . 99:1--99:??
Ankita Samaddar and
Arvind Easwaran Online Distributed Schedule
Randomization to Mitigate Timing Attacks
in Industrial Control Systems . . . . . 100:1--100:??
Jun-Shen Wu and
Tsen-Wei Hsu and
Ren-Shuo Liu SG-Float: Achieving Memory Access and
Computing Power Reduction Using
Self-Gating Float in CNNs . . . . . . . 101:1--101:??
Chen-Tui Hung and
Kai Xuan Lee and
Yi-Zheng Liu and
Ya-Shu Chen and
Zhong-Han Chan Energy-Efficient Communications for
Improving Timely Progress of
Intermittent-Powered BLE Devices . . . . 102:1--102:??
Mohammad Haji Seyed Javadi and
Mohsen Faryabi and
Hamid Reza Mahdiani A Comprehensive Model for Efficient
Design Space Exploration of Imprecise
Computational Blocks . . . . . . . . . . 103:1--103:??
Lokesh Siddhu and
Aritra Bagchi and
Rajesh Kedia and
Isaar Ahmad and
Shailja Pandey and
Preeti Ranjan Panda Dynamic Thermal Management of $3$D
Memory through Rotating Low Power States
and Partial Channel Closure . . . . . . 104:1--104:??
Erwei Wang and
James J. Davis and
Daniele Moro and
Piotr Zielinski and
Jia Jie Lim and
Claudionor Coelho and
Satrajit Chatterjee and
Peter Y. K. Cheung and
George A. Constantinides Enabling Binary Neural Network Training
on the Edge . . . . . . . . . . . . . . 105:1--105:??
Ebrahim Farahmand and
Ali Mahani and
Muhammad Abdullah Hanif and
Muhammad Shafique Design and Analysis of High Performance
Heterogeneous Block-based Approximate
Adders . . . . . . . . . . . . . . . . . 106:1--106:??
Daniel Casini and
Dakshina Dasari and
Matthias Becker and
Giorgio Buttazzo Introduction to the Special Issue on
Real-Time Computing in the
IoT-to-Edge-to-Cloud Continuum . . . . . 1:1--1:??
Ying Chen and
Jie Zhao and
Jintao Hu and
Shaohua Wan and
Jiwei Huang Distributed Task Offloading and Resource
Purchasing in NOMA-Enabled Mobile Edge
Computing: Hierarchical Game Theoretical
Approaches . . . . . . . . . . . . . . . 2:1--2:??
Tommaso Cucinotta and
Alexandre Amory and
Gabriele Ara and
Francesco Paladino and
Marco Di Natale Multi-criteria Optimization of Real-time
DAGs on Heterogeneous Platforms under
P-EDF . . . . . . . . . . . . . . . . . 3:1--3:??
Václav Struhár and
Silviu S. Craciunas and
Mohammad Ashjaei and
Moris Behnam and
Alessandro V. Papadopoulos Hierarchical Resource Orchestration
Framework for Real-time Containers . . . 4:1--4:??
Marco Barletta and
Marcello Cinque and
Luigi De Simone and
Raffaele Della Corte Criticality-aware Monitoring and
Orchestration for Containerized Industry
4.0 Environments . . . . . . . . . . . . 5:1--5:??
Soumendu Kumar Ghosh and
Arnab Raha and
Vijay Raghunathan and
Anand Raghunathan PArtNNer: Platform-Agnostic Adaptive
Edge-Cloud DNN Partitioning for
Minimizing End-to-End Latency . . . . . 6:1--6:??
Haitao Xu and
Saiyu Qi and
Yong Qi and
Wei Wei and
Naixue Xiong Secure and Lightweight Blockchain-based
Truthful Data Trading for Real-Time
Vehicular Crowdsensing . . . . . . . . . 7:1--7:??
Pratham Oza and
Nathaniel Hudson and
Thidapat Chantem and
Hana Khamfroush Deadline-Aware Task Offloading for
Vehicular Edge Computing Networks Using
Traffic Light Data . . . . . . . . . . . 8:1--8:??
Miguel Gutiérrez Gaitán and
Luís Almeida and
Pedro M. D'orey and
Pedro M. Santos and
Thomas Watteyne Minimal-Overlap Centrality for
Multi-Gateway Designation in Real-Time
TSCH Networks . . . . . . . . . . . . . 9:1--9:??
Vishnuvardhan V. Iyer and
Aditya Thimmaiah and
Michael Orshansky and
Andreas Gerstlauer and
Ali E. Yilmaz A Hierarchical Classification Method for
High-accuracy Instruction Disassembly
with Near-field EM Measurements . . . . 10:1--10:??
Yi-Wen Zhang and
Hui Zheng and
Zonghua Gu Energy-Aware Adaptive Mixed-Criticality
Scheduling with Semi-Clairvoyance and
Graceful Degradation . . . . . . . . . . 11:1--11:??
Aritra Bagchi and
Dinesh Joshi and
Preeti Ranjan Panda COBRRA: COntention-aware cache Bypass
with Request-Response Arbitration . . . 12:1--12:??
Yong-Jun Shin and
Donghwan Shin and
Doo-Hwan Bae Virtual Environment Model Generation for
CPS Goal Verification using Imitation
Learning . . . . . . . . . . . . . . . . 13:1--13:??
Wangyang Yu and
Jinming Kong and
Zhijun Ding and
Xiaojun Zhai and
Zhiqiang Li and
Qi Guo Modeling and Analysis of ETC Control
System with Colored Petri Net and
Dynamic Slicing . . . . . . . . . . . . 14:1--14:??
Zhijian He and
Bohuan Xue and
Xiangcheng Hu and
Zhaoyan Shen and
Xiangyue Zeng and
Ming Liu Robust Embedded Autonomous Driving
Positioning System Fusing LiDAR and
Inertial Sensors . . . . . . . . . . . . 15:1--15:??
Huamei Qi and
Fang Ren and
Leilei Wang and
Ping Jiang and
Shaohua Wan and
Xiaoheng Deng Multi-Compression Scale DNN Inference
Acceleration based on Cloud-Edge-End
Collaboration . . . . . . . . . . . . . 16:1--16:??
Zhiqiang Que and
Hongxiang Fan and
Marcus Loo and
He Li and
Michaela Blott and
Maurizio Pierini and
Alexander Tapper and
Wayne Luk LL-GNN: Low Latency Graph Neural
Networks on FPGAs for High Energy
Physics . . . . . . . . . . . . . . . . 17:1--17:??
Arwa Alsubhi and
Simeon Babatunde and
Nicole Tobias and
Jacob Sorber Stash: Flexible Energy Storage for
Intermittent Sensors . . . . . . . . . . 18:1--18:??
Liang Zhao and
Hongxuan Li and
Enchao Zhang and
Ammar Hawbani and
Mingwei Lin and
Shaohua Wan and
Mohsen Guizani Intelligent Caching for Vehicular Dew
Computing in Poor Network Connectivity
Environments . . . . . . . . . . . . . . 19:1--19:??
Ramesh Kumar Sah and
Hassan Ghasemzadeh Adversarial Transferability in Embedded
Sensor Systems: an Activity Recognition
Perspective . . . . . . . . . . . . . . 20:1--20:??
George Kornaros and
Svoronos Leivadaros and
Filippos Kolimbianakis Flexible Updating of Internet of Things
Computing Functions through Optimizing
Dynamic Partial Reconfiguration . . . . 21:1--21:??
Wael Fatnassi and
Yasser Shoukry PolyARBerNN: a Neural Network Guided
Solver and Optimizer for Bounded
Polynomial Inequalities . . . . . . . . 22:1--22:??
Lu Li and
Qi Tian and
Guofeng Qin and
Shuaiyu Chen and
Weijia Wang Compact Instruction Set Extensions for
Dilithium . . . . . . . . . . . . . . . 23:1--23:??
Chin-Hsien Wu and
Cheng-Tze Lee and
Yi-Ren Tsai and
Cheng-Yen Wu A Space-Grained Cleaning Method to
Reduce Long-Tail Latency of DM-SMR Disks 24:1--24:??
Jianing Deng and
Shunjie Dong and
Lvcheng Chen and
Jingtong Hu and
Cheng Zhuo STDF: Spatio-Temporal Deformable Fusion
for Video Quality Enhancement on
Embedded Platforms . . . . . . . . . . . 25:1--25:??
Shivam Bhasin and
Fabrizio De Santis and
Francesco Regazzoni Special Issue on Post-Quantum
Cryptography for Embedded Systems . . . 26:1--26:??
Catinca Mujdei and
Lennert Wouters and
Angshuman Karmakar and
Arthur Beckers and
Jose Maria Bermudo Mera and
Ingrid Verbauwhede Side-channel Analysis of Lattice-based
Post-quantum Cryptography: Exploiting
Polynomial Multiplication . . . . . . . 27:1--27:??
Saransh Gupta and
Rosario Cammarota and
Tajana Simuni\'c MemFHE: End-to-end Computing with Fully
Homomorphic Encryption in Memory . . . . 28:1--28:??
Jan Philipp Thoma and
Darius Hartlief and
Tim Güneysu Agile Acceleration of Stateful
Hash-based Signatures in Hardware . . . 29:1--29:??
Patrick Karl and
Jonas Schupp and
Tim Fritzmann and
Georg Sigl Post-Quantum Signatures on RISC-V with
Hardware Acceleration . . . . . . . . . 30:1--30:??
Rami Elkhatib and
Brian Koziel and
Reza Azarderakhsh and
Mehran Mozaffari Kermani Cryptographic Engineering a Fast and
Efficient SIKE in FPGA . . . . . . . . . 31:1--31:??
Richa Singh and
Saad Islam and
Berk Sunar and
Patrick Schaumont Analysis of EM Fault Injection on
Bit-sliced Number Theoretic Transform
Software in Dilithium . . . . . . . . . 32:1--32:??
Arpan Jati and
Naina Gupta and
Anupam Chattopadhyay and
Somitra Kumar Sanadhya A Configurable CRYSTALS--Kyber Hardware
Implementation with Side-Channel
Protection . . . . . . . . . . . . . . . 33:1--33:??
Nouri Alnahawi and
Nicolai Schmitt and
Alexander Wiesmaier and
Chiara-Marie Zok Toward Next Generation Quantum-Safe eIDs
and eMRTDs: a Survey . . . . . . . . . . 34:1--34:??
Prasanna Ravi and
Anupam Chattopadhyay and
Jan Pieter D'Anvers and
Anubhab Baksi Side-channel and Fault-injection attacks
over Lattice-based Post-quantum Schemes
(Kyber, Dilithium): Survey and New
Results . . . . . . . . . . . . . . . . 35:1--35:??
Linwei Niu and
Danda B. Rawat and
Dakai Zhu and
Jonathan Musselwhite and
Zonghua Gu and
Qingxu Deng Energy Management for Fault-tolerant $
(m, k)$-constrained Real-time Systems
That Use Standby-Sparing . . . . . . . . 36:1--36:??
Yueting Li and
Xueyan Wang and
He Zhang and
Biao Pan and
Keni Qiu and
Wang Kang and
Jun Wang and
Weisheng Zhao Toward Energy-efficient STT-MRAM-based
Near Memory Computing Architecture for
Embedded Systems . . . . . . . . . . . . 37:1--37:??
Calvin B. Gealy and
Alan D. George Characterizing Parameter Scaling with
Quantization for Deployment of CNNs on
Real-Time Systems . . . . . . . . . . . 38:1--38:??
Loic Salmon and
Pierre-Yves Pillain and
Goulven Guillou and
Jean-Philippe Babau NAVIDRO, a CARES architectural style for
configuring drone co-simulation . . . . 39:1--39:??
Theocharis Theocharides and
Charlotte Frenkel and
Lukas Cavigelli Introduction to the Special Issue on
tinyML . . . . . . . . . . . . . . . . . 40:1--40:??
Qianyun Lu and
Boris Murmann Enhancing the Energy Efficiency and
Robustness of tinyML Computer Vision
Using Coarsely-quantized Log-gradient
Input Images . . . . . . . . . . . . . . 41:1--41:??
Massimo Pavan and
Eugeniu Ostrovan and
Armando Caltabiano and
Manuel Roveri TyBox: an Automatic Design and Code
Generation Toolbox for TinyML
Incremental On-Device Learning . . . . . 42:1--42:??
Swapnil Sayan Saha and
Sandeep Singh Sandha and
Mohit Aggarwal and
Brian Wang and
Liying Han and
Julian De Gortari Briseno and
Mani Srivastava TinyNS: Platform-aware Neurosymbolic
Auto Tiny Machine Learning . . . . . . . 43:1--43:??
Arnab Neelim Mazumder and
Farshad Safavi and
Maryam Rahnemoonfar and
Tinoosh Mohsenin Reg-Tune: a Regression-Focused
Fine-Tuning Approach for Profiling Low
Energy Consumption and Latency . . . . . 44:1--44:??
Xinqiao Zhang and
Mohammad Samragh and
Siam Hussain and
Ke Huang and
Farinaz Koushanfar Scalable Binary Neural Network
Applications in Oblivious Inference . . 45:1--45:??
Upasana Sridhar and
Nicholai Tukanov and
Elliott Binder and
Tze Meng Low and
Scott McMillan and
Martin D. Schatz SMaLL: Software for Rapidly
Instantiating Machine Learning Libraries 46:1--46:??
Hasib-Al Rashid and
Utteja Kallakuri and
Tinoosh Mohsenin TinyM 2 Net-V2: a Compact Low-power
Software Hardware Architecture for
Multimodal Deep Neural Networks . . . . 47:1--47:??
Alessandro Cilardo and
Vincenzo Maisto and
Nicola Mazzocca and
Franca Rocco Di Torrepadula An Approach to the Systematic
Characterization of Multitask
Accelerated CNN Inference in Edge MPSoCs 48:1--48:??
Alberto Ancilotto and
Francesco Paissan and
Elisabetta Farella XimSwap: Many-to-Many Face Swapping for
TinyML . . . . . . . . . . . . . . . . . 49:1--49:??
Pedro Andrade and
Ivanovitch Silva and
Marianne Diniz and
Thommas Flores and
Daniel G. Costa and
Eduardo Soares Online Processing of Vehicular Data on
the Edge Through an Unsupervised TinyML
Regression Technique . . . . . . . . . . 50:1--50:??
Mohammed El Adoui and
Thomas Herpoel and
Beno\^\it Frénay Constrained Tiny Machine Learning for
Predicting Gas Concentration with I4.0
Low-cost Sensors . . . . . . . . . . . . 51:1--51:??
Chaojian Li and
Kyungmin Kim and
Bichen Wu and
Peizhao Zhang and
Hang Zhang and
Xiaoliang Dai and
Peter Vajda and
Yingyan (Celine) Lin An Investigation on Hardware-Aware
Vision Transformer Scaling . . . . . . . 52:1--52:??
Dina Hussein and
Ganapati Bhat SensorGAN: a Novel Data Recovery
Approach for Wearable Human Activity
Recognition . . . . . . . . . . . . . . 53:1--53:??
Ellis Hoag and
Kyungwoo Lee and
Julian Mestre and
Sergey Pupyrev and
Yongkang Zhu Reordering Functions in Mobiles Apps for
Reduced Size and Faster Start-Up . . . . 54:1--54:??
Haoyu Ren and
Darko Anicic and
Xue Li and
Thomas Runkler On-device Online Learning and Semantic
Management of TinyML Systems . . . . . . 55:1--55:??
Pavitra Bhade and
Joseph Paturel and
Olivier Sentieys and
Sharad Sinha Lightweight Hardware-Based Cache
Side-Channel Attack Detection for Edge
Devices (Edge-CaSCADe) . . . . . . . . . 56:1--56:??
Eduardo Chielle and
Oleg Mazonka and
Homer Gamil and
Michail Maniatakos Coupling bit and modular arithmetic for
efficient general-purpose fully
homomorphic encryption . . . . . . . . . 57:1--57:??
Fateh Boudardara and
Abderraouf Boussif and
Pierre-Jean Meyer and
Mohamed Ghazel A Review of Abstraction Methods Toward
Verifying Neural Networks . . . . . . . 58:1--58:??
Dogan Ulus and
Thomas Ferr\`ere and
Eugene Asarin and
Dejan Nickovic and
Oded Maler Elements of Timed Pattern Matching . . . 59:1--59:??
Ioannis Panopoulos and
Stylianos Venieris and
Iakovos Venieris CARIn: Constraint-Aware and Responsive
Inference on Heterogeneous Devices for
Single- and Multi-DNN Workloads . . . . 60:1--60:??
Shounak Chakraborty and
Yanshul Sharma and
Sanjay Moulik TREAFET: Temperature-Aware Real-Time
Task Scheduling for FinFET based
Multicores . . . . . . . . . . . . . . . 61:1--61:??
Eyad Algahtani A Hardware Approach For Accelerating
Inductive Learning In Description Logic 62:1--62:??
Yungang Pan and
Rouhollah Mahfouzi and
Soheil Samii and
Petru Eles and
Zebo Peng Multi-Traffic Resource Optimization for
Real-Time Applications with 5G
Configured Grant Scheduling . . . . . . 63:1--63:??
Rupendra Pratap Singh Hada and
Abhishek Srivastava Dynamic Cluster Head Selection in WSN 64:1--64:??
Julien Deantoni and
Alain Girault and
Daniel Grosse Introduction to the Special Issue on
Specification and Design Languages (FDL
2021) . . . . . . . . . . . . . . . . . 65:1--65:??
Lena Grimm and
Steven Smyth and
Alexander Schulz-Rosengarten and
Reinhard von Hanxleden and
Marc Pouzet From Lustre to Graphical Models and
SCCharts . . . . . . . . . . . . . . . . 66:1--66:??
Mehran Goli and
Rolf Drechsler Early SoCs Information Flow Policies
Validation Using SystemC-Based Virtual
Prototypes at the ESL . . . . . . . . . 67:1--67:??
Hanane Benmaghnia and
Matthieu Martel and
Yassamine Seladji Code Generation for Neural Networks
Based on Fixed-point Arithmetic . . . . 68:1--68:??
John Hui and
Stephen A. Edwards The Sparse Synchronous Model on Real
Hardware . . . . . . . . . . . . . . . . 69:1--69:??
Joaquín Aguado and
Alejandra Duenas Synchronised Shared Memory and Model
Checking . . . . . . . . . . . . . . . . 70:1--70:??
Sander Thuijsman and
Michel Reniers Supervisory Control for Dynamic Feature
Configuration in Product Lines . . . . . 71:1--71:??
Florent Peres and
Mohamed Ghazel A Proven Translation from a UML State
Machine Subset to Timed Automata . . . . 72:1--72:??
Lovic Gauthier and
Yohei Ishikawa HDLRuby: a Ruby Extension for Hardware
Description and Its Translation to
Synthesizable Verilog HDL . . . . . . . 73:1--73:??
Francesco Lumpp and
Marco Panato and
Nicola Bombieri and
Franco Fummi A Design Flow Based on Docker and
Kubernetes for ROS-based Robotic
Software Applications . . . . . . . . . 74:1--74:??
Emad M. Arasteh and
Rainer Dömer Fast Loosely-Timed Deep Neural Network
Models with Accurate Memory Contention 75:1--75:??
Friedrich Gretz and
Franz-Josef Grosch and
Michael Mendler and
Stephan Scheele Synchronized Shared Memory and Black-box
Procedural Abstraction: Toward a Formal
Semantics of Blech . . . . . . . . . . . 76:1--76:??
Marten Lohstroh and
Soroush Bateni and
Christian Menard and
Alexander Schulz-Rosengarten and
Jeronimo Castrillon and
Edward A. Lee Deterministic Coordination across
Multiple Timelines . . . . . . . . . . . 77:1--77:??
Gaurav Narang and
Chukwufumnanya Ogbogu and
Janardhan Rao Doppa and
Partha Pratim Pande TEFLON: Thermally Efficient
Dataflow-aware $3$D NoC for Accelerating
CNN Inferencing on Manycore PIM
Architectures . . . . . . . . . . . . . 78:1--78:??
Xingbin Wang and
Boyan Zhao and
Yulan Su and
Sisi Zhang and
Fengkai Yuan and
Jun Zhang and
Dan Meng and
Rui Hou A Hybrid Sparse-dense Defensive DNN
Accelerator Architecture against
Adversarial Example Attacks . . . . . . 79:1--79:??
Akanksha Dixit and
Smruti R. Sarangi PredATW: Predicting the Asynchronous
Time Warp Latency For VR Systems . . . . 80:1--80:??
Chia-Hao Li and
Niraj K. Jha DOCTOR: a Multi-Disease Detection
Continual Learning Framework Based on
Wearable Medical Sensors . . . . . . . . 81:1--81:??
Mohammad Hassan Hafezan and
Ehsan Atoofian Transient Fault Detection in Tensor
Cores for Modern GPUs . . . . . . . . . 82:1--82:??
Meng Wang and
Yiqin Lu and
Haihan Wang and
Zhuoxing Chen and
Jiancheng Qin Load-balanced Routing Heuristics for
Bandwidth Allocation of AVB Flow in TSN 83:1--83:??
Clara Gomez and
Davron Patkhullaev and
Alejandra C. Hernandez OffloaD: Detection Failure-based
Scheduler for Offloading Object
Detection . . . . . . . . . . . . . . . 84:1--84:??
Liang Shi and
Jingtong Shi and
Hussam Amrouch and
Kuan-Hsun Chen and
Mengying Zhao and
Weichen Liu Introduction to Special Issue on In/Near
Memory and Storage Computing for
Embedded Systems . . . . . . . . . . . . 85:1--85:??
Fenfang Li and
Huizhang Luo and
Junqi Wang and
Yida Li and
Zhuo Tang and
Kenli Li AMP: Total Variation Reduction for
Lossless Compression via Approximate
Median-based Preconditioning . . . . . . 86:1--86:??
Chongnan Ye and
Meng Chen and
Qisheng Jiang and
Chundong Wang Hercules: Enabling Atomic Durability for
Persistent Memory with Transient
Persistence Domain . . . . . . . . . . . 87:1--87:??
Sichun Du and
Jun Li and
Chen Sun and
Pingdan Xiao and
Qinghui Hong and
Jiliang Zhang Analog In-memory Circuit Design of
Polynomial Multiplication for Lattice
Cipher Acceleration Application . . . . 88:1--88:??
Xin Gao and
Hongyue Wang and
Yiyan Chen and
Yuhao Zhang and
Zhaoyan Shen and
Lei Ju Static Scheduling of Weight Programming
for DNN Acceleration with Resource
Constrained PIM . . . . . . . . . . . . 89:1--89:??
Kousik Bhunia and
Arighna Deb and
Kamalika Datta and
Muhammad Hassan and
Saeideh Shirinzadeh and
Rolf Drechsler ReSG: a Data Structure for Verification
of Majority-based In-memory Computing on
ReRAM Crossbars . . . . . . . . . . . . 90:1--90:??
Dehua Liang and
Hiromitsu Awano and
Noriyuki Miura and
Jun Shiomi A Robust and Energy Efficient
Hyperdimensional Computing System for
Voltage-scaled Circuits . . . . . . . . 91:1--91:??
Hongsu Byun and
Safdar Jamil and
Jungwook Han and
Sungyong Park and
Myungcheol Lee and
Changsoo Kim and
Beongjun Choi and
Youngjae Kim An Analytical Model-based Capacity
Planning Approach for Building CSD-based
Storage Systems . . . . . . . . . . . . 92:1--92:??
Hui Sun and
Bendong Lou and
Chao Zhao and
Deyan Kong and
Chaowei Zhang and
Jianzhong Huang and
Yinliang Yue and
Xiao Qin Asynchronous Compaction Acceleration
Scheme for Near-data Processing-enabled
LSM-tree-based KV Stores . . . . . . . . 93:1--93:??
Pavia Bera and
Stephen Cahoon and
Sanjukta Bhanja and
Alex Jones SPIMulator: a Spintronic
Processing-in-memory Simulator for
Racetracks . . . . . . . . . . . . . . . 94:1--94:??
Kunyu Zhou and
Keni Qiu REC: REtime Convolutional Layers to
Fully Exploit Harvested Energy for
ReRAM-based CNN Accelerators . . . . . . 95:1--95:??
Shailja Pandey and
Preeti Ranjan Panda NeuroTAP: Thermal and Memory Access
Pattern-Aware Data Mapping on $3$D DRAM
for Maximizing DNN Performance . . . . . 96:1--96:??
Zhuanhao Wu and
Anirudh Kaushik and
Hiren Patel High Performance and Predictable Shared
Last-level Cache for Safety-Critical
Systems . . . . . . . . . . . . . . . . 97:1--97:??
Runqing Xu and
Debiao He and
Min Luo and
Cong Peng and
Xiangyong Zeng Optimizing Dilithium Implementation with
AVX2\slash-512 . . . . . . . . . . . . . 98:1--98:??
Prachi Kashikar and
Olivier Sentieys and
Sharad Sinha Combining Weight Approximation, Sharing
and Retraining for Neural Network Model
Compression . . . . . . . . . . . . . . 99:1--99:??
Hansika Weerasena and
Prabhat Mishra Revealing CNN Architectures via
Side-Channel Analysis in Dataflow-based
Inference Accelerators . . . . . . . . . 100:1--100:??
John Mamish and
Rawan Alharbi and
Sougata Sen and
Shashank Holla and
Panchami Kamath and
Yaman Sangar and
Nabil Alshurafa and
Josiah Hester NIR-sighted: a Programmable Streaming
Architecture for Low-Energy
Human-Centric Vision Applications . . . 101:1--101:??
Zijing Jiang and
Qun Ding and
An Wang Efficient Multi-Byte Power Analysis
Architecture Focusing on Bitwise Linear
Leakage . . . . . . . . . . . . . . . . 102:1--102:??
Barnali Basak and
Pallab Dasgupta and
Arpan Pal Efficient Low-Memory Implementation of
Sparse CNNs Using Encoded Partitioned
Hybrid Sparse Format . . . . . . . . . . 103:1--103:??
Basar Kutukcu and
Sabur Baidya and
Sujit Dey SLEXNet: Adaptive Inference Using
Slimmable Early Exit Neural Networks . . 104:1--104:??
Junqiang Jiang and
Shengjie Jin and
Zhifang Sun and
Jinxue Duan and
Lizhi Liu and
Li Pan and
Zebo Peng An Efficient Approach for Improving
Message Acceptance Rate and Link
Utilization in Time-Sensitive Networking 1:1--1:??
Sofiya Semenova and
Steven Ko and
Yu David Liu and
Lukasz Ziarek and
Karthik Dantu A Comprehensive Study of Systems
Challenges in Visual Simultaneous
Localization and Mapping Systems . . . . 2:1--2:??
Zhuoqun Xia and
Ziyu Wang and
Xiao Liu Trust Based Active Game Data Collection
Scheme in Smart Cities . . . . . . . . . 3:1--3:??
Gao-Yu Lin and
Po-Yuan Wang and
Shin-Ming Cheng and
Hahn-Ming Lee Improving Robustness in IoT Malware
Detection through Execution Order
Analysis . . . . . . . . . . . . . . . . 4:1--4:??
Thomas Garbay and
Khalil Hachicha and
Petr Dobias and
Andrea Pinna and
Karim Hocine and
Wilfried Dron and
Pedro Lusich and
Imane Khalis and
Bertrand Granado ZIP-CNN: Design Space Exploration for
CNN Implementation within a MCU . . . . 5:1--5:??
Rafiuzzaman Mohammad and
Sathish Gopalakrishnan and
Karthik Pattabiraman Co-Approximator: Enabling Performance
Prediction in Colocated Applications. 6:1--6:??
Kam-Yiu Lam and
Xiaofei Zhao and
Chunjiang Zhu and
Tei-Wei Kuo MVLevelDB+: Meeting Relative Consistency
Requirements of Temporal Queries in
Sensor Stream Databases . . . . . . . . 7:1--7:??
Thilo Leon Fischer and
Heiko Falk Towards Analysing Cache-Related
Preemption Delay in Non-Inclusive Cache
Hierarchies . . . . . . . . . . . . . . 8:1--8:??
Yann Argotti and
Yasmine Kenfaoui and
Claude Baron and
Alain Abran and
Philippe Esteban An Operational Quality Model of Embedded
Software Aligned with ISO 25000 . . . . 9:1--9:??
Suparna Kundu and
Quinten Norga and
Angshuman Karmakar and
Shreya Gangopadhyay and
Jose Maria Bermudo Mera and
Ingrid Verbauwhede Scabbard: an Exploratory Study on
Hardware Aware Design Choices of
Learning with Rounding-based Key
Encapsulation Mechanisms . . . . . . . . 10:1--10:??
Shikha Goel and
Rajesh Kedia and
Rijurekha Sen and
M. Balakrishnan EXPRESS: a Framework for Execution Time
Prediction of Concurrent CNNs on Xilinx
DPU Accelerator . . . . . . . . . . . . 11:1--11:??
Mahendra Rathor ALOHA-FP2I: Efficient Algorithms and
Hardware for Multi-Mode Rounding of
Floating Point to Integer . . . . . . . 12:1--12:26
Hector Perez Tijero and
J. Javier Gutiérrez García and
Diego García Prieto Application-Level Evaluation of IEEE
802.1AS Synchronized Time and Linux for
Distributed Real-Time Systems . . . . . 13:1--13:??
Abdullah Zyarah and
Dhireesha Kudithipudi Time-Series Forecasting and Sequence
Learning Using Memristor-based Reservoir
System . . . . . . . . . . . . . . . . . 14:1--14:??
Suhap Sahin and
Oguz Narli and
Muhammet Bahadir Türkoglu and
Hikmetcan Özcan Hardware Area Efficient and Real-Time
FPGA Implementation of PHMMRGB . . . . . 15:1--15:??
Pengzhou He and
Yazheng Tu and
Tianyou Bao and
Çetin Çetin Koç and
Jiafeng Xie HSPA: High-Throughput Sparse Polynomial
Multiplication for Code-based
Post-Quantum Cryptography . . . . . . . 16:1--16:??
Sezana Fahmida and
Aakriti Jain and
Venkata Prashant Modekurthy and
Dali Ismail and
Abusayeed Saifullah RTPL: a Real-Time Communication Protocol
for LoRa Network . . . . . . . . . . . . 17:1--17:??
Liangliang Chang and
Serhan Gener and
Joshua Mack and
Hasan Umut Suluhan and
Ali Akoglu and
Chaitali Chakrabarti Coarse-Grained Task Parallelization by
Dynamic Profiling for Heterogeneous
SoC-Based Embedded System . . . . . . . 18:1--18:??
Soonhoi Ha and
Eunjin Jeong Software Optimization and Design
Methodology for Low Power Computer
Vision Systems . . . . . . . . . . . . . 19:1--19:??
Joshua Mack and
Anish Krishnakumar and
Umit Ogras and
Ali Akoglu Tutorial: a Novel Runtime Environment
for Accelerator-Rich Heterogeneous
Architectures . . . . . . . . . . . . . 20:1--20:??
Xiangzhong Luo and
Di Liu and
Hao Kong and
Shuo Huai and
Hui Chen and
Guochu Xiong and
Weichen Liu Efficient Deep Learning Infrastructures
for Embedded Computing Systems: a
Comprehensive Survey and Future Envision 21:1--21:??
Mario Günzel and
Harun Teper and
Georg von der Brüggen and
Jian-Jia Chen End-To-End Latency of Cause--Effect
Chains: a Tutorial . . . . . . . . . . . 22:1--22:??