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M. Anantha and B. Bose and B. F. AlBdaiwi Mixed-Radix Gray Codes in Lee Metric . . 1297--1307
V. S. Dimitrov and K. U. Jarvinen and M. J. Jacobson and W. Chan and Zhun Huang Provably Sublinear Point Multiplication on Koblitz Curves and Its Hardware Implementation . . . . . . . . . . . . . 1469--1481
Peng Gu and Jun Wang and Yifeng Zhu and Hong Jiang and Pengju Shang A Novel Weighted-Graph-Based Grouping Algorithm for Metadata Prefetching . . . 1--15 A. Flores and J. L. Aragon and M. E. Acacio Heterogeneous Interconnects for Energy-Efficient Message Management in CMPs . . . . . . . . . . . . . . . . . . 16--28 S. Sarkar and G. R. Kulkarni and P. P. Pande and A. Kalyanaraman Network-on-Chip Hardware Accelerators for Biological Sequence Alignment . . . 29--41 Xiao Qin and Hong Jiang and A. Manzanares and Xiaojun Ruan and Shu Yin Communication-Aware Load Balancing for Parallel Applications on Clusters . . . 42--52 Yuan-Hao Chang and Jen-Wei Hsieh and Tei-Wei Kuo Improving Flash Wear-Leveling by Proactively Moving Static Data . . . . . 53--65 G. Casale and Ningfang Mi and E. Smirni Model-Driven System Capacity Planning under Workload Burstiness . . . . . . . 66--80 B. B. Brumley and K. U. Jarvinen Conversion Algorithms and Implementations for Koblitz Curve Cryptography . . . . . . . . . . . . . . 81--92 Shyue-Ming Tang and Jinn-Shyong Yang and Yue-Li Wang and Jou-Ming Chang Independent Spanning Trees on Multidimensional Torus Networks . . . . 93--102 Yinglong Xia and V. K. Prasanna Scalable Node-Level Computation Kernels for Parallel Exact Inference . . . . . . 103--115 Fei He and Xiaoyu Song and W. N. N. Hung and Ming Gu and Jiaguang Sun Integrating Evolutionary Computation with Abstraction Refinement for Model Checking . . . . . . . . . . . . . . . . 116--126 Jong Sung Lee and K. Skadron and Sung Woo Chung Predictive Temperature-Aware DVFS . . . 127--133 Gang Chen and Feng Liu Proofs of Correctness and Properties of Integer Adder Circuits . . . . . . . . . 134--136 V. Sune and J. A. Carrasco and H. Nabli and B. Sericola Comment on ``Performability Analysis: a New Algorithm'' . . . . . . . . . . . . 137--138 Anonymous 2009 Reviewers List . . . . . . . . . . 139--143 Anonymous Call for Papers: Special Section on Dependable Computer Architecture . . . . 144--144
Fabrizio Lombardi State of the Journal . . . . . . . . . . 145--149 I. Pomeranz and S. M. Reddy Equivalence, Dominance, and Similarity Relations between Fault Pairs and a Fault Pair Collapsing Process for Fault Diagnosis . . . . . . . . . . . . . . . 150--158 A. Y. Al-Dubai and M. Ould-Khaoua and L. M. Mackenzie Trade-Offs between Latency, Complexity, and Load Balancing with Multicast Algorithms . . . . . . . . . . . . . . . 159--173 C. Francalanci and P. Giacomazzi A High-Performance Deadlock-Free Multicast Routing Algorithm for $K$-Ary $N$-Cubes . . . . . . . . . . . . . . . 174--187 O. Moreira and T. Basten and M. Geilen and S. Stuijk Buffer Sizing for Rate-Optimal Single-Rate Data-Flow Scheduling Revisited . . . . . . . . . . . . . . . 188--201 A. Benoit and L. Marchal and J.-F. Pineau and Y. Robert and F. Vivien Scheduling Concurrent Bag-of-Tasks Applications on Heterogeneous Platforms 202--217 MyungKeun Yoon and Shigang Chen and Zhan Zhang Minimizing the Maximum Firewall Rule Set in a Network with Multiple Firewalls . . 218--230 S. Sengupta and M. Chatterjee and K. A. Kwiat A Game Theoretic Framework for Power Control in Wireless Sensor Networks . . 231--242 H. M. Ammari and S. K. Das A Study of $k$-Coverage and Measures of Connectivity in $3$D Wireless Sensor Networks . . . . . . . . . . . . . . . . 243--257 K. Akkaya and F. Senel and A. Thimmapuram and S. Uludag Distributed Recovery from Network Partitioning in Movable Sensor/Actor Networks via Controlled Mobility . . . . 258--271 R. Sarikaya and A. Buyuktosunoglu A Unified Prediction Method for Predicting Program Behavior . . . . . . 272--282 Chin-Yu Huang and Chu-Ti Lin Analysis of Software Reliability Modeling Considering Testing Compression Factor and Failure-to-Fault Relationship 283--288
B. Bosio and P. Girard and S. Pravossoudovitch and A. Virazel A Comprehensive Framework for Logic Diagnosis of Arbitrary Defects . . . . . 289--300 S. N. Neophytou and M. K. Michael Test Set Generation with a Large Number of Unspecified Bits Using Static and Dynamic Techniques . . . . . . . . . . . 301--316 P. Garbacki and D. H. J. Epema and M. van Steen The Design and Evaluation of a Self-Organizing Superpeer Network . . . 317--331 Yuho Jin and Eun Jung Kim and Ki Hwan Yum Design and Analysis of On-Chip Networks for Large-Scale Cache Systems . . . . . 332--344 Guangyan Zhang and Weiman Zheng and Jiwu Shu ALV: a New Data Redistribution Approach to RAID-5 Scaling . . . . . . . . . . . 345--357 U. Finkler An Analytic Framework for Detailed Resource Profiling in Large and Parallel Programs and Its Application for Memory Use . . . . . . . . . . . . . . . . . . 358--370 J. Carmona and J. Cortadella and M. Kishinevsky New Region-Based Algorithms for Deriving Bounded Petri Nets . . . . . . . . . . . 371--384 M. Gupta and F. Sanchez and J. Llosa CSMT: Simultaneous Multithreading for Clustered VLIW Processors . . . . . . . 385--399 R. Pellizzoni and M. Caccamo Impact of Peripheral-Processor Interference on WCET Analysis of Real-Time Embedded Systems . . . . . . . 400--415 T. Cucinotta and L. Palopoli QoS Control for Pipelines of Tasks Using Multiple Resources . . . . . . . . . . . 416--430 Anonymous 7 Reasons for Joining the IEEE Computer Society . . . . . . . . . . . . . . . . 431--431 Anonymous Silver Bullet Security Podcast series 432--432
B. Cope and P. Y. K. Cheung and W. Luk and L. Howes Performance Comparison of Graphics Processors to Reconfigurable Logic: a Case Study . . . . . . . . . . . . . . . 433--448 A. Alimohammad and S. F. Fard and B. F. Cockburn A Unified Architecture for the Accurate and High-Throughput Implementation of Six Key Elementary Functions . . . . . . 449--456 J.-H. R. Jiang and Chih-Chun Lee and A. Mishchenko and Chung-Yang Huang To SAT or Not to SAT: Scalable Exploration of Functional Dependency . . 457--467 Y. Hasan and Wei-Mei Chen and J. M. Chang and B. M. Gharaibeh Upper Bounds for Dynamic Memory Allocation . . . . . . . . . . . . . . . 468--477 C. Moser and L. Thiele and D. Brunelli and L. Benini Adaptive Power Management for Environmentally Powered Systems . . . . 478--491 Yeim-Kuan Chang and Yung-Chieh Lin and Cheng-Chien Su Dynamic Multiway Segment Tree for IP Lookups and the Fast Pipelined Search Engine . . . . . . . . . . . . . . . . . 492--506 Yang Xiao and Hui Chen and Kui Wu and Bo Sun and Ying Zhang and Xinyu Sun and Chong Liu Coverage and Detection of a Randomized Scheduling Algorithm in Wireless Sensor Networks . . . . . . . . . . . . . . . . 507--521 T. K. Rodrigues and E. E. Swartzlander Adaptive CORDIC: Using Parallel Angle Recoding to Accelerate Rotations . . . . 522--531 Wu Jigang and T. Srikanthan and Guang Chen Algorithmic Aspects of Hardware/Software Partitioning: $1$D Search Algorithms . . 532--544 O.-C. Granmo and B. J. Oommen Solving Stochastic Nonlinear Resource Allocation Problems Using a Hierarchy of Twofold Resource Allocation Automata . . 545--560 Hao Zheng and Haiqiong Yao and T. Yoneda Modular Model Checking of Large Asynchronous Designs with Efficient Abstraction Refinement . . . . . . . . . 561--573 O. Lhotak and S. Curial and J. N. Amaral An Optimal Encoding to Represent a Single Set in an ROBDD . . . . . . . . . 574--575 Anonymous IEEE Computer Society CSDA Certification 576--576
Cristiana Bolchini and Donatella Sciuto Guest Editors' Introduction: Special Section on System-Level Design of Reliable Architectures . . . . . . . . . 577--578 O. Hasan and S. Tahar and N. Abbasi Formal Reliability Analysis Using Theorem Proving . . . . . . . . . . . . 579--592 Bin Li and Lide Duan and Lu Peng Efficient Microarchitectural Vulnerabilities Prediction Using Boosted Regression Trees and Patient Rule Inductions . . . . . . . . . . . . . . . 593--607 M. Mozaffari-Kermani and A. Reyhani-Masoleh Concurrent Structure-Independent Fault Detection Schemes for the Advanced Encryption Standard . . . . . . . . . . 608--622 J. Carretero and X. Vera and P. C. Monferrer and J. Abella Microarchitectural Online Testing for Failure Detection in Memory Order Buffers . . . . . . . . . . . . . . . . 623--637 Hyunjin Lee and Sangyeun Cho and B. R. Childers PERFECTORY: a Fault-Tolerant Directory Memory Architecture . . . . . . . . . . 638--650 O. Khan and S. Kundu Thread Relocation: a Runtime Architecture for Tolerating Hard Errors in Chip Multiprocessors . . . . . . . . 651--665 Kyungtae Kang and Lui Sha An Interleaving Structure for Guaranteed QoS in Real-Time Broadcasting Systems 666--678 A. Vazquez and E. Antelo and P. Montuschi Improved Design of High-Performance Parallel Decimal Multipliers . . . . . . 679--693 G. Jaberipur and B. Parhami and S. Gorgin Redundant-Digit Floating-Point Addition Scheme Based on a Stored Rounding Value 694--706 M. T. Refaei and L. A. DaSilva and M. Eltoweissy and T. Nadeem Adaptation of Reputation Management Systems to Dynamic Network Conditions in Ad Hoc Networks . . . . . . . . . . . . 707--719
Chen Wang and Bing Bing Zhou and A. Y. Zomaya EvolvingSpace: a Data Centric Framework for Integrating Bioinformatics Applications . . . . . . . . . . . . . . 721--734 M. K. Shukla and A. Y. Oruc Multicasting in Quantum Switching Networks . . . . . . . . . . . . . . . . 735--747 I. Cohen and O. Rottenstreich and I. Keslassy Statistical Approach to Networks-on-Chip 748--761 G. Lentaris and D. Reisis A Graphics Parallel Memory Organization Exploiting Request Correlations . . . . 762--775 Jianjia Wu and Jyh-Charn Liu and Wei Zhao A General Framework for Parameterized Schedulability Bound Analysis of Real-Time Systems . . . . . . . . . . . 776--783 Hyesook Lim and Changhoon Yim and E. E. Swartzlander Priority Tries for IP Address Lookup . . 784--794 N. Homma and A. Miyamoto and T. Aoki and A. Satoh and A. Samir Comparative Power Analysis of Modular Exponentiation Algorithms . . . . . . . 795--807 A. Boukerche and J. M. Correa and A. Melo and R. P. Jacobi A Hardware Accelerator for the Fast Retrieval of DIALIGN Biological Sequence Alignments in Linear Space . . . . . . . 808--821 Chia-Hung Lin and Shiao-An Yuan and Shih-Wei Chiu and Ming-Jer Tsai ProgressFace: An Algorithm to Improve Routing Efficiency of GPSR-Like Routing Protocols in Wireless Ad Hoc Networks 822--834 J. B. Lima and D. Panario and Qiang Wang A Karatsuba-Based Algorithm for Polynomial Multiplication in Chebyshev Form . . . . . . . . . . . . . . . . . . 835--841 L. Harn and Changlu Lin Authenticated Group Key Transfer Protocol Based on Secret Sharing . . . . 842--846 Shufu Mao and T. Wolf Hardware Support for Secure Processing in Embedded Systems . . . . . . . . . . 847--854 Yiqiang Ding and Wei Zhang Loop-Based Instruction Prefetching to Reduce the Worst-Case Execution Time . . 855--864
D. Niyato and E. Hossain A Microeconomic Model for Hierarchical Bandwidth Sharing in Dynamic Spectrum Access Networks . . . . . . . . . . . . 865--877 Dong Kim and Kwanhu Bang and Seung-Hwan Ha and Sungroh Yoon and Eui-Young Chung Architecture Exploration of High-Performance PCs with a Solid-State Disk . . . . . . . . . . . . . . . . . . 878--890 M. Loghi and O. Golubeva and E. Macii and M. Poncino Architectural Leakage Power Minimization of Scratchpad Memories by Application-Driven Subbanking . . . . . 891--904 Yoon Jae Seong and Eyee Hyun Nam and Jin Hyuk Yoon and Hongseok Kim and Jin-yong Choi and Sookwan Lee and Young Hyun Bae and Jaejin Lee and Yookun Cho and Sang Lyul Min Hydra: a Block-Mapped Parallel Flash Memory Solid-State Disk Architecture . . 905--921 A. Sanyal and A. Rastogi and Wei Chen and S. Kundu An Efficient Technique for Leakage Current Estimation in Nanoscaled CMOS Circuits Incorporating Self-Loading Effects . . . . . . . . . . . . . . . . 922--932 Man-Ki Yoon and Chang-Gun Lee and Junghee Han Migrating from Per-Job Analysis to Per-Resource Analysis for Tighter Bounds of End-to-End Response Times . . . . . . 933--942 Songqing Chen and Shiping Chen and Xinyuan Wang and Zhao Zhang and Sushil Jajodia An Application-Level Data Transparent Authentication Scheme without Communication Overhead . . . . . . . . . 943--954 A. Pathak and V. K. Prasanna Energy-Efficient Task Mapping for Data-Driven Sensor Network Macroprogramming . . . . . . . . . . . . 955--968 Hanhua Chen and Jun Yan and Hai Jin and Yunhao Liu and L. M. Ni TSS: Efficient Term Set Search in Large Peer-to-Peer Textual Collections . . . . 969--980 H. Mangassarian and A. Veneris and M. Benedetti Robust QBF Encodings for Sequential Circuits with Applications to Verification, Debug, and Test . . . . . 981--994 O. Sinanoglu and M. H. Karaata and B. AlBdaiwi An Inherently Stabilizing Algorithm for Node-To-Node Routing over All Shortest Node-Disjoint Paths in Hypercube Networks . . . . . . . . . . . . . . . . 995--999 Haohuan Fu and O. Mencer and W. Luk FPGA Designs with Optimized Logarithmic Arithmetic . . . . . . . . . . . . . . . 1000--1006 Gang Zhou and H. Michalik Comments on ``A New Architecture for a Parallel Finite Field Multiplier with Low Complexity Based on Composite Field'' . . . . . . . . . . . . . . . . 1007--1008
Alaaeldin Amin and Waleed Shinwari High-Radix Multiplier-Dividers: Theory, Design, and Hardware . . . . . . . . . . 1009--1022 Adenilso Simao and Alexandre Petrenko Checking Completeness of Tests for Finite State Machines . . . . . . . . . 1023--1032 Hongzhong Zheng and Zhichun Zhu Power and Performance Trade-Offs in Contemporary DRAM System Designs for Multicore Processors . . . . . . . . . . 1033--1046 Bernhard Egger and Seungkyun Kim and Choonki Jang and Jaejin Lee and Sang Lyul Min and Heonshik Shin Scratchpad Memory Management Techniques for Code in Embedded Systems without an MMU . . . . . . . . . . . . . . . . . . 1047--1062 Yang Chang and Andy Wellings Garbage Collection for Flexible Hard Real-Time Systems . . . . . . . . . . . 1063--1075 Xiaojing Xiang and Xin Wang and Yuanyuan Yang Stateless Multicasting in Mobile Ad Hoc Networks . . . . . . . . . . . . . . . . 1076--1090 Harold Ishebabi and Christophe Bobda Heuristics for Flexible CMP Synthesis 1091--1104 S. Stojkovic and D. Jankovic and R. S. Stankovic An Improved Algorithm for the Construction of Decision Diagrams by Rearranging and Partitioning the Input Cube Set . . . . . . . . . . . . . . . . 1105--1119 Taekyoung Kwon and Jin Hong Secure and Efficient Broadcast Authentication in Wireless Sensor Networks . . . . . . . . . . . . . . . . 1120--1133 Ron S. Waters and Earl E. Swartzlander A Reduced Complexity Wallace Multiplier Reduction . . . . . . . . . . . . . . . 1134--1137 Sudarshan K. Srinivasan Automatic Refinement Checking of Pipelines with Out-of-Order Execution 1138--1144 Ming-Der Shieh and Wen-Ching Lin Word-Based Montgomery Modular Multiplication Algorithm for Low-Latency Scalable Architectures . . . . . . . . . 1145--1151 Anonymous New OnlinePlus Publication Model Beginning in 2010 . . . . . . . . . . . 1152--1152
Guey-Yun Chang $(t, k)$-Diagnosability for Regular Networks . . . . . . . . . . . . . . . . 1153--1157 Min Yang and Yuanyuan Yang An Efficient Hybrid Peer-to-Peer System for Distributed Data Sharing . . . . . . 1158--1171 P. Valente and F. Checconi High Throughput Disk Scheduling with Fair Bandwidth Distribution . . . . . . 1172--1186 I. V. Zotov Distributed Virtual Bit-Slice Synchronizer: a Scalable Hardware Barrier Mechanism for $n$-Dimensional Meshes . . . . . . . . . . . . . . . . . 1187--1199 Kyueun Yi and J.-L. Gaudiot Network Applications on Simultaneous Multithreading Processors . . . . . . . 1200--1209 J. Whitham and N. Audsley Time-Predictable Out-of-Order Execution for Hard Real-Time Systems . . . . . . . 1210--1223 H. Frey and I. Stojmenovic On Delivery Guarantees and Worst-Case Forwarding Bounds of Elementary Face Routing Components in Ad Hoc and Sensor Networks . . . . . . . . . . . . . . . . 1224--1238 Chun-I Fan and Ling-Ying Huang and Pei-Hsiu Ho Anonymous Multireceiver Identity-Based Encryption . . . . . . . . . . . . . . . 1239--1249 S. Guilley and L. Sauvage and F. Flament and Vinh-Nga Vong and P. Hoogvorst and R. Pacalet Evaluation of Power Constant Dual-Rail Logics Countermeasures against DPA with Design Time Security Metrics . . . . . . 1250--1263 K. Gaj and Soonhak Kwon and P. Baier and P. Kohlbrenner and Hoang Le and M. Khaleeluddin and R. Bachimanchi and M. Rogawski Area-Time Efficient Implementation of the Elliptic Curve Method of Factoring in Reconfigurable Hardware for Application in the Number Field Sieve 1264--1280 M. Anand and S. Fischmeister and Y. Hur and Jesung Kim and Insup Lee Generating Reliable Code from Hybrid-Systems Models . . . . . . . . . 1281--1294 A. Yun and Jung Hee Cheon and Yongdae Kim On Homomorphic Signatures for Network Coding . . . . . . . . . . . . . . . . . 1295--1296
O. Ahmadi and F. R. Henríquez Low Complexity Cubing and Cube Root Computation over $F_3^m$ in Polynomial Basis . . . . . . . . . . . . . . . . . 1297--1308 Xiangyu Tang and Seongmoon Wang A Low Hardware Overhead Self-Diagnosis Technique Using Reed--Solomon Codes for Self-Repairing Chips . . . . . . . . . . 1309--1319 T. Yamashita Stability-Optimized Time Adjustment for a Networked Computer Clock . . . . . . . 1320--1336 Li-Pin Chang A Hybrid Approach to NAND-Flash-Based Solid-State Disks . . . . . . . . . . . 1337--1349 Mingqiang Li and Jiwu Shu DACO: a High-Performance Disk Architecture Designed Specially for Large-Scale Erasure-Coded Storage Systems . . . . . . . . . . . . . . . . 1350--1362 H. Lange and A. Koch Architectures and Execution Models for Hardware/Software Compilation and Their System-Level Realization . . . . . . . . 1363--1377 H. Attiya and D. Hay and I. Keslassy Packet-Mode Emulation of Output-Queued Switches . . . . . . . . . . . . . . . . 1378--1391 Xiaofeng Liao and Fei Chen and Kwok-wo Wong On the Security of Public-Key Algorithms Based on Chebyshev Polynomials over the Finite Field $Z_N$ . . . . . . . . . . . 1392--1401 A. Bobrek and J. M. Paul and D. E. Thomas Stochastic Contention Level Simulation for Single-Chip Heterogeneous Multiprocessors . . . . . . . . . . . . 1402--1418 S. V. Amari and Liudong Xing and A. Shrestha and J. Akers and K. S. Trivedi Performability Analysis of Multistate Computing Systems Using Multivalued Decision Diagrams . . . . . . . . . . . 1419--1433 Hyeran Jeon and Woo Hyong Lee and Sung Woo Chung Load Unbalancing Strategy for Multicore Embedded Processors . . . . . . . . . . 1434--1440
T. Brabec Speculatively Redundant Continued Logarithm Representation . . . . . . . . 1441--1454 M. Omaña and D. Rossi and C. Metra High-Performance Robust Latches . . . . 1455--1465 Heeseung Jo and Hwanju Kim and Jae-Wan Jang and Joonwon Lee and Seungryoul Maeng Transparent Fault Tolerance of Device Drivers for Virtual Machines . . . . . . 1466--1479 A. Mokhov and A. Yakovlev Conditional Partial Order Graphs: Model, Synthesis, and Application . . . . . . . 1480--1493 F. Duarte and S. Wong Cache-Based Memory Copy Hardware Accelerator for Multicore Systems . . . 1494--1507 Song Jiang and Xuechen Zhang and Shuang Liang and K. Davis Improving Networked File System Performance Using a Locality-Aware Cooperative Cache Protocol . . . . . . . 1508--1519 M. Bartlett and I. Bate and D. Kazakov Accurate Determination of Loop Iterations for Worst-Case Execution Time Analysis . . . . . . . . . . . . . . . . 1520--1532 A. Shoufan and T. Wink and H. G. Molter and S. A. Huss and E. Kohnert A Novel Cryptoprocessor Architecture for the McEliece Public-Key Cryptosystem . . 1533--1546 C. Mancillas-Lopez and D. Chakraborty and F. Rodriguez Henriquez Reconfigurable Hardware Implementations of Tweakable Enciphering Schemes . . . . 1547--1561 Shouwen Lai and B. Ravindran and Hyeonjoong Cho Heterogeneous Quorum-Based Wake-Up Scheduling in Wireless Sensor Networks 1562--1575 S. Eyerman and L. Eeckhout A Counter Architecture for Online DVFS Profitability Estimation . . . . . . . . 1576--1583 Anonymous IEEE Computer Society CSDP Certification 1584--1584
J.-C. Bajard and C. Negre and T. Plantard Subquadratic Space Complexity Binary Field Multiplier Using Double Polynomial Representation . . . . . . . . . . . . . 1585--1597 E. Quiñones and J. Parcerisa and A. González Leveraging Register Windows to Reduce Physical Registers to the Bare Minimum 1598--1610 Mingqiang Li and Jiwu Shu Preventing Silent Data Corruptions from Propagating During Data Reconstruction 1611--1624 S. O. D. Luiz and A. Perkusich and A. M. N. Lima Multisize Sliding Window in Workload Estimation for Dynamic Power Management 1625--1639 Jeonghwan Choi and S. Govindan and Jinkyu Jeong and B. Urgaonkar and A. Sivasubramaniam Power Consumption Prediction and Power-Aware Packing in Consolidated Environments . . . . . . . . . . . . . . 1640--1654 Wei Yu and Nan Zhang and Xinwen Fu and R. Bettati and Wei Zhao Localization Attacks to Internet Threat Monitors: Modeling and Countermeasures 1655--1668 M. F. Younis and Sookyoung Lee and A. A. Abbasi A Localized Algorithm for Restoring Internode Connectivity in Networks of Moveable Sensors . . . . . . . . . . . . 1669--1682 Wencheng Lu and S. Sahni Recursively Partitioned Static IP Router Tables . . . . . . . . . . . . . . . . . 1683--1690 Ping Xu and ShiGuang Wang and Xiang-Yang Li SALSA: Strategyproof Online Spectrum Admissions for Wireless Networks . . . . 1691--1702 Inwook Kong and E. E. Swartzlander A Rounding Method to Reduce the Required Multiplier Precision for Goldschmidt Division . . . . . . . . . . . . . . . . 1703--1708 S. Q. Zheng An Optimal Wide-Sense Nonblocking Distributor . . . . . . . . . . . . . . 1709--1714 M. Knezevic and F. Vercauteren and I. Verbauwhede Faster Interleaved Modular Multiplication Based on Barrett and Montgomery Reduction Methods . . . . . . 1715--1721 F. J. Cazorla and A. Pajuelo and O. J. Santana and E. Fernandez and M. Valero On the Problem of Evaluating the Performance of Multiprogrammed Workloads 1722--1728
Fabrizio Lombardi Editorial . . . . . . . . . . . . . . . 1--1 Albert Y. Zomaya State of the Journal . . . . . . . . . . 2--2 Dimitris Gizopoulos and Shubhendu Mukherjee Guest Editors' Introduction: Special Section on Dependable Computer Architecture . . . . . . . . . . . . . . 3--4 Shantanu Gupta and Shuguang Feng and Amin Ansari and Scott Mahlke StageNet: a Reconfigurable Fabric for Constructing Dependable CMPs . . . . . . 5--19 Somnath Paul and Fang Cai and Xinmiao Zhang and Swarup Bhunia Reliability-Driven ECC Allocation for Multiple Bit Error Resilience in Processor Cache . . . . . . . . . . . . 20--34 Amin Ansari and Shantanu Gupta and Shuguang Feng and Scott Mahlke Maximizing Spare Utilization by Virtually Reorganizing Faulty Cache Lines . . . . . . . . . . . . . . . . . 35--49 Alaa R. Alameldeen and Zeshan Chishti and Chris Wilkerson and Wei Wu and Shih-Lien Lu Adaptive Cache Design to Enable Reliable Low-Voltage Operation . . . . . . . . . 50--63 Suzhen Wu and Hong Jiang and Dan Feng and Lei Tian and Bo Mao Improving Availability of RAID-Structured Storage Systems by Workload Outsourcing . . . . . . . . . . 64--79 Soojun Im and Dongkun Shin Flash-Aware RAID Techniques for Dependable and High-Performance Flash Memory SSD . . . . . . . . . . . . . . . 80--92 Weikang Qian and Xin Li and Marc D. Riedel and Kia Bazargan and David J. Lilja An Architecture for Fault-Tolerant Computation with Stochastic Logic . . . 93--105 Hwanju Kim and Heeseung Jo and Joonwon Lee XHive: Efficient Cooperative Caching for Virtual Machines . . . . . . . . . . . . 106--119 Zhenyu Zhong and Kang Li Speed Up Statistical Spam Filter by Approximation . . . . . . . . . . . . . 120--134 Krzysztof Jankowski and Pierre Laurent Packed AES-GCM Algorithm Suitable for AES/PCLMULQDQ Instructions . . . . . . . 135--138 Anonymous 2010 Annual Reviewers List . . . . . . . 139--143 Anonymous 2010 Annual Index . . . . . . . . . . . INDEX:1--INDEX:18
Javier Bruguera and Marius Cornea and Debjit Das Sarma Guest Editors' Introduction: Special Section on Computer Arithmetic . . . . . 145--147 Fabrizio Lamberti and Nikos Andrikos and Elisardo Antelo and Paolo Montuschi Reducing the Computation Time in (Short Bit-Width) Two's Complement Multipliers 148--156 Sylvie Boldo and Jean-Michel Muller Exact and Approximated Error of the FMA 157--164 Niels Möller and Torbjörn Granlund Improved Division by Invariant Integers 165--175 Elena Guralnik and Merav Aharoni and Ariel J. Birnbaum and Anatoly Koyfman Simulation-Based Verification of Floating-Point Division . . . . . . . . 176--188 Vassil S. Dimitrov and Kimmo U. Jarvinen and Jithra Adikari Area-Efficient Multipliers Based on Multiple-Radix Representations . . . . . 189--201 Mark G. Arnold and Sylvain Collange A Real/Complex Logarithmic Number System ALU . . . . . . . . . . . . . . . . . . 202--213 Claude-Pierr Jeannerod and Hervé Knochel and Christophe Monat and Guillaume Revy Computing Floating-Point Square Roots via Bivariate Polynomial Evaluation . . 214--227 Claude-Pierre Jeannerod and Nicolas Louvet and Jean-Michel Muller and Adrien Panhaleux Midpoints and Exact Points of Some Algebraic Functions in Floating-Point Arithmetic . . . . . . . . . . . . . . . 228--241 Florent de Dinechin and Christoph Lauter and Guillaume Melquiond Certifying the Floating-Point Implementation of an Elementary Function Using Gappa . . . . . . . . . . . . . . 242--253 Jithra Adikari and Vassil S. Dimitrov and Laurent Imbert Hybrid Binary-Ternary Number System for Elliptic Curve Cryptosystems . . . . . . 254--265 Jean-Luc Beuchat and Jeremie Detrey and Nicolas Estibals and Eiji Okamoto and Francisco Rodriguez-Henriquez Fast Architectures for the $\eta_T$ Pairing over Small-Characteristic Supersingular Elliptic Curves . . . . . 266--281 Peter Kornerup and Jean-Michel Muller and Adrien Panhaleux Performing Arithmetic Operations on Round-to-Nearest Representations . . . . 282--291 Xue-Liang Liao and Shi Bai and Yu-Ping Wang and Shi-Min Hu ISRA-Based Grouping: a Disk Reorganization Approach for Disk Energy Conservation and Disk Performance Enhancement . . . . . . . . . . . . . . 292--304
Yuan-Hao Chang and Tei-Wei Kuo A Management Strategy for the Reliability and Performance Improvement of MLC-Based Flash-Memory Storage Systems . . . . . . . . . . . . . . . . 305--320 Youngwoo Park and Kyu Ho Park High-Performance Scalable Flash File System Using Virtual Metadata Storage with Phase-Change RAM . . . . . . . . . 321--334 Ningde Xie and Guiqiang Dong and Tong Zhang Using Lossless Data Compression in Data Storage Systems: Not for Saving Space 335--345 Kai Zheng and Hongbin Lu and Erich Nahum Scalable Pattern Matching on Multicore Platform via Dynamic Differentiated Distributed Detection (D$^4$) . . . . . 346--359 Ziliang Zong and Adam Manzanares and Xiaojun Ruan and Xiao Qin EAD and PEBD: Two Energy-Aware Duplication Scheduling Algorithms for Parallel Tasks on Homogeneous Clusters 360--374 Debdeep Mukhopadhyay and Dipanwita Roy Chowdhury A Parallel Efficient Architecture for Large Cryptographically Robust $n \times k (k \geq n / 2)$ Mappings . . . . . . . 375--385 Xiang-Yang Li and Yajun Wang and Yu Wang Complexity of Data Collection, Aggregation, and Selection for Wireless Sensor Networks . . . . . . . . . . . . 386--399 Miao Zhao and Ming Ma and Yuanyuan Yang Efficient Data Gathering with Mobile Collectors and Space-Division Multiple Access Technique in Wireless Sensor Networks . . . . . . . . . . . . . . . . 400--417 Antonio Giuseppe Maria Strollo and Davide De Caro and Nicola Petra Elementary Functions Hardware Implementation Using Constrained Piecewise-Polynomial Approximations . . 418--432 Gianlorenzo D'Angelo and Gabriele Di Stefano and Alfredo Navarra and Cristina M. Pinotti Recoverable Robust Timetables: An Algorithmic Approach on Trees . . . . . 433--446
Ming T. Liu A Brief History of the IEEE Transactions on Computers . . . . . . . . . . . . . . 449--449 Alfredo Benso and Yiorgos Makris and Pinaki Mazumder Guest Editors' Introduction: Special Section on Chips and Architectures for Emerging Technologies and Applications 450--451 Alessandro Cilardo Exploring the Potential of Threshold Logic for Cryptography-Related Operations . . . . . . . . . . . . . . . 452--462 Z. Abid and Ming Liu and Wei Wang 3D Integration of CMOL Structures for FPGA Applications . . . . . . . . . . . 463--471 Thomas J. Ashby and Pedro Diaz and Marcelo Cintra Software-Based Cache Coherence with Hardware-Assisted Selective Self-Invalidations Using Bloom Filters 472--483 Preeti Ranjan Panda and M. Balakrishnan and Anant Vishnoi Compressing Cache State for Postsilicon Processor Debug . . . . . . . . . . . . 484--497 Adam B. Kinsman and Nicola Nicolici Trade-Offs in Test Data Compression and Deterministic X-Masking of Responses . . 498--507 Frank Olaf Sem-Jacobsen and Tor Skeie and Olav Lysne and Jose Duato Dynamic Fault Tolerance in Fat Trees . . 508--525 Lei Jin and Sangyeun Cho Macro Data Load: An Efficient Mechanism for Enhancing Loaded Data Reuse . . . . 526--537 Mohamed Khalgui and Olfa Mosbahi and ZhiWu Li and Hans-Michael Hanisch Reconfigurable Multiagent Embedded Control Systems: From Modeling to Implementation . . . . . . . . . . . . . 538--551 Jae-Wan Jang and Myeongjae Jeon and Hyo-Sil Kim and Heeseung Jo and Jin-Soo Kim and Seungryoul Maeng Energy Reduction in Consolidated Servers through Memory-Aware Virtual Machine Scheduling . . . . . . . . . . . . . . . 552--564 Yong Tang and Bin Xiao and Xicheng Lu Signature Tree Generation for Polymorphic Worms . . . . . . . . . . . 565--579 Ping Xu and Xiang-Yang Li and Shaojie Tang and JiZhong Zhao Efficient and Strategyproof Spectrum Allocations in Multichannel Wireless Networks . . . . . . . . . . . . . . . . 580--593 Po-Ching Lin and Ying-Dar Lin and Yuan-Cheng Lai A Hybrid Algorithm of Backward Hashing and Automaton Tracking for Virus Scanning . . . . . . . . . . . . . . . . 594--601 M. Anwar Hasan and Christophe Negre Low Space Complexity Multiplication over Binary Fields with Dickson Polynomial Representation . . . . . . . . . . . . . 602--607
Albert Zomaya State of the Journal . . . . . . . . . . 609--613 Charles Tsen and Sonia Gonzalez-Navarro and Michael J. Schulte and Katherine Compton Hardware Designs for Binary Integer Decimal-Based Rounding . . . . . . . . . 614--627 Chun-Lung Hsu and Yu-Sheng Huang and Ming-Da Chang and Hung-Yen Huang Design of an Error-Tolerance Scheme for Discrete Wavelet Transform in JPEG 2000 Encoder . . . . . . . . . . . . . . . . 628--638 Yawei Li and Zhiling Lan FREM: a Fast Restart Mechanism for General Checkpoint/Restart . . . . . . . 639--652 Eyee Hyun Nam and Bryan Suk Joon Kim and Hyeonsang Eom and Sang Lyul Min Ozone (O3): An Out-of-Order Flash Memory Controller Architecture . . . . . . . . 653--666 Ana Paula Couto da Silva and Emilio Leonardi and Marco Mellia and Michela Meo Exploiting Heterogeneity in P2P Video Streaming . . . . . . . . . . . . . . . 667--679 Siew Kei Lam and Thambipillai Srikanthan and Christopher T. Clarke Architecture-Aware Technique for Mapping Area-Time Efficient Custom Instructions onto FPGAs . . . . . . . . . . . . . . . 680--692 Sun-Yuan Hsieh and Yi-Ling Huang and Ying-Chi Yang Multiprefix Trie: a New Data Structure for Designing Dynamic Router-Tables . . 693--706 Bulent Tavli and Wendi B. Heinzelman Energy-Efficient Real-Time Multicast Routing in Mobile Ad Hoc Networks . . . 707--722 Haoyu Song and Jonathan S. Turner Toward Advocacy-Free Evaluation of Packet Classification Algorithms . . . . 723--733 Shang-Wei Lin and Pao-Ann Hsiung Counterexample-Guided Assume-Guarantee Synthesis through Learning . . . . . . . 734--750
Mong-Ling Chiao and Da-Wei Chang ROSE: a Novel Flash Translation Layer for NAND Flash Memory Based on Hybrid Address Translation . . . . . . . . . . 753--766 Yi-Jung Chen and Chia-Lin Yang and Jaw-Wei Chi and Jian-Jia Chen TACLC: Timing-Aware Cache Leakage Control for Hard Real-Time Systems . . . 767--782 Hiroki Matsutani and Michihiro Koibuchi and Hideharu Amano and Tsutomu Yoshinaga Prediction Router: a Low-Latency On-Chip Router Architecture with Multiple Predictors . . . . . . . . . . . . . . . 783--799 Xiaomin Zhu and Xiao Qin and Meikang Qiu QoS-Aware Fault-Tolerant Scheduling for Real-Time Tasks on Heterogeneous Clusters . . . . . . . . . . . . . . . . 800--812 Hung-Min Sun and Hsun Wang and King-Hang Wang and Chien-Ming Chen A Native APIs Protection Mechanism in the Kernel Mode against Malicious Code 813--823 Jaehong Min and Daeyoung Yoon and Youjip Won Efficient Deduplication Techniques for Modern Backup Operation . . . . . . . . 824--840 Sherief Reda and Ryan J. Cochran and Abdullah Nazma Nowroz Improved Thermal Tracking for Processors Using Hard and Soft Sensor Allocation Techniques . . . . . . . . . . . . . . . 841--851 Mingsong Chen and Prabhat Mishra Property Learning Techniques for Efficient Generation of Directed Tests 852--864 Bing-Hong Liu and Min-Lun Chen and Ming-Jer Tsai Message-Efficient Location Prediction for Mobile Objects in Wireless Sensor Networks Using a Maximum Likelihood Technique . . . . . . . . . . . . . . . 865--878 Samer Samarah and Azzedine Boukerche and Alexander Shema Habyalimana Target Association Rules: a New Behavioral Patterns for Point of Coverage Wireless Sensor Networks . . . 879--889 Ashkan Hosseinzadeh Namin and Huapeng Wu and Majid Ahmadi A Word-Level Finite Field Multiplier Using Normal Basis . . . . . . . . . . . 890--895 George Michelogiannakis and Daniel U. Becker and William J. Dally Evaluating Elastic Buffer and Wormhole Flow Control . . . . . . . . . . . . . . 896--903 G. Robert Redinbo Systematic Wavelet Subcodes for Data Protection . . . . . . . . . . . . . . . 904--909 Anonymous Call for Papers: Special Section on Computer Arithmetic . . . . . . . . . . 910--910
Sameh Galal and Mark Horowitz Energy-Efficient Floating-Point Unit Design . . . . . . . . . . . . . . . . . 913--922 Miaoqing Huang and Kris Gaj and Tarek El-Ghazawi New Hardware Architectures for Montgomery Modular Multiplication Algorithm . . . . . . . . . . . . . . . 923--936 Ehab Anis Daoud and Nicola Nicolici On Using Lossy Compression for Repeatable Experiments during Silicon Debug . . . . . . . . . . . . . . . . . 937--950 Luc Malrait and Sara Bouchenak and Nicolas Marchand Experience with CONSER: a System for Server Control through Fluid Modeling 951--963 Mohamed Hefeeda and Cheng-Hsin Hsu and Kianoosh Mokhtarian Design and Evaluation of a Proxy Cache for Peer-to-Peer Traffic . . . . . . . . 964--977 Miao Liu and Duo Liu and Yi Wang and Meng Wang and Zili Shao On Improving Real-Time Interrupt Latencies of Hybrid Operating Systems with Two-Level Hardware Interrupts . . . 978--991 Aleksandar Milenkovi\'c and Vladimir Uzelac and Milena Milenkovi\'c and Martin Burtscher Caches and Predictors for Real-Time, Unobtrusive, and Cost-Effective Program Tracing in Embedded Systems . . . . . . 992--1005 Satoshi Fujita A Branch-and-Bound Algorithm for Solving the Multiprocessor Scheduling Problem with Improved Lower Bounding Techniques 1006--1016 Xiaoyong Tang and Kenli Li and Zeng Zeng and Bharadwaj Veeravalli A Novel Security-Driven Scheduling Algorithm for Precedence-Constrained Tasks in Heterogeneous Distributed Systems . . . . . . . . . . . . . . . . 1017--1029 Stefano Di Carlo and Paolo Prinetto and Alessandro Savino Software-Based Self-Test of Set-Associative Cache Memories . . . . . 1030--1044 Tingting Chen and Fan Wu and Sheng Zhong FITS: a Finite-Time Reputation System for Cooperation in Wireless Ad Hoc Networks . . . . . . . . . . . . . . . . 1045--1056
Sandeep K. Shukla and Jean-Pierre Talpin Guest Editors' Introduction: Special Section on Science of Design for Safety Critical Systems . . . . . . . . . . . . 1057--1058 Pedro Sanchez and Diego Alonso and Francisca Rosique and Barbara Alvarez and Juan A. Pastor Introducing Safety Requirements Traceability Support in Model-Driven Development of Robotic Applications . . 1059--1071 Irem Y. Tumer and Carol S. Smidts Integrated Design-Stage Failure Analysis of Software-Driven Hardware Systems . . 1072--1084 Rachid Hadjidj and Hanifa Boucheneb Efficient Reachability Analysis for Time Petri Nets . . . . . . . . . . . . . . . 1085--1099 Matt Duckham and Doron Nussbaum and Jorg-Rudiger Sack and Nicola Santoro Efficient, Decentralized Computation of the Topology of Spatial Regions . . . . 1100--1113 Ransford Hyman and Koustav Bhattacharya and Nagarajan Ranganathan Redundancy Mining for Soft Error Detection in Multicore Processors . . . 1114--1125 Jong-Chan Kim and Duhee Lee and Chang-Gun Lee and Kanghee Kim RT-PLRU: a New Paging Scheme for Real-Time Execution of Program Codes on NAND Flash Memory for Portable Media Players . . . . . . . . . . . . . . . . 1126--1141 Pengju Shang and Jun Wang and Huijun Zhu and Peng Gu A New Placement-Ideal Layout for Multiway Replication Storage System . . 1142--1156 Yawen Chen and Hong Shen Embedding Meshes and Tori on Double-Loop Networks of the Same Size . . . . . . . 1157--1168 Mehdi Kargahi and Ali Movaghar Performance Optimization Based on Analytical Modeling in a Real-Time System with Constrained Time/Utility Functions . . . . . . . . . . . . . . . 1169--1181 Heeyeol Yu and Rabi N. Mahapatra A Power and Throughput-Efficient Packet Classifier with $n$ Bloom Filters . . . 1182--1193 Javier Carretero and Pedro Chaparro and Xavier Vera and Jaume Abella and Antonio Gonzalez Implementing End-to-End Register Data-Flow Continuous Self-Test . . . . . 1194--1206 Xin Tian and Lin Wu and Yi-Hua Tan and Jin-Wen Tian Efficient Multi-Input/Multi-Output VLSI Architecture for Two-Dimensional Lifting-Based Discrete Wavelet Transform 1207--1211 Ivan Oseledets Improved $n$-Term Karatsuba-Like Formulas in $\mathrm{GF}(2)$ . . . . . . 1212--1216
Cecilia Metra and Rajesh Galivanche Guest Editors' Introduction: Special Section on Concurrent On-Line Testing and Error/Fault Resilience of Digital Systems . . . . . . . . . . . . . . . . 1217--1218 Guihai Yan and yinhe Han and Xiaowei Li ReviveNet: a Self-Adaptive Architecture for Improving Lifetime Reliability via Localized Timing Adaptation . . . . . . 1219--1232 Ramtilak Vemu and Jacob Abraham CEDA: Control-Flow Error Detection Using Assertions . . . . . . . . . . . . . . . 1233--1245 Saeed Shamshiri and Kwang-Ting (Tim) Cheng Modeling Yield, Cost, and Quality of a Spare-Enhanced Multicore Chip . . . . . 1246--1259 Michail Maniatakos and Naghmeh Karimi and Chandra Tirumurti and Abhijit Jas and Yiorgos Makris Instruction-Level Impact Analysis of Low-Level Faults in a Modern Microprocessor Controller . . . . . . . 1260--1273 Naghmeh Karimi and Michail Maniatakos and Abhijit Jas and Chandra Tirumurti and Yiorgos Makris Workload-Cognizant Concurrent Error Detection in the Scheduler of a Modern Microprocessor . . . . . . . . . . . . . 1274--1287 Soheil Aminzadeh and Alireza Ejlali A Comparative Study of System-Level Energy Management Methods for Fault-Tolerant Hard Real-Time Systems 1288--1299 Ming Gao and Hsiu-Ming (Sherman) Chang and Peter Lisherness and Kwang-Ting (Tim) Cheng Time-Multiplexed Online Checking . . . . 1300--1312 Muhammad M. Nisar and Abhijit Chatterjee Guided Probabilistic Checksums for Error Control in Low-Power Digital Filters . . 1313--1326 Mehran Mozaffari-Kermani and Arash Reyhani-Masoleh A Low-Power High-Performance Concurrent Fault Detection Approach for the Composite Field S-Box and Inverse S-Box 1327--1340 Arash Hariri and Arash Reyhani-Masoleh Concurrent Error Detection in Montgomery Multiplication over Binary Extension Fields . . . . . . . . . . . . . . . . . 1341--1353 Wonhak Hong and Rajashekhar Modugu and Minsu Choi Efficient Online Self-Checking Modulo $2^n + 1$ Multiplier Design . . . . . . 1354--1365 Valeria Garofalo and Nicola Petra and Ettore Napoli Analytical Calculation of the Maximum Error for a Family of Truncated Multipliers Providing Minimum Mean Square Error . . . . . . . . . . . . . . 1366--1371 Nicholas Pippenger On-the-Fly Algorithms and Sequential Machines . . . . . . . . . . . . . . . . 1372--1375 Anonymous Stay Connected . . . . . . . . . . . . . 1376--1376
Chin-Yung Lu and Shiou-An Wang and Sy-Yen Kuo An Extended XQDD Representation for Multiple-Valued Quantum Logic . . . . . 1377--1389 Rahul Ratan and A. Yavuz Oruc Self-Routing Quantum Sparse Crossbar Packet Concentrators . . . . . . . . . . 1390--1405 Chang Joo Lee and Onur Mutlu and Veynu Narasiman and Yale N. Patt Prefetch-Aware Memory Controllers . . . 1406--1430 Ge-Ming Chiu and Li-Hsing Yen and Tai-Lin Chin Optimal Storage Placement for Tree-Structured Networks with Heterogeneous Channel Costs . . . . . . 1431--1444 Christophe Dubach and Timothy M. Jones and Michael F. P. O'Boyle An Empirical Architecture-Centric Approach to Microarchitectural Design Space Exploration . . . . . . . . . . . 1445--1458 Kazuteru Namba and Hideo Ito Test Sets for Robust Path Delay Fault Testing on Two-Rail Logic Circuits . . . 1459--1470 Ge Nong and Sen Zhang and Wai Hong Chan Two Efficient Algorithms for Linear Time Suffix Array Construction . . . . . . . 1471--1484 Amlan Ganguly and Kevin Chang and Sujay Deb and Partha Pratim Pande and Benjamin Belzer and Christof Teuscher Scalable Hybrid Wireless Network-on-Chip Architectures for Multicore Systems . . 1485--1502 Ching-Nung Yang and Chih-Yang Chiu and Gen-Chin Wu Efficient Encoding/Decoding for Second-Order Spectral-Null Codes by Reducing Random Walks . . . . . . . . . 1503--1510 Pedro Reviriego and Chris Bleakley and Juan Antonio Maestro and Anne O'Donnell Offset DMR: a Low Overhead Soft Error Detection and Correction Technique for Transform-Based Convolution . . . . . . 1511--1516 Anonymous Call For Papers: Networks-on-Chip . . . 1517--1517 Anonymous Call For Papers: Energy Efficient Computing . . . . . . . . . . . . . . . 1518--1518 Anonymous Call For Papers: System-Level Design and Validation of Heterogeneous Chip Multiprocessors . . . . . . . . . . . . 1519--1519 Anonymous New Transactions on Computers Essential Sets Available . . . . . . . . . . . . . 1520--1520
Kuo-Yi Chen and J. Morris Chang and Ting-Wei Hou Multithreading in Java: Performance and Scalability on Multicore Systems . . . . 1521--1534 Daniel Piso and Javier D. Bruguera Variable Latency Goldschmidt Algorithm Based on a New Rounding Method and a Remainder Estimate . . . . . . . . . . . 1535--1546 Soumyaroop Roy and Nagarajan Ranganathan and Srinivas Katkoori State-Retentive Power Gating of Register Files in Multicore Processors Featuring Multithreaded In-Order Cores . . . . . . 1547--1560 Minh Huynh and Stuart Goose and Prasant Mohapatra and Raymond Liao RRR: Rapid Ring Recovery Submillisecond Decentralized Recovery for Ethernet Ring 1561--1570 David Eppstein and Michael T. Goodrich Succinct Greedy Geometric Routing Using Hyperbolic Geometry . . . . . . . . . . 1571--1580 Howard M. Heys and Liang Zhang Pipelined Statistical Cipher Feedback: a New Mode for High-Speed Self-Synchronizing Stream Encryption . . 1581--1595 Derek Pao and Xing Wang and Xiaoran Wang and Cong Cao and Yuesheng Zhu String Searching Engine for Virus Scanning . . . . . . . . . . . . . . . . 1596--1609 Chih-Hsun Chou and Kuo-Feng Ssu and Hewijin Christine Jiau and Wei-Tong Wang and Chao Wang A Dead-End Free Topology Maintenance Protocol for Geographic Forwarding in Wireless Sensor Networks . . . . . . . . 1610--1621 Jaehoon Jeong and Shuo Guo and Tian He and David H. C. Du Autonomous Passive Localization Algorithm for Road Sensor Networks . . . 1622--1637 Hady S. AbdelSalam and Stephan Olariu Toward Efficient Task Management in Wireless Sensor Networks . . . . . . . . 1638--1651 Adam B. Kinsman and Nicola Nicolici Computational Vector-Magnitude-Based Range Determination for Scientific Abstract Data Types . . . . . . . . . . 1652--1663 Anonymous New Transactions on Computers Essential Sets Available . . . . . . . . . . . . . 1664--1664
Chun-Hung Lai and Fu-Ching Yang and Ing-Jer Huang A Trace-Capable Instruction Cache for Cost-Efficient Real-Time Program Trace Compression in SoC . . . . . . . . . . . 1665--1677 Todor Mladenov and Saeid Nooshabadi and Keseon Kim Implementation and Evaluation of Raptor Codes on Embedded Systems . . . . . . . 1678--1691 Zhimin Chen and Patrick Schaumont A Parallel Implementation of Montgomery Multiplication on Multicore Systems: Algorithm, Analysis, and Prototype . . . 1692--1703 Chun-An Chen and Sun-Yuan Hsieh $(t,k)$-Diagnosis for Component-Composition Graphs under the MM* Model . . . . . . . . . . . . . . . 1704--1717 Jun Zhu and Zhefu Jiang and Zhen Xiao and Xiaoming Li Optimizing the Performance of Virtual Machine Synchronization for Fault Tolerance . . . . . . . . . . . . . . . 1718--1729 Nicola Bombieri and Franco Fummi and Graziano Pravadelli Automatic Abstraction of RTL IPs into Equivalent TLM Descriptions . . . . . . 1730--1743 Cristiana Bolchini and Antonio Miele and Chiara Sandionigi A Novel Design Methodology for Implementing Reliability-Aware Systems on SRAM-Based FPGAs . . . . . . . . . . 1744--1758 Xinfa Hu and Guoliang Xing and Joseph Y.-T. Leung Exploring the Interplay between Computation and Communication in Distributed Real-Time Scheduling . . . . 1759--1771 Sookyoung Lee and Mohamed F. Younis EQAR: Effective QoS-Aware Relay Node Placement Algorithm for Connecting Disjoint Wireless Sensor Subnetworks . . 1772--1787 Wei Dong and Chun Chen and Xue Liu and Yunhao Liu and Jiajun Bu and Kougen Zheng SenSpire OS: a Predictable, Flexible, and Efficient Operating System for Wireless Sensor Networks . . . . . . . . 1788--1801 Alex X. Liu and Fei Chen and JeeHyun Hwang and Tao Xie Designing Fast and Scalable XACML Policy Evaluation Engines . . . . . . . . . . . 1802--1817 Robert M. Hierons Controllable Testing from Nondeterministic Finite State Machines with Multiple Ports . . . . . . . . . . 1818--1822
Albert Y. Zomaya State of the Journal . . . . . . . . . . 1--2 Tania Banerjee Mishra and Sartaj Sahni PETCAM --- a Power Efficient TCAM Architecture for Forwarding Tables . . . 3--17 Anat Bremlerr-Barr and Danny Hendler Space-Efficient TCAM-Based Classification Using Gray Coding . . . . 18--30 Vinay Devadas and Hakan Aydin On the Interplay of Voltage/Frequency Scaling and Device Power Management for Frame-Based Real-Time Embedded Applications . . . . . . . . . . . . . . 31--44 Woochul Kang and Sang Hyuk Son and John A. Stankovic Design, Implementation, and Evaluation of a QoS-Aware Real-Time Embedded Database . . . . . . . . . . . . . . . . 45--59 Manish Kumar Jaiswal and Nitin Chandrachoodan FPGA-Based High-Performance and Scalable Block LU Decomposition Architecture . . 60--72 Minje Jun and Deumji Woo and Eui-Young Chung Partial Connection-Aware Topology Synthesis for On-Chip Cascaded Crossbar Network . . . . . . . . . . . . . . . . 73--86 Ioannis Doudalis and James Clause and Guru Venkataramani and Milos Prvulovic and Alessandro Orso Effective and Efficient Memory Protection Using Dynamic Tainting . . . 87--100 Yingpeng Sang and Hong Shen and Hui Tian Effective Reconstruction of Data Perturbed by Random Projections . . . . 101--117 Habib M. Ammari and Sajal K. Das Centralized and Clustered $k$-Coverage Protocols for Wireless Sensor Networks 118--133 Seung-Ho Park and Jung-Wook Park and Shin-Dug Kim and Charles C. Weems A Pattern Adaptive NAND Flash Memory Storage Structure . . . . . . . . . . . 134--138 Anonymous 2011 Reviewers List . . . . . . . . . . 139--144 Anonymous 2011 Annual Index . . . . . . . . . . . WebOnly
Albert Y. Zomaya State of the Journal . . . . . . . . . . 145--150 M. Anwar Hasan and Nicolas Meloni and Ashkan Hosseinzadeh Namin and Christophe Negre Block Recombination Approach for Subquadratic Space Complexity Binary Field Multiplication Based on Toeplitz Matrix--Vector Product . . . . . . . . . 151--163 Ashkan Hosseinzadeh Namin and Huapeng Wu and Majid Ahmadi High-Speed Architectures for Multiplication Using Reordered Normal Basis . . . . . . . . . . . . . . . . . 164--172 Haridimos T. Vergos and Giorgos Dimitrakopoulos On Modulo $2^n + 1$ Adder Design . . . . 173--186 Michael N. Skoufis and Spyros Tragoudas An Online Failure Detection Method for Data Buses Using Multithreshold Receiving Logic . . . . . . . . . . . . 187--198 Chi-Neng Wen and Shu-hsuan Chou and Chien-Chih Chen and Tien-Fu Chen NUDA: a Non-Uniform Debugging Architecture and Nonintrusive Race Detection for Many-Core Systems . . . . 199--212 SangKyun Yun An Efficient TCAM-Based Implementation of Multipattern Matching Using Covered State Encoding . . . . . . . . . . . . . 213--221 Andrea Marongiu and Luca Benini An OpenMP Compiler for Efficient Use of Distributed Scratchpad Memory in MPSoCs 222--236 Nikola Vujic and Felipe Cabarcas and Marc Gonzalez and Alex Ramirez and Xavier Martorell and Eduard Ayguade DMA++: On the Fly Data Realignment for On-Chip Memories . . . . . . . . . . . . 237--250 Carlos Luque and Miquel Moreto and Francisco J. Cazorla and Roberto Gioiosa and Alper Buyuktosunoglu and Mateo Valero CPU Accounting for Multicore Processors 251--264 Miao Zhao and Yuanyuan Yang Bounded Relay Hop Mobile Data Gathering in Wireless Sensor Networks . . . . . . 265--277 Chia-Wei Lee and Sun-Yuan Hsieh Pancyclicity of Matching Composition Networks under the Conditional Fault Model . . . . . . . . . . . . . . . . . 278--183 Earl E. Swartzlander and Hani H. M. Saleh FFT Implementation with Fused Floating-Point Operations . . . . . . . 284--288
Peter Kornerup and Vincent Lef\`evre and Nicolas Louvet and Jean-Michel Muller On the Computation of Correctly Rounded Sums . . . . . . . . . . . . . . . . . . 289--298 Monireh Houshmand and Saied Hosseini-Khayat and Mark M. Wilde Minimal-Memory Requirements for Pearl-Necklace Encoders of Quantum Convolutional Codes . . . . . . . . . . 299--312 L. Entrena and M. Garcia-Valderas and R. Fernandez-Cardenal and A. Lindoso and M. Portela Garcia and C. Lopez-Ongil Soft Error Sensitivity Evaluation of Microprocessors by Multilevel Emulation-Based Fault Injection . . . . 313--322 Eric P. Kim and Naresh R. Shanbhag Soft N-Modular Redundancy . . . . . . . 323--336 Xin Li and Reinhard von Hanxleden Multithreaded Reactive Programming --- the Kiel Esterel Processor . . . . . . . 337--349 Lei Shi and Bin Liu and Changhua Sun and Zhengyu Yin and Laxmi N. Bhuyan and H. Jonathan Chao Load-Balancing Multipath Switching System with Flow Slice . . . . . . . . . 350--365 Guiming Wu and Yong Dou and Junqing Sun and Gregory D. Peterson A High Performance and Memory Efficient LU Decomposer on FPGAs . . . . . . . . . 366--378 Georgina Cosma and Mike Joy An Approach to Source-Code Plagiarism Detection and Investigation Using Latent Semantic Analysis . . . . . . . . . . . 379--394 Steven de Rooij and Paul M. B. Vitanyi Approximating Rate-Distortion Graphs of Individual Data: Experiments in Lossy Compression and Denoising . . . . . . . 395--407 Paola Flocchini and T. Mesa Enriquez and Linda Pagli and Giuseppe Prencipe and Nicola Santoro Distributed Minimum Spanning Tree Maintenance for Transient Node Failures 408--414 Zhen Wang and Shuqin Fan Efficient Montgomery-Based Semi-Systolic Multiplier for Even-Type GNB of ${\rm GF}(2^m)$ . . . . . . . . . . . . . . . 415--419 Liangze Yin and Fei He and William N. N. Hung and Xiaoyu Song and Ming Gu Maxterm Covering for Satisfiability . . 420--426 Sedat Akleylek and Ferruh Ozbudak Modified Redundant Representation for Designing Arithmetic Circuits with Small Complexity . . . . . . . . . . . . . . . 427--432
Haiying Shen and Cheng-Zhong Xu Leveraging a Compound Graph-Based DHT for Multi-Attribute Range Queries with Performance Analysis . . . . . . . . . . 433--447 Cecilia Metra and Martin Omana and T. M. Mak and Simon Tam New Design for Testability Approach for Clock Fault Testing . . . . . . . . . . 448--457 Haiying Shen and Kai Hwang Locality-Preserving Clustering and Discovery of Resources in Wide-Area Distributed Computational Grids . . . . 458--473 Jeyavijayan Rajendran and Harika Manem and Ramesh Karri and Garrett S. Rose An Energy-Efficient Memristive Threshold Logic Circuit . . . . . . . . . . . . . 474--487 Naga Durga Prasad Avirneni and Arun K. Somani Low Overhead Soft Error Mitigation Techniques for High-Performance and Aggressive Designs . . . . . . . . . . . 488--501 Weiwu Hu and Yunji Chen and Tianshi Chen and Cheng Qian and Lei Li Linear Time Memory Consistency Verification . . . . . . . . . . . . . . 502--516 Pengju Shang and Saba Sehrish and Jun Wang TRAID: Exploiting Temporal Redundancy and Spatial Redundancy to Boost Transaction Processing Systems Performance . . . . . . . . . . . . . . 517--529 Brad D. Bingham and Mark R. Greenstreet Modeling Energy-Time Trade-Offs in VLSI Computation . . . . . . . . . . . . . . 530--547 Paruj Ratanaworabhan and Martin Burtscher and Darko Kirovski and Benjamin Zorn and Rahul Nagpal and Karthik Pattabiraman Efficient Runtime Detection and Toleration of Asymmetric Races . . . . . 548--562 W. Lloyd Bircher and Lizy K. John Complete System Power Estimation Using Processor Performance Events . . . . . . 563--577 Irith Pomeranz On the Computation of Common Test Data for Broadside and Skewed-Load Tests . . 578--583 Sedat Akleylek and Murat Cenk and Ferruh Ozbudak On the Polynomial Multiplication in Chebyshev Form . . . . . . . . . . . . . 584--587 Alexander Thomasian Comment on ``DACO: A High Performance Disk Architecture'' . . . . . . . . . . 588--590 Mun-Kyu Lee Comments on ``Provably Sublinear Point Multiplication on Koblitz Curves and Its Hardware Implementation'' . . . . . . . 591--592
Alberto Ros and Blas Cuesta and Ricardo Fernandez-Pascual and Maria E. Gomez and Manuel E. Acacio and Antonio Robles and Jose M. Garcia and Jose Duato Extending Magny-Cours Cache Coherence 593--606 Dongdong Chen and Liu Han and Younhee Choi and Seok-Bum Ko Improved Decimal Floating-Point Logarithmic Converter Based on Selection by Rounding . . . . . . . . . . . . . . 607--621 Junhee Yoo and Sungjoo Yoo and Kiyoung Choi Active Memory Processor for Network-on-Chip-Based Architecture . . . 622--635 Jaehong Kim and Sangwon Seo and Dawoon Jung and Jin-Soo Kim and Jaehyuk Huh Parameter-Aware I/O Management for Solid State Disks (SSDs) . . . . . . . . . . . 636--649 Carlos Alvarez Martinez and Jesus Corbal San Adrian and Mateo Valero Cortes Dynamic Tolerance Region Computing for Multimedia . . . . . . . . . . . . . . . 650--665 Kai-Chao Yang and Jia-Shung Wang Unequal Error Protection for Streaming Media Based on Rateless Codes . . . . . 666--675 Junfeng Fan and Frederik Vercauteren and Ingrid Verbauwhede Efficient Hardware Implementation of FP-Arithmetic for Pairing-Friendly Curves . . . . . . . . . . . . . . . . . 676--685 Thomas Moyer and Kevin Butler and Joshua Schiffman and Patrick McDaniel and Trent Jaeger Scalable Web Content Attestation . . . . 686--699 Srivathsan Srinivasagopalan and Costas Busch and S. S. Iyengar An Oblivious Spanning Tree for Single-Sink Buy-at-Bulk in Low Doubling-Dimension Graphs . . . . . . . 700--712 Cheng Wang and Changjun Jiang and Xiang-Yang Li and Shaojie Tang and Yuan He and Xufei Mao and Yunhao Liu Scaling Laws of Multicast Capacity for Power-Constrained Wireless Networks under Gaussian Channel Model . . . . . . 713--725 Sun-Yuan Hsieh and Ying-Chi Yang A Classified Multisuffix Trie for IP Lookup and Update . . . . . . . . . . . 726--731 Jithra Adikari and Vassil S. Dimitrov and Kimmo U. Jarvinen A Fast Hardware Architecture for Integer to $\tau$NAF Conversion for Koblitz Curves . . . . . . . . . . . . . . . . . 732--737 Ying Xiao and Krishnaiyan Thulasiraman and Xi Fang and Dejun Yang and Guoliang Xue Computing a Most Probable Delay Constrained Path: NP-Hardness and Approximation Schemes . . . . . . . . . 738--744 Libo Huang and Sheng Ma and Li Shen and Zhiying Wang and Nong Xiao Low-Cost Binary128 Floating-Point FMA Unit Design with SIMD Support . . . . . 745--751
Jing Yang and Qiang Cao and Xu Li and Changsheng Xie and Qing Yang ST-CDP: Snapshots in TRAP for Continuous Data Protection . . . . . . . . . . . . 753--766 Xuejun Yang and Zhiyuan Wang and Jingling Xue and Yun Zhou The Reliability Wall for Exascale Supercomputing . . . . . . . . . . . . . 767--779 Pascal Giorgi On Polynomial Multiplication in Chebyshev Basis . . . . . . . . . . . . 780--789 Julio Villalba Moreno and Tomas Lang and Javier Hormigo Radix-2 Multioperand and Multiformat Streaming Online Addition . . . . . . . 790--803 Lin Shi and Hao Chen and Jianhua Sun and Kenli Li vCUDA: GPU-Accelerated High-Performance Computing in Virtual Machines . . . . . 804--816 Yu Hua and Bin Xiao and Bharadwaj Veeravalli and Dan Feng Locality-Sensitive Bloom Filter for Approximate Membership Query . . . . . . 817--830 Christos Kyrkou and Theocharis Theocharides A Parallel Hardware Architecture for Real-Time Object Detection with Support Vector Machines . . . . . . . . . . . . 831--842 Shang-Wei Lin and Pao-Ann Hsiung Model Checking Prioritized Timed Systems 843--856 Turbo Majumder and Souradip Sarkar and Partha Pratim Pande and Ananth Kalyanaraman NoC-Based Hardware Accelerator for Breakpoint Phylogeny . . . . . . . . . . 857--869 Marcello Cinque and Domenico Cotroneo and Catello Di Martino Automated Generation of Performance and Dependability Models for the Assessment of Wireless Sensor Networks . . . . . . 870--884 Chia-Hung Lin and Jian-Jhih Kuo and Bing-Hong Liu and Ming-Jer Tsai GPS-Free, Boundary-Recognition-Free, and Reliable Double-Ruling-Based Information Brokerage Scheme in Wireless Sensor Networks . . . . . . . . . . . . . . . . 885--898 Irith Pomeranz Concatenation of Functional Test Subsequences for Improved Fault Coverage and Reduced Test Length . . . . . . . . 899--904 Irith Pomeranz Fast Identification of Undetectable Transition Faults under Functional Broadside Tests . . . . . . . . . . . . 905--910 Y-Chuang Chen and Shun-Fu Liu A Note on Diagnosability of Large Fault Sets on Star Graphs . . . . . . . . . . 911--912
Xi E. Chen and Tor M. Aamodt Modeling Cache Contention and Throughput of Multiprogrammed Manycore Processors 913--927 Wei-Lin Tsai and Wei-Chih Liu and James Chien-Mo Li Structural Reduction Techniques for Logic-Chain Bridging Fault Diagnosis . . 928--938 Francesco Paterna and Andrea Acquaviva and Alberto Caprara and Francesco Papariello and Giuseppe Desoli and Luca Benini Variability-Aware Task Allocation for Energy-Efficient Quality of Service Provisioning in Embedded Streaming Multimedia Applications . . . . . . . . 939--953 Hong Shen and Longkun Guo Efficient $2$-Approximation Algorithms for Computing $2$-Connected Steiner Minimal Networks . . . . . . . . . . . . 954--968 Xiaomei Liu and Li Xiao and Andrew Kreling A Fully Distributed Method to Detect and Reduce Cut Vertices in Large-Scale Overlay Networks . . . . . . . . . . . . 969--985 Kunal P. Ganeshpure and Alodeep Sanyal and Sandip Kundu A Pattern Generation Technique for Maximizing Switching Supply Currents Considering Gate Delays . . . . . . . . 986--998 Karl Pauwels and Matteo Tomasi and Javier Diaz and Eduardo Ros and Marc M. Van Hulle A Comparison of FPGA and GPU for Real-Time Phase-Based Optical Flow, Stereo, and Local Image Features . . . . 999--1012 Yi-Hua Edward Yang and Viktor K. Prasanna High-Performance and Compact Architecture for Regular Expression Matching on FPGA . . . . . . . . . . . . 1013--1025 Hoang Le and Viktor K. Prasanna Scalable Tree-Based Architectures for IPv4/v6 Lookup Using Prefix Partitioning 1026--1039 Kun Ma and Han Liang and Kaijie Wu Homomorphic Property-Based Concurrent Error Detection of RSA: a Countermeasure to Fault Attack . . . . . . . . . . . . 1040--1049 Jianguo Liu and Chao Pan and Zhenbing Liu Novel Convolutions Using First-Order Moments . . . . . . . . . . . . . . . . 1050--1056
Elisardo Antelo and David Hough and Paolo Ienne Guest Editors' Introduction: Special Section on Computer Arithmetic . . . . . 1057--1058 Wei Liu and Alberto Nannarelli Power Efficient Division and Square Root Unit . . . . . . . . . . . . . . . . . . 1059--1070 Filippo Gandino and Fabrizio Lamberti and Gianluca Paravati and Jean-Claude Bajard and Paolo Montuschi An Algorithmic and Architectural Study on Montgomery Exponentiation in RNS . . 1071--1083 Abhilasha Aswal and M. Ganesh Perumal and G. N. Srinivasa Prasanna On Basic Financial Decimal Operations on Binary Machines . . . . . . . . . . . . 1084--1096 Petr K\rurka Fast Arithmetical Algorithms in Möbius Number Systems . . . . . . . . . . . . . 1097--1109 Andrew S. Cassidy and Andreas G. Andreou Beyond Amdahl's Law: An Objective Function That Links Multiprocessor Performance Gains to Delay and Energy 1110--1126 Chen-Wei Huang and Shiao-Li Tsao Minimizing Energy Consumption of Embedded Systems via Optimal Code Layout 1127--1139 Sanjoy Baruah and Vincenzo Bonifaci and Gianlorenzo D'Angelo and Haohan Li and Alberto Marchetti-Spaccamela and Nicole Megow and Leen Stougie Scheduling Real-Time Mixed-Criticality Jobs . . . . . . . . . . . . . . . . . . 1140--1152 Andrey Bogdanov and Ilya Kizhvatov Beyond the Limits of DPA: Combined Side-Channel Collision Attacks . . . . . 1153--1164 Mehran Mozaffari-Kermani and Arash Reyhani-Masoleh Efficient and High-Performance Parallel Hardware Architectures for the AES-GCM 1165--1178 Irith Pomeranz On the Switching Activity and Static Test Compaction of Multicycle Scan-Based Tests . . . . . . . . . . . . . . . . . 1179--1188 Ashur Rafiev and Andrey Mokhov and Frank P. Burns and Julian P. Murphy and Albert Koelmans and Alex Yakovlev Mixed Radix Reed--Muller Expansions . . 1189--1202 Anahit Martirosyan and Azzedine Boukerche Preserving Temporal Relationships of Events for Wireless Sensor Actor Networks . . . . . . . . . . . . . . . . 1203--1216
Anonymous Cover1 . . . . . . . . . . . . . . . . . c1 Anonymous Cover2 . . . . . . . . . . . . . . . . . c2 Yongzhi Cao Reliability of Mobile Processes with Noisy Channels . . . . . . . . . . . . . 1217--1230 Alejandro Valero and Salvador Petit and Julio Sahuquillo and Pedro Lopez and Jose Duato Design, Performance, and Energy Consumption of eDRAM/SRAM Macrocells for L1 Data Caches . . . . . . . . . . . . . 1231--1242 Dong Wang and Milos D. Ercegovac A Radix-16 Combined Complex Division/Square Root Unit with Operand Prescaling . . . . . . . . . . . . . . . 1243--1255 Jae-Beom Lee and Myoung-Jin Kim and Sungroh Yoon and Eui-Young Chung Application-Support Particle Filter for Dynamic Voltage Scaling of Multimedia Applications . . . . . . . . . . . . . . 1256--1269 Costas Busch and Rajgopal Kannan and Athanasios V. Vasilakos Approximating Congestion $+$ Dilation in Networks via ``Quality of Routing'' Games . . . . . . . . . . . . . . . . . 1270--1283 Tania Banerjee-Mishra and Sartaj Sahni Consistent Updates for Packet Classifiers . . . . . . . . . . . . . . 1284--1295 Joan-Lluis Ferrer and Elvira Baydal and Antonio Robles and Pedro Lopez and Jose Duato Progressive Congestion Management Based on Packet Marking and Validation Techniques . . . . . . . . . . . . . . . 1296--1310 Bach Duy Bui and Rodolfo Pellizzoni and Marco Caccamo Real-Time Scheduling of Concurrent Transactions in Multidomain Ring Buses 1311--1324 Hongya Wang and Yingyuan Xiao and LihChyun Shu Scheduling Periodic Continuous Queries in Real-Time Data Broadcast Environments 1325--1340 Oleg Golubitsky and Dmitri Maslov A Study of Optimal 4-Bit Reversible Toffoli Circuits and Their Synthesis . . 1341--1353 Miaoqing Huang and Vikram K. Narayana and Mohamed Bakhouya and Jaafar Gaber and Tarek El-Ghazawi Efficient Mapping of Task Graphs onto Reconfigurable Hardware Using Architectural Variants . . . . . . . . . 1354--1360 Anonymous Cover3 . . . . . . . . . . . . . . . . . c3 Anonymous Cover4 . . . . . . . . . . . . . . . . . c4
Michail Maniatakos and Chandrasekharan (Chandra) Tirumurti and Rajesh Galivanche and Yiorgos Makris Global Signal Vulnerability (GSV) Analysis for Selective State Element Hardening in Modern Microprocessors . . 1361--1370 Xiaorui Wang and Kai Ma and Yefu Wang Cache Latency Control for Application Fairness or Differentiation in Power-Constrained Chip Multiprocessors 1371--1385 Hao Wang and Haiquan (Chuck) Zhao and Bill Lin and Jun (Jim) Xu Robust Pipelined Memory System with Worst Case Performance Guarantee for Network Processing . . . . . . . . . . . 1386--1400 Jian Yang and Ke Zeng and Han Hu and Hongsheng Xi Dynamic Cluster Reconfiguration for Energy Conservation in Computation Intensive Service . . . . . . . . . . . 1401--1416 Dezun Dong and Xiangke Liao and Kebin Liu and Yunhao Liu and Weixia Xu Distributed Coverage in Wireless Ad Hoc and Sensor Networks by Topological Graph Approaches . . . . . . . . . . . . . . . 1417--1428 Xi Deng and Yuanyuan Yang Online Adaptive Compression in Delay Sensitive Wireless Sensor Networks . . . 1429--1442 Hady S. AbdelSalam and Stephan Olariu Toward Adaptive Sleep Schedules for Balancing Energy Consumption in Wireless Sensor Networks . . . . . . . . . . . . 1443--1458 Farrokh Ghani Zadegan and Urban Ingelsson and Gunnar Carlsson and Erik Larsson Access Time Analysis for IEEE P1687 . . 1459--1472 Joon-Sung Yang and Nur A. Touba and Benoit Nadeau-Dostie Test Point Insertion with Control Points Driven by Existing Functional Flip-Flops 1473--1483 Vinay Hanumaiah and Sarma Vrudhula Temperature-Aware DVFS for Hard Real-Time Applications on Multicore Processors . . . . . . . . . . . . . . . 1484--1494 Ziyi Zhang and Xin Wang and Qin Xin A New Performance Metric for Construction of Robust and Efficient Wireless Backbone Network . . . . . . . 1495--1506 Francesco Malandrino and Claudio Casetti and Carla-Fabiana Chiasserini Content Discovery and Caching in Mobile Networks with Infrastructure . . . . . . 1507--1520
Alessandro Savino and Stefano Di Carlo and Gianfranco Politano and Alfredo Benso and Alberto Bosio and Giorgio Di Natale Statistical Reliability Estimation of Microprocessor-Based Systems . . . . . . 1521--1534 Yoav Etsion and Dror G. Feitelson Exploiting Core Working Sets to Filter the L1 Cache with Random Sampling . . . 1535--1550 Alvaro Vazquez and Julio Villalba-Moreno and Elisardo Antelo and Emilio L. Zapata Redundant Floating-Point Decimal CORDIC Algorithm . . . . . . . . . . . . . . . 1551--1562 Ho Fai Ko and Nicola Nicolici Mapping Trigger Conditions onto Trigger Units during Post-silicon Validation and Debugging . . . . . . . . . . . . . . . 1563--1575 Jin-Fu Li Testing and Diagnosing Comparison Faults of TCAMs with Asymmetric Cells . . . . . 1576--1587 Mustafa Altun and Marc D. Riedel Logic Synthesis for Switching Lattices 1588--1600 Savio S. H. Tse Online Bounds on Balancing Two Independent Criteria with Replication and Reallocation . . . . . . . . . . . . 1601--1610 Shaoshan Liu and Jie Tang and Ligang Wang and Xiao-Feng Li and Jean-Luc Gaudiot Packer: Parallel Garbage Collection Based on Virtual Spaces . . . . . . . . 1611--1623 Jeongseob Ahn and Daehoon Kim and Jaehong Kim and Jaehyuk Huh Subspace Snooping: Exploiting Temporal Sharing Stability for Snoop Reduction 1624--1637 Pi-Cheng Hsiu and Cheng-Kang Hsieh and Der-Nien Lee and Tei-Wei Kuo Multilayer Bus Optimization for Real-Time Embedded Systems . . . . . . . 1638--1650 H. Howie Huang and Nan Zhang and Wei Wang and Gautam Das and Alexander S. Szalay Just-in-Time Analytics on Large File Systems . . . . . . . . . . . . . . . . 1651--1664
Albert Y. Zomaya A Message to the Editorial Board . . . . 1665--1665 Mootaz Elnozahy and Rami Melhem Guest Editors' Introduction: Special Section on Energy Efficient Computing 1666--1667 Keqin Li Scheduling Precedence Constrained Tasks with Reduced Processor Energy on Multiprocessor Computers . . . . . . . . 1668--1681 Jian-Jun Han and Xiaodong Wu and Dakai Zhu and Hai Jin and Laurence T. Yang and Jean-Luc Gaudiot Synchronization-Aware Energy Management for VFI-Based Multicore Real-Time Systems . . . . . . . . . . . . . . . . 1682--1696 Kshitij Sudan and Karthick Rajamani and Wei Huang and John B. Carter Tiered Memory: An Iso-Power Memory Architecture to Address the Memory Power Wall . . . . . . . . . . . . . . . . . . 1697--1710 Ankit Sethia and Ganesh Dasika and Trevor Mudge and Scott Mahlke A Customized Processor for Energy Efficient Scientific Computing . . . . . 1711--1723 Ardavan Pedram and Robert A. van de Geijn and Andreas Gerstlauer Codesign Tradeoffs for High-Performance, Low-Power Linear Algebra Architectures 1724--1736 Michael Cardosa and Aameek Singh and Himabindu Pucha and Abhishek Chandra Exploiting Spatio-Temporal Tradeoffs for Energy-Aware MapReduce in the Cloud . . 1737--1751 Osman Sarood and Phil Miller and Ehsan Totoni and Laxmikant V. Kale `Cood' Load Balancing for High Performance Computing Data Centers . . . 1752--1764 Yu Xiao and Wei Li and Matti Siekkinen and Petri Savolainen and Antti Yla-Jaaski and Pan Hui Power Management for Wireless Data Transmission Using Complex Event Processing . . . . . . . . . . . . . . . 1765--1777 Isidoros Sideris and Kiamal Pekmestzi Cost Effective Protection Techniques for TCAM Memory Arrays . . . . . . . . . . . 1778--1788 Lykomidis Mastroleon and Daniel C. O'Neill and Benjamin Yolken and Nicholas Bambos Power and Delay Aware Management of Packet Switches . . . . . . . . . . . . 1789--1799 Qiang Liu and Tim Todman and Wayne Luk and George A. Constantinides Optimizing Hardware Design by Composing Utility-Directed Transformations . . . . 1800--1812 Yue-Li Wang and Cheng-Ju Hsu and Jia-Jie Liu and Ming-Tat Ko and Fu-Hsing Wang A New Subclass of Integer Linear Programming Problems and Its Applications . . . . . . . . . . . . . . 1813--1822
Albert Y. Zomaya State of the Journal . . . . . . . . . . 1--5 Kyueun Yi and Won W. Ro and Jean-Luc Gaudiot Importance of Coherence Protocols with Network Applications on Multicore Processors . . . . . . . . . . . . . . . 6--15 Giuliana Santos Veronese and Miguel Correia and Alysson Neves Bessani and Lau Cheuk Lung and Paulo Verissimo Efficient Byzantine Fault-Tolerance . . 16--30 Stanislavs Golubcovs and Delong Shang and Fei Xia and Andrey Mokhov and Alex Yakovlev Concurrent Multiresource Arbiter: Design and Applications . . . . . . . . . . . . 31--44 Emiliano Betti and Stanley Bak and Rodolfo Pellizzoni and Marco Caccamo and Lui Sha Real-Time I/O Management System with COTS Peripherals . . . . . . . . . . . . 45--58 Michel A. Kinsy and Myong Hyon Cho and Keun Sup Shim and Mieszko Lis and G. Edward Suh and Srinivas Devadas Optimal and Heuristic Application-Aware Oblivious Routing . . . . . . . . . . . 59--73 Andrea Bianco and Paolo Giaccone and Guido Masera and Marco Ricca Power Control for Crossbar-Based Input-Queued Switches . . . . . . . . . 74--82 Ze Li and Haiying Shen SEDUM: Exploiting Social Networks in Utility-Based Distributed Routing for DTNs . . . . . . . . . . . . . . . . . . 83--97 Michele Lombardi and Michela Milano and Luca Benini Robust Scheduling of Task Graphs under Execution Time Uncertainty . . . . . . . 98--111 Kazuya Sakai and Wei-Shinn Ku and Roger Zimmermann and Min-Te Sun Dynamic Bit Encoding for Privacy Protection against Correlation Attacks in RFID Backward Channel . . . . . . . . 112--123 Zhimin Chen and Ambuj Sinha and Patrick Schaumont Using Virtual Secure Circuit to Protect Embedded Software from Side-Channel Attacks . . . . . . . . . . . . . . . . 124--136 Rui Chu and Lin Gu and Yunhao Liu and Mo Li and Xicheng Lu SenSmart: Adaptive Stack Management for Multitasking Sensor Networks . . . . . . 137--150 Xinxin Liu and Han Zhao and Xin Yang and Xiaolin Li SinkTrail: a Proactive Data Reporting Protocol for Wireless Sensor Networks 151--162 T. Nandha Kumar and Fabrizio Lombardi A Novel Heuristic Method for Application-Dependent Testing of a SRAM-Based FPGA Interconnect . . . . . . 163--172 The Van Luong and Nouredine Melab and El-Ghazali Talbi GPU Computing for Parallel Local Search Metaheuristic Algorithms . . . . . . . . 173--185 Bo Zhou and Hiroyuki Okamura and Tadashi Dohi Enhancing Performance of Random Testing through Markov Chain Monte Carlo Methods 186--192 J. Adikari and A. Barsoum and M. A. Hasan and A. H. Namin and C. Negre Improved Area-Time Tradeoffs for Field Multiplication Using Optimal Normal Bases . . . . . . . . . . . . . . . . . 193--199 Pranava K. Jha Comments on ``Multiple-Radix Gray Codes in Lee Metric'' . . . . . . . . . . . . 200 Anonymous 2012 TC Reviewers List . . . . . . . . . 201--208 Anonymous 2012 TC Annual Index . . . . . . . . . . not in print
Zeljko Zilic and Prabhat Mishra and Sandeep K. Shukla Guest Editors' Introduction: Special Section on System-Level Design and Validation of Heterogeneous Chip Multiprocessors . . . . . . . . . . . . 209--210 Hansu Cho and Lochi Yu and Samar Abdi Automatic Generation of Transducer Models for Bus-Based MPSoC Design . . . 211--224 Luigi Di Guglielmo and Franco Fummi and Graziano Pravadelli and Francesco Stefanni and Sara Vinco UNIVERCM: The UNIversal VERsatile Computational Mode for Heterogeneous System Integration . . . . . . . . . . . 225--241 Kyle Balston and Mehdi Karimibiuki and Alan J. Hu and Andre Ivanov and Steven J. E. Wilton Post-Silicon Code Coverage for Multiprocessor System-on-Chip Designs 242--246 Rajwinder Singh and Mayank Dave Antecedence Graph Approach to Checkpointing for Fault Tolerance in Mobile Agent Systems . . . . . . . . . . 247--258 Chang-Hsiung Tsai A Quick Pessimistic Diagnosis Algorithm for Hypercube-Like Multiprocessor Systems under the PMC Model . . . . . . 259--267 Ozcan Ozturk and Mahmut Kandemir and Guangyu Chen Compiler-Directed Energy Reduction Using Dynamic Voltage Scaling and Voltage Islands for Embedded Systems . . . . . . 268--278 Debrup Chakraborty and Cuauhtemoc Mancillas-Lopez and Francisco Rodriguez-Henriquez and Palash Sarkar Efficient Hardware Implementations of BRW Polynomials and Tweakable Enciphering Schemes . . . . . . . . . . 279--294 George Michelogiannakis and William J. Dally Elastic Buffer Flow Control for On-Chip Networks . . . . . . . . . . . . . . . . 295--309 Cong Liu and Jie Wu Fast Deep Packet Inspection with a Dual Finite Automata . . . . . . . . . . . . 310--321 Ricardo Quislant and Eladio Gutierrez and Oscar Plata and Emilio L. Zapata LS-Sig: Locality-Sensitive Signatures for Transactional Memory . . . . . . . . 322--335 Yi Wang and Duo Liu and Zhiwei Qin and Zili Shao Optimally Removing Intercore Communication Overhead for Streaming Applications on MPSoCs . . . . . . . . . 336--350 Fangming Liu and Bo Li and Baochun Li and Hai Jin Peer-Assisted On-Demand Streaming: Characterizing Demands and Optimizing Supplies . . . . . . . . . . . . . . . . 351--361 Cong Wang and Sherman S. M. Chow and Qian Wang and Kui Ren and Wenjing Lou Privacy-Preserving Public Auditing for Secure Cloud Storage . . . . . . . . . . 362--375 Dehao Chen and Neil Vachharajani and Robert Hundt and Xinliang Li and Stephane Eranian and Wenguang Chen and Weimin Zheng Taming Hardware Event Samples for Precise and Versatile Feedback Directed Optimizations . . . . . . . . . . . . . 376--389 Wei Zang and Ann Gordon-Ross T-SPaCS --- A Two-Level Single-Pass Cache Simulation Methodology . . . . . . 390--403 Irith Pomeranz An Adjacent Switching Activity Metric under Functional Broadside Tests . . . . 404--410 Aleksandar Radonjic and Vladimir Vujicic Integer Codes Correcting Burst Errors within a Byte . . . . . . . . . . . . . 411--415 Anonymous Call for Papers for new \booktitleTransactions on Emerging Topics in Computing . . . . . . . . . . 416
Zhiping Cai and Zhijun Wang and Kai Zheng and Jiannong Cao A Distributed TCAM Coprocessor Architecture for Integrated Longest Prefix Matching, Policy Filtering, and Content Filtering . . . . . . . . . . . 417--427 Chia-Yu Lu and Shang-Ming Jen and Chi-Sung Laih A General Framework of Side-Channel Atomicity for Elliptic Curve Scalar Multiplication . . . . . . . . . . . . . 428--438 Cheng-Kuan Lin and Tzu-Liang Kung and Jimmy J. M. Tan An Algorithmic Approach to Conditional-Fault Local Diagnosis of Regular Multiprocessor Interconnected Systems under the PMC Model . . . . . . 439--451 Dara Rahmati and Srinivasan Murali and Luca Benini and Federico Angiolini and Giovanni De Micheli and Hamid Sarbazi-Azad Computing Accurate Performance Bounds for Best Effort Networks-on-Chip . . . . 452--467 Chen-Wei Lin and Hung-Hsin Chen and Hao-Yu Yang and Chin-Yuan Huang and Mango C.-T. Chao and Rei-Fu Huang Fault Models and Test Methods for Subthreshold SRAMs . . . . . . . . . . . 468--481 Blas Cuesta and Alberto Ros and Maria E. Gomez and Antonio Robles and Jose Duato Increasing the Effectiveness of Directory Caches by Avoiding the Tracking of Noncoherent Memory Blocks 482--495 Martin Omana and Daniele Rossi and Nicolo Bosio and Cecilia Metra Low Cost NBTI Degradation Detection and Masking Approaches . . . . . . . . . . . 496--509 Qiang Zheng and Guohong Cao Minimizing Probing Cost and Achieving Identifiability in Probe-Based Network Link Monitoring . . . . . . . . . . . . 510--523 Phillip J. Kinsman and Nicola Nicolici NoC-Based FPGA Acceleration for Monte Carlo Simulations with Applications to SPECT Imaging . . . . . . . . . . . . . 524--535 Bin Liu and Bevan M. Baas Parallel AES Encryption Engines for Many-Core Processor Arrays . . . . . . . 536--547 Liang Lu and Weiqiang Liu and Maire O'Neill and Earl E. Swartzlander QCA Systolic Array Design . . . . . . . 548--560 Rohit Sunkam Ramanujam and Bill Lin Randomized Throughput-Optimal Oblivious Routing for Torus Networks . . . . . . . 561--574 Ruhi Sarikaya and Canturk Isci and Alper Buyuktosunoglu Runtime Application Behavior Prediction Using a Statistical Metric Model . . . . 575--588 Ren Ping Liu and Mark Hedley and Xun Yang WLAN Location Service with TXOP . . . . 589--598 Yiwei Zhang and Joseph P. Mcgeehan and Edward M. Regan and Stephen Kelly and Jose Luis Nunez-Yanez Biophysically Accurate Floating Point Neuroprocessors for Reconfigurable Logic 599--608 Florentine Dubois and Abbas Sheibanyrad and Frederic Petrot and Maryam Bahmani Elevator-First: A Deadlock-Free Distributed Routing Algorithm for Vertically Partially Connected 3D-NoCs 609--615 Daojing He and Jiajun Bu and Sammy Chan and Chun Chen Handauth: Efficient Handover Authentication with Conditional Privacy for Wireless Networks . . . . . . . . . 616--622 Mary Flahive and Bella Bose On Resource Placement in Gaussian and EJ Interconnection Networks . . . . . . . . 623--626 Anonymous IEEE Open Access Publishing . . . . . . 627 Anonymous \booktitleIEEE Transactions on Emerging Topics in Computing . . . . . . . . . . 628
Chih-Yuan Lien and Chien-Chuan Huang and Pei-Yin Chen and Yi-Fan Lin An Efficient Denoising Architecture for Removal of Impulse Noise in Images . . . 631--643 Haibo Zeng and Marco Di Natale An Efficient Formulation of the Real-Time Feasibility Region for Design Optimization . . . . . . . . . . . . . . 644--661 Hung-Chang Hsiao and Che-Wei Chang A Symmetric Load Balancing Algorithm with Performance Guarantees for Distributed Hash Tables . . . . . . . . 662--675 L. A. Villas and A. Boukerche and H. S. Ramos and H. A. B. F. de Oliveira and R. B. de Araujo and A. A. F. Loureiro DRINA: A Lightweight and Reliable Routing Approach for In-Network Aggregation in Wireless Sensor Networks 676--689 C. Ttofis and S. Hadjitheophanous and A. S. Georghiades and T. Theocharides Edge-Directed Hardware Architecture for Real-Time Disparity Map Computation . . 690--704 Hyung Beom Jang and Jinhang Choi and Ikroh Yoon and Sung-Soo Lim and Seungwon Shin and Naehyuck Chang and Sung Woo Chung Exploiting Application/System-Dependent Ambient Temperature for Accurate Microarchitectural Simulation . . . . . 705--715 Shan Chu and Xin Wang and Yuanyuan Yang Exploiting Cooperative Relay for High Performance Communications in MIMO Ad Hoc Networks . . . . . . . . . . . . . . 716--729 Sourav Sen Gupta and A. Chattopadhyay and K. Sinha and S. Maitra and B. P. Sinha High-Performance Hardware Implementation for RC4 Stream Cipher . . . . . . . . . 730--743 R. Azarderakhsh and A. Reyhani-Masoleh Low-Complexity Multiplier Architectures for Single and Hybrid-Double Multiplications in Gaussian Normal Bases 744--757 Duhee Lee and Jong-Chan Kim and Chang-Gun Lee and Kanghee Kim mRT-PLRU: A General Framework for Real-Time Multitask Executions on NAND Flash Memory . . . . . . . . . . . . . . 758--771 D. Hakkarinen and Zizhong Chen Multilevel Diskless Checkpointing . . . 772--783 Jung-Sang Ahn and Dongwon Kang and Dawoon Jung and Jin-Soo Kim and Seungryoul Maeng m*-Tree: An Ordered Index Structure for NAND Flash Memory with Adaptive Page Layout Scheme . . . . . . . . . . . . . 784--797 Yuan-Po Cheng and Chia-Yi Wu and Yao-Jen Tang and Ming-Jer Tsai Retrieval-Guaranteed Location-Aware Information Brokerage Scheme in $3$D Wireless Ad Hoc Networks . . . . . . . . 798--812 A. Morari and C. Boneti and F. J. Cazorla and R. Gioiosa and Chen-Yong Cher and A. Buyuktosunoglu and P. Bose and M. Valero SMT Malleability in IBM POWER5 and POWER6 Processors . . . . . . . . . . . 813--826 Rong-Xia Hao and Yan-Quan Feng and Jin-Xin Zhou Conditional Diagnosability of Alternating Group Graphs . . . . . . . . 827--831 Jui-Chieh Lin and Sao-Jie Chen and Yu Hen Hu Cycle-Efficient LFSR Implementation on Word-Based Microarchitecture . . . . . . 832--838 Sun-Yuan Hsieh and Chi-Ya Kao The Conditional Diagnosability of $k$-Ary $n$-Cubes under the Comparison Diagnosis Model . . . . . . . . . . . . 839--843
Hoang Le and Viktor K. Prasanna A Memory-Efficient and Modular Approach for Large-Scale String Pattern Matching 844--857 Joshua Yung Lih Low and Ching Chuen Jong A Memory-Efficient Tables-and-Additions Method for Accurate Computation of Elementary Functions . . . . . . . . . . 858--872 Xiaoyan Yin and Xiaomin Ma and Kishor S. Trivedi An Interacting Stochastic Models Approach for the Performance Evaluation of DSRC Vehicular Safety Communication 873--885 Qinru Qiu and Qing Wu and Morgan Bishop and Robinson E. Pino and Richard W. Linderman A Parallel Neuromorphic Text Recognition System and Its Implementation on a Heterogeneous High-Performance Computing Cluster . . . . . . . . . . . . . . . . 886--899 David M. Russinoff Computation and Formal Verification of SRT Quotient and Square Root Digit Selection Tables . . . . . . . . . . . . 900--913 Christian Fensch and Nick Barrow-Williams and Robert D. Mullins and Simon Moore Designing a Physical Locality Aware Coherence Protocol for Chip-Multiprocessors . . . . . . . . . . 914--928 Alessandro Cilardo Fast Parallel $ {\rm GF}(2^m) $ Polynomial Multiplication for All Degrees . . . . . . . . . . . . . . . . 929--943 Rafael Ubal and Julio Sahuquillo and Salvador Petit and Pedro Lopez and Jose Duato Hardware-Based Generation of Independent Subtraces of Instructions in Clustered Processors . . . . . . . . . . . . . . . 944--955 Liu Han and Seok-Bum Ko High-Speed Parallel Decimal Multiplication with Redundant Internal Encodings . . . . . . . . . . . . . . . 956--968 Shouwen Lai and Binoy Ravindran Least-Latency Routing over Time-Dependent Wireless Sensor Networks 969--983 Noha Elarief and Bella Bose and Samir Elmougy Limited Magnitude Error Detecting Codes over $ Z_q $ . . . . . . . . . . . . . . 984--989 Jasma Balasangameshwara and Nedunchezhian Raju Performance-Driven Load Balancing with a Primary-Backup Approach for Computational Grids with Low Communication Cost and Replication Cost 990--1003 Lin Gao and Lian Li and Jingling Xue and Pen-Chung Yew SEED: A Statically Greedy and Dynamically Adaptive Approach for Speculative Loop Execution . . . . . . . 1004--1016 Mario Baldi and Guido Marchetto Time-Driven Priority Router Implementation: Analysis and Experiments 1017--1030 Udi Ben-Porat and Anat Bremler-Barr and Hanoch Levy Vulnerability of Network Mechanisms to Sophisticated DDoS Attacks . . . . . . . 1031--1043 Christos K. Liaskos and Georgios I. Papadimitriou Generalizing the Square Root Rule for Optimal Periodic Scheduling in Push-Based Wireless Environments . . . . 1044--1050 Yangyang Pan and Guiqiang Dong and Ningde Xie and Tong Zhang Using Quasi-EZ-NAND Flash Memory to Build Large-Capacity Solid-State Drives in Computing Systems . . . . . . . . . . 1051--1057
D. R. Avresky Guest Editors' introduction: Special section on optimizing the cloud . . . . 1058--1059 Chrysa Papagianni and Aris Leivadeas and Symeon Papavassiliou and Vasilis Maglaris and Cristina Cervello-Pastor and Alvaro Monje On the Optimal Allocation of Virtual Resources in Cloud Computing Networks 1060--1071 Dario Bruneo and Salvatore Distefano and Francesco Longo and Antonio Puliafito and Marco Scarpa Workload-Based Software Rejuvenation in Cloud Systems . . . . . . . . . . . . . 1072--1085 Lakshmi Ganesh and Hakim Weatherspoon and Tudor Marian and Ken Birman Integrated Approach to Data Center Power Management . . . . . . . . . . . . . . . 1086--1096 Chun-An Chen and Sun-Yuan Hsieh Component-Composition Graphs: $ (t, k) $-Diagnosability and Its Application . . 1097--1110 Salvatore Pontarelli and Marco Ottavi Error Detection and Correction in Content Addressable Memories by Using Bloom Filters . . . . . . . . . . . . . 1111--1126 Ori Rottenstreich and Rami Cohen and Danny Raz and Isaac Keslassy Exact Worst Case TCAM Rule Expansion . . 1127--1140 Yang Hu and Hong Jiang and Dan Feng and Lei Tian and Hao Luo and Chao Ren Exploring and Exploiting the Multilevel Parallelism Inside SSDs for Improved Performance and Endurance . . . . . . . 1141--1155 Xinyan Zha and Sartaj Sahni GPU-to-GPU and Host-to-Host Multipattern String Matching on a GPU . . . . . . . . 1156--1169 Jiafeng Xie and Pramod Kumar Meher and Jianjun He Hardware-Efficient Realization of Prime-Length DCT Based on Distributed Arithmetic . . . . . . . . . . . . . . . 1170--1178 Hung-Manh Pham and Sebastien Pillement and Stanis\law J. Piestrak Low-Overhead Fault-Tolerance Technique for a Dynamically Reconfigurable Softcore Processor . . . . . . . . . . . 1179--1192 Silvio Cesare and Yang Xiang and Wanlei Zhou Malwise --- An Effective and Efficient Classification System for Packed and Polymorphic Malware . . . . . . . . . . 1193--1206 Richard G. Clegg and Stuart Clayman and George Pavlou and Lefteris Mamatas and Alex Galis On the Selection of Management/Monitoring Nodes in Highly Dynamic Networks . . . . . . . . . . . . 1207--1220 Hanjiang Lai and Yan Pan and Cong Liu and Liang Lin and Jie Wu Sparse Learning-to-Rank via an Efficient Primal-Dual Algorithm . . . . . . . . . 1221--1233 Tobias Nopper and Christoph Scholl Symbolic Model Checking for Incomplete Designs with Flexible Modeling of Unknowns . . . . . . . . . . . . . . . . 1234--1254 Jianjun Li and Ming Xiong and Victor C. S. Lee and LihChyun Shu and Guohui Li Workload-Efficient Deadline and Period Assignment for Maintaining Temporal Consistency under EDF . . . . . . . . . 1255--1268 Mohamed-Slim Bouguerra and Denis Trystram and Frederic Wagner Complexity Analysis of Checkpoint Scheduling with Variable Costs . . . . . 1269--1275
Jingfei Kong and Onur Aciicmez and Jean-Pierre Seifert and Huiyang Zhou Architecting against Software Cache-Based Side-Channel Attacks . . . . 1276--1288 Ramon Bertran and Marc Gonzelez and Xavier Martorell and Nacho Navarro and Eduard Ayguade A Systematic Methodology to Generate Decomposable and Responsive Power Models for CMPs . . . . . . . . . . . . . . . . 1289--1302 Deke Guo and Tao Chen and Dan Li and Mo Li and Yunhao Liu and Guihai Chen Expandable and Cost-Effective Network Structures for Data Centers Using Dual-Port Servers . . . . . . . . . . . 1303--1317 Po-Yuan Chen and Chin-Lung Su and Chao-Hsun Chen and Cheng-Wen Wu Generalization of an Enhanced ECC Methodology for Low Power PSRAM . . . . 1318--1331 Chuliang Weng and Minyi Guo and Yuan Luo and Minglu Li Hybrid CPU Management for Adapting to the Diversity of Virtual Machines . . . 1332--1344 Murat Cenk and Christophe Negre and M. Anwar Hasan Improved Three-Way Split Formulas for Binary Polynomial and Toeplitz Matrix Vector Products . . . . . . . . . . . . 1345--1361 Cristobal Camarero and Carmen Martinez and Ramon Beivide $L$-Networks: A Topological Model for Regular $2$D Interconnection Networks 1362--1375 Michail Maniatakos and Prabhakar Kudva and Bruce M. Fleischer and Yiorgos Makris Low-Cost Concurrent Error Detection for Floating-Point Unit (FPU) Controllers 1376--1388 Amin Farmahini-Farahani and Henry J. Duwe III and Michael J. Schulte and Katherine Compton Modular Design of High-Throughput, Low-Latency Sorting Units . . . . . . . 1389--1402 Tingting Chen and Fan Wu and Sheng Zhong On Designing Protocols for Noncooperative, Multiradio Channel Assignment in Multiple Collision Domains 1403--1416 Yu Li and Sai Tung On and Jianliang Xu and Byron Choi and Haibo Hu Optimizing Nonindexed Join Processing in Flash Storage-Based Systems . . . . . . 1417--1431 Mayur Deshpande and Kyungbaek Kim and Bijit Hore and Sharad Mehrotra and Nalini Venkatasubramanian ReCREW: A Reliable Flash-Dissemination System . . . . . . . . . . . . . . . . . 1432--1446 Jullawadee Maneesilp and Chong Wang and Hongyi Wu and Nian-Feng Tzeng RFID Support for Accurate $3$D Localization . . . . . . . . . . . . . . 1447--1459 Sonia Gonzalez-Navarro and Charles Tsen and Michael J. Schulte Binary Integer Decimal-Based Floating-Point Multiplication . . . . . 1460--1466 M. Anwar Hasan and Christophe Negre Multiway Splitting Method for Toeplitz Matrix Vector Product . . . . . . . . . 1467--1471 Sun-Yuan Hsieh and Cheng-Yen Tsai and Chun-An Chen Strong Diagnosability and Conditional Diagnosability of Multiprocessor Systems and Folded Hypercubes . . . . . . . . . 1472--1477
Khaled Benkrid and Didier Keymeulen and Umeshkumar D. Patel and David Merodio-Codinachs Guest Editors' Introduction: Special Section on Adaptive Hardware and Systems 1478--1480 Ruben Salvador and Andres Otero and Javier Mora and Eduardo de la Torre and Teresa Riesgo and Lukas Sekanina Self-Reconfigurable Evolvable Hardware System for Adaptive Image Processing . . 1481--1493 Lars Bauer and Claus Braun and Michael E. Imhof and Michael A. Kochte and Eric Schneider and Hongyan Zhang and Jorg Henkel and Hans-Joachim Wunderlich Test Strategies for Reliable Runtime Reconfigurable Architectures . . . . . . 1494--1507 Luca Sterpone and Mario Porrmann and Jens Hagemeyer A Novel Fault Tolerant and Runtime Reconfigurable Platform for Satellite Payload Processing . . . . . . . . . . . 1508--1525 Rizwan A. Ashraf and Ronald F. DeMara Scalable FPGA Refurbishment Using Netlist-Driven Evolutionary Algorithms 1526--1541 Xabier Iturbe and Khaled Benkrid and Chuan Hong and Ali Ebrahim and Raul Torrego and Imanol Martinez and Tughrul Arslan and Jon Perez R3TOS: A Novel Reliable Reconfigurable Real-Time Operating System for Highly Adaptive, Efficient, and Dependable Computing on FPGAs . . . . . . . . . . . 1542--1556 James Alfred Walker and Martin A. Trefzer and Simon J. Bale and Andy M. Tyrrell PAnDA: A Reconfigurable Architecture that Adapts to Physical Substrate Variations . . . . . . . . . . . . . . . 1584--1596 Michael Soltiz and Dhireesha Kudithipudi and Cory Merkel and Garrett S. Rose and Robinson E. Pino Memristor-Based Neural Logic Blocks for Nonlinearly Separable Functions . . . . 1597--1606 Louis-Marie Aubert and Roger Woods and Scott Fischaber and Richard Veitch Optimization of Weighted Finite State Transducer for Speech Recognition . . . 1607--1615 Jie Tang and Shaoshan Liu and Chen Liu and Zhimin Gu and Jean-Luc Gaudiot Acceleration of XML Parsing through Prefetching . . . . . . . . . . . . . . 1616--1628 Guillaume Dabosville and Emmanuel Prouff A New Second-Order Side Channel Attack Based on Linear Regression . . . . . . . 1629--1640 Sahar Foroutan and Yvain Thonnart and Frederic Petrot An Iterative Computational Technique for Performance Evaluation of Networks-on-Chip . . . . . . . . . . . . 1641--1655 Jing Liu and Qiong Huang and Bo Yang and Yang Zhang Efficient Multicast Key Distribution Using HOWP-Based Dynamic Group Access Structures . . . . . . . . . . . . . . . 1656--1672 Robert M. Hierons Verifying and Comparing Finite State Machines for Systems that Have Distributed Interfaces . . . . . . . . . 1673--1683
Hong Shen and Longkun Guo An Eight-Approximation Algorithm for Computing Rooted Three-Vertex Connected Minimum Steiner Networks . . . . . . . . 1684--1693 Jinghang Liang and Jie Han and Fabrizio Lombardi Analysis of Error Masking and Restoring Properties of Sequential Circuits . . . 1694--1704 Shicong Meng and Ling Liu Enhanced Monitoring-as-a-Service for Effective Cloud Management . . . . . . . 1705--1720 Alvaro Vazquez and Javier D. Bruguera Iterative Algorithm and Architecture for Exponential, Logarithm, Powering, and Root Extraction . . . . . . . . . . . . 1721--1731 Yunji Chen and Tianshi Chen and Ling Li and Lei Li and Liang Yang and Menghao Su and Weiwu Hu LDet: Determinizing Asynchronous Transfer for Postsilicon Debugging . . . 1732--1744 Ze Li and Haiying Shen and Karan Sapra Leveraging Social Networks to Combat Collusion in Reputation Systems for Peer-to-Peer Networks . . . . . . . . . 1745--1759 Jinghang Liang and Jie Han and Fabrizio Lombardi New Metrics for the Reliability of Approximate and Probabilistic Adders . . 1760--1771 Kimish Patel and Murali Annavaram and Massoud Pedram NFRA: Generalized Network Flow-Based Resource Allocation for Hosting Centers 1772--1785 Amir Moradi and Oliver Mischke and Christof Paar One Attack to Rule Them All: Collision Timing Attack versus 42 AES ASIC Cores 1786--1798 Hao Jin and Deng Pan and Jason Liu and Niki Pissinou OpenFlow-Based Flow-Level Bandwidth Provisioning for CICQ Switches . . . . . 1799--1812 Ismael Ripoll and Rafael Ballester-Ripoll Period Selection for Minimal Hyperperiod in Periodic Task Systems . . . . . . . . 1813--1822 Ajay D. Kshemkalyani and Jiannong Cao Predicate Detection in Asynchronous Pervasive Environments . . . . . . . . . 1823--1836 Wei Dong and Yunhao Liu and Chun Chen and Jiajun Bu and Chao Huang and Zhiwei Zhao R2: Incremental Reprogramming Using Relocatable Code in Networked Embedded Systems . . . . . . . . . . . . . . . . 1837--1849 Octav Chipara and Chenyang Lu and Gruia-Catalin Roman Real-Time Query Scheduling for Wireless Sensor Networks . . . . . . . . . . . . 1850--1865 Daniel Cederman and Philippas Tsigas Supporting Lock-Free Composition of Concurrent Data Objects: Moving Data between Containers . . . . . . . . . . . 1866--1878 Enric Herrero and Jose Gonzalez and Ramon Canal and Dean Tullsen Thread Row Buffers: Improving Memory Performance Isolation and Throughput in Multiprogrammed Environments . . . . . . 1879--1892 Lein Harn Group Authentication . . . . . . . . . . 1893--1898 Salvatore Pontarelli and Pedro Reviriego and Chris J. Bleakley and Juan Antonio Maestro Low Complexity Concurrent Error Detection for Complex Multiplication . . 1899--1903 Dirk Muller and Matthias Werner A Note on ``New Strategies for Assigning Real-Time Tasks to Multiprocessor Systems'' . . . . . . . . . . . . . . . 1904--1905
Cheng-Hung Lin and Chen-Hsiung Liu and Lung-Sheng Chien and Shih-Chieh Chang Accelerating Pattern Matching Using a Novel Parallel Algorithm on GPUs . . . . 1906--1916 Anonymous Survivable Data Aggregation in Multiagent Network Systems with Hybrid Faults . . . . . . . . . . . . . . . . . 2054--2068 Soumyajit Dey and Dipankar Sarkar and Anupam Basu A Kleene Algebra of Tagged System Actors for Reasoning about Heterogeneous Embedded Systems . . . . . . . . . . . . 1917--1931 Weifa Liang and Pascal Schweitzer and Zichuan Xu Approximation Algorithms for Capacitated Minimum Forest Problems in Wireless Sensor Networks with a Mobile Sink . . . 1932--1944 Yong Lu and Youjian Zhao and Fuchun Sun and Hongbo Li and Dianjun Wang Dynamic Fault-Tolerant Routing Based on FSA for LEO Satellite Networks . . . . . 1945--1958 Zhemin Zhang and Zhiyang Guo and Yuanyuan Yang Efficient All-to-All Broadcast in Gaussian On-Chip Networks . . . . . . . 1959--1971 Zhiyang Guo and Yuanyuan Yang High-Speed Multicast Scheduling in Hybrid Optical Packet Switches with Guaranteed Latency . . . . . . . . . . . 1972--1987 Jonathan Lee and Shin-Jie Lee and Hsi-Min Chen and Kuo-Hsun Hsu Itinerary-Based Mobile Agent as a Basis for Distributed OSGi Services . . . . . 1988--2000 Giorgos Dimitrakopoulos and Emmanouil Kalligeros and Kostas Galanopoulos Merged Switch Allocation and Traversal in Network-on-Chip Switches . . . . . . 2001--2012 Javier Hormigo and Julio Villalba and Emilio L. Zapata Multioperand Redundant Adders on FPGAs 2013--2025 Heng Yu and Yajun Ha and Bharadwaj Veeravalli Quality-Driven Dynamic Scheduling for Real-Time Adaptive Applications on Multiprocessor Systems . . . . . . . . . 2026--2040 Andrey Bogdanov and Miroslav Knezevic and Gregor Leander and Deniz Toz and Kerem Varici and Ingrid Verbauwhede SPONGENT: The Design Space of Lightweight Cryptographic Hashing . . . 2041--2053 Jiang Lin and Hongzhong Zheng and Zhichun Zhu and Zhao Zhang Thermal Modeling and Management of DRAM Systems . . . . . . . . . . . . . . . . 2069--2082 Qi Wu and Fei Sun and Wei Xu and Tong Zhang Using Multilevel Phase Change Memory to Build Data Storage: A Time-Aware System Design Perspective . . . . . . . . . . . 2083--2095 Chi Cheng and Tao Jiang An Efficient Homomorphic MAC with Small Key Size for Authentication in Network Coding . . . . . . . . . . . . . . . . . 2096--2100 Shadi Atalla and Davide Cuda and Paolo Giaccone and Marco Pretti Belief-Propagation-Assisted Scheduling in Input-Queued Switches . . . . . . . . 2101--2107 Menglan Hu and Bharadwaj Veeravalli Requirement-Aware Scheduling of Bag-of-Tasks Applications on Grids with Dynamic Resilience . . . . . . . . . . . 2108--2114
Anonymous Receiving Buffer Adaptation for High-Speed Data Transfer . . . . . . . . 2278--2291 Haiying Shen and Guoxin Liu A Lightweight and Cooperative Multifactor Considered File Replication Method in Structured P2P Systems . . . . 2115--2130 Nicolas Van Wambeke and Ernesto Exposito and Christophe Chassot and Michel Diaz ATP: A Microprotocol Approach to Autonomic Communication . . . . . . . . 2131--2140 Sungjin Lee and Dongkun Shin and Jihong Kim BAGC: Buffer-Aware Garbage Collection for Flash-Based Storage Systems . . . . 2141--2154 Weirong Jiang and Viktor K. Prasanna Data Structure Optimization for Power-Efficient IP Lookup Architectures 2169--2182 Seetharam Narasimhan and Dongdong Du and Rajat Subhra Chakraborty and Somnath Paul and Francis G. Wolff and Christos A. Papachristou and Kaushik Roy and Swarup Bhunia Hardware Trojan Detection by Multiple-Parameter Side-Channel Analysis 2183--2195 Ioannis Kouretas and Charalambos Basetas and Vassilis Paliouras Low-Power Logarithmic Number System Addition/Subtraction and Their Impact on Digital Filters . . . . . . . . . . . . 2196--2209 Yang Wang and Paul Lu Maximizing Active Storage Resources with Deadlock Avoidance in Workflow-Based Computations . . . . . . . . . . . . . . 2210--2223 Sushmita Ruj and Amiya Nayak and Ivan Stojmenovic Pairwise and Triple Key Distribution in Wireless Sensor Networks with Applications . . . . . . . . . . . . . . 2224--2237 Jonghun Yoo and Jaesoo Lee and Seongsoo Hong Petri Net-Based FTL Architecture for Parametric WCET Estimation via FTL Operation Sequence Derivation . . . . . 2238--2251 Bo Zhao and Yu Du and Jun Yang and Youtao Zhang Process Variation-Aware Nonuniform Cache Management in a 3D Die-Stacked Multicore Processor . . . . . . . . . . . . . . . 2252--2265 Peng Xu and Hai Jin and Qianhong Wu and Wei Wang Public-Key Encryption with Fuzzy Keyword Search: A Provably Secure Scheme under Keyword Guessing Attack . . . . . . . . 2266--2277 Karthik Pattabiraman and Nithin M. Nakka and Zbigniew T. Kalbarczyk and Ravishankar K. Iyer SymPLFIED: Symbolic Program-Level Fault Injection and Error Detection Framework 2292--2307 Minsu Huang and Siyuan Chen and Ying Zhu and Yu Wang Topology Control for Time-Evolving and Predictable Delay-Tolerant Networks . . 2308--2321 Salvatore Pontarelli and Giuseppe Bianchi and Simone Teofili Traffic-Aware Design of a High-Speed FPGA Network Intrusion Detection System 2322--2334 Yining Liu and Chi Cheng and Jianyu Cao and Tao Jiang An Improved Authenticated Group Key Transfer Protocol Based on Secret Sharing . . . . . . . . . . . . . . . . 2335--2336 Qiang Zhu and Xin-Ke Wang and Guanglan Cheng Reliability Evaluation of BC Networks 2337--2340
Bang Wang and Han Xu and Wenyu Liu and Hui Liang A Novel Node Placement for Long Belt Coverage in Wireless Networks . . . . . 2341--2353 Yue-Ru Chuang and Hsueh-Wen Tseng and Shiann-Tsong Sheu A Performance Study of Discrete-Error-Checking Scheme (DECS) with the Optimal Division Locations for IEEE 802.16-Based Multihop Networks . . 2354--2365 Silvia Franchini and Antonio Gentile and Filippo Sorbello and Giorgio Vassallo and Salvatore Vitabile Design and Implementation of an Embedded Coprocessor with Native Support for $5$D, Quadruple-Based Clifford Algebra 2366--2381 Sujay Deb and Kevin Chang and Xinmin Yu and Suman Prasad Sah and Miralem Cosic and Amlan Ganguly and Partha Pratim Pande and Benjamin Belzer and Deukhyoun Heo Design of an Energy-Efficient CMOS-Compatible NoC Architecture with Millimeter-Wave Wireless Interconnects 2382--2396 Hamid Reza Pourshaghaghi and Jose Pineda de Gyvez Fuzzy-Controlled Voltage Scaling Based on Supply Current Tracking . . . . . . . 2397--2410 Zhen Ling and Xinwen Fu and Weijia Jia and Wei Yu and Dong Xuan and Junzhou Luo Novel Packet Size-Based Covert Channel Attacks against Anonymizer . . . . . . . 2411--2426 Zaixin Lu and Weili Wu and Bin Fu Optimal Data Retrieval Scheduling in the Multichannel Wireless Broadcast Environments . . . . . . . . . . . . . . 2427--2439 Stefan Ruhrup and Ivan Stojmenovic Optimizing Communication Overhead while Reducing Path Length in Beaconless Georouting with Guaranteed Delivery for Wireless Sensor Networks . . . . . . . . 2440--2453 Steve B. Furber and David R. Lester and Luis A. Plana and Jim D. Garside and Eustace Painkras and Steve Temple and Andrew D. Brown Overview of the SpiNNaker System Architecture . . . . . . . . . . . . . . 2454--2467 Sook-Yeon Kim and Jung-Heum Park Paired Many-to-Many Disjoint Path Covers in Recursive Circulants $ (G(2^m, 4)) $ 2468--2475 Deepak Unnikrishnan and Ramakrishna Vadlamani and Yong Liao and Jeremie Crenne and Lixin Gao and Russell Tessier Reconfigurable Data Planes for Scalable Network Virtualization . . . . . . . . . 2476--2488 Cristiana Bolchini and Antonio Miele Reliability-Driven System-Level Synthesis for Mixed-Critical Embedded Systems . . . . . . . . . . . . . . . . 2489--2502 Yuan-Hao Chang and Po-Chun Huang and Pei-Han Hsu and Lue-Jane Lee and Tei-Wei Kuo and David Hung-Chang Du Reliability Enhancement of Flash-Memory Storage Systems: An Efficient Version-Based Design . . . . . . . . . . 2503--2515 Minjang Kim and Nagesh B. Lakshminarayana and Hyesoon Kim and Chi-Keung Luk SD3: An Efficient Dynamic Data-Dependence Profiling Mechanism . . 2516--2530 Hagit Attiya and Eshcar Hillel The Cost of Privatization in Software Transactional Memory . . . . . . . . . . 2531--2543 Irith Pomeranz Signal-Transition Patterns of Functional Broadside Tests . . . . . . . . . . . . 2544--2549
Bharadwaj Veeravalli and Manish Parashar Guest Editors' Introduction: Special Issue on Cloud of Clouds . . . . . . . . 1--2 Yu Hua and Xue Liu and Dan Feng Data Similarity-Aware Computation Infrastructure for the Cloud . . . . . . 3--16 Abhinandan S. Prasad and Shrisha Rao A Mechanism Design Approach to Resource Procurement in Cloud Computing . . . . . 17--30 Henry C. H. Chen and Yuchong Hu and Patrick P. C. Lee and Yang Tang NCCloud: A Network-Coding-Based Storage System in a Cloud-of-Clouds . . . . . . 31--44 Junwei Cao and Keqin Li and Ivan Stojmenovic Optimal Power Allocation and Load Distribution for Multiple Heterogeneous Multicore Server Processors across Clouds and Data Centers . . . . . . . . 45--58 Yuan Feng and Baochun Li and Bo Li Price Competition in an Oligopoly Market with Multiple IaaS Cloud Providers . . . 59--73 Chamikara Jayalath and Julian Stephen and Patrick Eugster From the Cloud to the Atmosphere: Running MapReduce across Data Centers 74--87 Michela Milano and Barry O'Sullivan and Martin Sachenbacher Guest Editors' Introduction: Special Section on Computational Sustainability: Where Computer Science meets Sustainable Development . . . . . . . . . . . . . . 88--89 Mahdi Jalili and Joobin Gharibshah and Seyed Morsal Ghavami and Mohammadreza Beheshtifar and Reza Farshi Nationwide Prediction of Drought Conditions in Iran Based on Remote Sensing Data . . . . . . . . . . . . . . 90--101 Marco Chiarandini and Niels H. Kjeldsen and Napoleao Nepomuceno Integrated Planning of Biomass Inventory and Energy Production . . . . . . . . . 102--114 Boi Faltings and Jason Jingshi Li and Radu Jurca Incentive Mechanisms for Community Sensing . . . . . . . . . . . . . . . . 115--128 Brent C. Chamberlain and Giuseppe Carenini and Gunilla Oberg and David Poole and Hamed Taheri A Decision Support System for the Design and Evaluation of Sustainable Wastewater Solutions . . . . . . . . . . . . . . . 129--141 Mark Crowley Using Equilibrium Policy Gradients for Spatiotemporal Planning in Forest Ecosystem Management . . . . . . . . . . 142--154 Sung Hoon Chung and Terry L. Friesz and Robert D. Weaver Dynamic Sustainability Games for Renewable Resources --- a Computational Approach . . . . . . . . . . . . . . . . 155--166 Parikshit Dutta and Elise Arnaud and Emmanuel Prados and Mathieu Saujot Calibration of an Integrated Land-Use and Transportation Model Using Maximum-Likelihood Estimation . . . . . 167--178 Evgenia Christoforou and Antonio Fernandez Anta and Chryssis Georgiou and Miguel A. Mosteiro Algorithmic Mechanisms for Reliable Master-Worker Internet-Based Computing 179--195 G. Robert Redinbo Correcting DFT Codes with a Modified Berlekamp--Massey Algorithm and Kalman Recursive Syndrome Extension . . . . . . 196--203 Basel Alomair and Radha Poovendran E-MACs: Toward More Secure and More Efficient Constructions of Secure Channels . . . . . . . . . . . . . . . . 204--217 Gonzalo Carvajal and Chun Wah Wu and Sebastian Fischmeister Evaluation of Communication Architectures for Switched Real-Time Ethernet . . . . . . . . . . . . . . . . 218--229 Christophe Doche and Daniel Sutantyo New and Improved Methods to Analyze and Compute Double-Scalar Multiplications 230--242 Randy W. Morris and Avinash Karanth Kodi and Ahmed Louri and Ralph D. Whaley Three-Dimensional Stacked Nanophotonic Network-on-Chip Architecture with Minimal Reconfiguration . . . . . . . . 243--255 Anonymous 2013 Reviewers List . . . . . . . . . . 256--262 Anonymous 2013 Annual Index . . . . . . . . . . . not in print
Faisal Khan and Soheil Ghiasi and Chen-Nee Chuah A Dynamically Reconfigurable System for Closed-Loop Measurements of Network Traffic . . . . . . . . . . . . . . . . 263--275 Miao Ju and Hun Jung and Hao Che A Performance Analysis Methodology for Multicore, Multithreaded Processors . . 276--289 Wei Peng and Feng Li and Xukai Zou and Jie Wu A Two-Stage Deanonymization Attack against Anonymized Social Networks . . . 290--303 Sang-Seon Byun and Ilangko Balashingham and Athanasios V. Vasilakos and Heung-No Lee Computation of an Equilibrium in Spectrum Markets for Cognitive Radio Networks . . . . . . . . . . . . . . . . 304--316 Paolo Romano and Francesco Quaglia Design and Evaluation of a Parallel Invocation Protocol for Transactional Applications over the Web . . . . . . . 317--334 Chun-Han Lin and Pi-Cheng Hsiu and Cheng-Kang Hsieh Dynamic Backlight Scaling Optimization: A Cloud-Based Energy-Saving Service for Mobile Streaming Applications . . . . . 335--348 Vinay Hanumaiah and Sarma Vrudhula Energy-Efficient Operation of Multicore Processors by DVFS, Task Migration, and Active Cooling . . . . . . . . . . . . . 349--360 Gianlorenzo D'Angelo and Gabriele Di Stefano and Alfredo Navarra Flow Problems in Multi-Interface Networks . . . . . . . . . . . . . . . . 361--374 Zaid A. Hussain and Bella Bose and Abdullah Al-Dhelaan Generalized Hypercubes: Edge-Disjoint Hamiltonian Cycles and Gray Codes . . . 375--382 Jie Wu and Yunsheng Wang Hypercube-Based Multipath Social Feature Routing in Human Contact Networks . . . 383--396 Arnaud Casteigts and Paola Flocchini and Bernard Mans and Nicola Santoro Measuring Temporal Lags in Delay-Tolerant Networks . . . . . . . . 397--410 Hyesook Lim and Kyuhee Lim and Nara Lee and Kyong-Hye Park On Adding Bloom Filters to Longest Prefix Matching Algorithms . . . . . . . 411--423 Baohua Yang and Jeffrey Fong and Weirong Jiang and Yibo Xue and Jun Li Practical Multituple Packet Classification Using Dynamic Discrete Bit Selection . . . . . . . . . . . . . 424--434 Jian Chen and Arun Arvind Nair and Lizy K. John Predictive Heterogeneity-Aware Application Scheduling for Chip Multiprocessors . . . . . . . . . . . . 435--447 Sagi Manole and Amit Golander and Shlomo Weiss Protein Sequence Pattern Matching: Leveraging Application Specific Hardware Accelerators . . . . . . . . . . . . . . 448--460 Wen-Ching Lin and Jheng-Hao Ye and Ming-Der Shieh Scalable Montgomery Modular Multiplication Architecture with Low-Latency and Low-Memory Bandwidth Requirement . . . . . . . . . . . . . . 475--483 Meltem Ozsoy and Dmitry Ponomarev and Nael Abu-Ghazaleh and Tameesh Suri SIFT: Low-Complexity Energy-Efficient Information Flow Tracking on SMT Processors . . . . . . . . . . . . . . . 484--496 Mihir R. Choudhury and Vikas Chandra and Robert C. Aitken and Kartik Mohanram Time-Borrowing Circuit Designs and Hardware Prototyping for Timing Error Resilience . . . . . . . . . . . . . . . 497--509 T. W. Chim and S. M. Yiu and Lucas C. K. Hui and Victor O. K. Li VSPN: VANET-Based Secure and Privacy-Preserving Navigation . . . . . 510--524 Bo Zhao and Yu Du and Jun Yang and Youtao Zhang Errata to ``Process Variation-Aware Nonuniform Cache Management in a $3$D Die--Stacked Multicore Processor . . . . 525--526
Ran Ginosar and Karam S. Chatha Guest Editors' Introduction --- Special Issue on Network-on-Chip . . . . . . . . 527--528 Sheng Ma and Natalie Enright Jerger and Zhiying Wang and Mingche Lai and Libo Huang Holistic Routing Algorithm Design to Support Workload Consolidation in NoCs 529--542 Hyungjun Kim and Boris Grot and Paul V. Gratz and Daniel A. Jimenez Spatial Locality Speculation to Reduce Energy in Chip-Multiprocessor Networks-on-Chip . . . . . . . . . . . . 543--556 Jose Cano and Jose Flich and Antoni Roca and Jose Duato and Marcello Coppola and Riccardo Locatelli Efficient Routing in Heterogeneous SoC Designs with Small Implementation Overhead . . . . . . . . . . . . . . . . 557--569 Simon J. Hollis and Chris Jackson and Paul Bogdan and Radu Marculescu Exploiting Emergence in On-Chip Interconnects . . . . . . . . . . . . . 570--582 Radu Andrei Stefan and Anca Molnos and Kees Goossens dAElite: A TDM NoC Supporting QoS, Multicast, and Fast Connection Set-Up 583--594 Everton Alceu Carara and Ney Laert Vilar Calazans and Fernando Gehm Moraes Differentiated Communication Services for NoC-Based MPSoCs . . . . . . . . . . 595--608 Sergio Saponara and Tony Bacchillone and Esa Petri and Luca Fanucci and Riccardo Locatelli and Marcello Coppola Design of an NoC Interface Macrocell with Hardware Support of Advanced Networking Functionalities . . . . . . . 609--621 Dongkook Park and Aniruddha Vaidya and Akhilesh Kumar and Mani Azimi MoDe-X: Microarchitecture of a Layout-Aware Modular Decoupled Crossbar for On-Chip Interconnects . . . . . . . 622--636 Naoya Onizawa and Atsushi Matsumoto and Tomoyoshi Funazaki and Takahiro Hanyu High-Throughput Compact Delay-Insensitive Asynchronous NoC Router . . . . . . . . . . . . . . . . . 637--649 Kevin Macdonald and Christopher Nitta and Matthew Farrens and Venkatesh Akella PDG\_GEN: A Methodology for Fast and Accurate Simulation of On-Chip Networks 650--663 Danyao Wang and Charles Lo and Jasmina Vasiljevic and Natalie Enright Jerger and J. Gregory Steffan DART: A Programmable Architecture for NoC Simulation on FPGAs . . . . . . . . 664--678 Nizar S. Dahir and Terrence Mak and Fei Xia and Alexandre Yakovlev Modeling and Tools for Power Supply Variations Analysis in Networks-on-Chip 679--690 Michael Richter and Krishnendu Chakrabarty Optimization of Test Pin-Count, Test Scheduling, and Test Access for NoC-Based Multicore SoCs . . . . . . . . 691--702 Masoumeh Ebrahimi and Masoud Daneshtalab and Pasi Liljeberg and Juha Plosila and Jose Flich and Hannu Tenhunen Path-Based Partitioning Methods for $3$D Networks-on-Chip with Minimal Adaptive Routing . . . . . . . . . . . . . . . . 718--733 Amir-Mohammad Rahmani and Kameswar Rao Vaddina and Khalid Latif and Pasi Liljeberg and Juha Plosila and Hannu Tenhunen High-Performance and Fault-Tolerant $3$D NoC-Bus Hybrid Architecture Using ARB--NET-Based Adaptive Monitoring Platform . . . . . . . . . . . . . . . . 734--747 Yasuhiro Take and Hiroki Matsutani and Daisuke Sasaki and Michihiro Koibuchi and Tadahiro Kuroda and Hideharu Amano $3$D NoC with Inductive-Coupling Links for Building-Block SiPs . . . . . . . . 748--763 Yu-Hsiang Kao and H. Jonathan Chao Design of a Bufferless Photonic Clos Network-on-Chip Architecture . . . . . . 764--776 Somayyeh Koohi and Shaahin Hessabi All-Optical Wavelength-Routed Architecture for a Power-Efficient Network on Chip . . . . . . . . . . . . 777--792
Xiaohua Tian and Yu Cheng A Scalable Destination-Oriented Multicast Protocol with Incremental Deployability . . . . . . . . . . . . . 793--806 Gideon Creech and Jiankun Hu A Semantic Approach to Host-Based Intrusion Detection Systems Using Contiguous and Discontiguous System Call Patterns . . . . . . . . . . . . . . . . 807--819 Jihye Kim and Hyunok Oh An Efficient Non-Linear Cost Compression Algorithm for Multi Level Cell Memory 820--832 Karthik Ganesan and Lizy Kurian John Automatic Generation of Miniaturized Synthetic Proxies for Target Applications to Efficiently Design Multicore Processors . . . . . . . . . . 833--846 Yuan-Hao Chang Booting Time Minimization for Real-Time Embedded Systems with Non-Volatile Memory . . . . . . . . . . . . . . . . . 847--859 Jiannong Cao and Hejun Wu and Wenzheng Xu and Weigang Wu and Xiaola Lin CACC: A Cooperative Approach to Cache Consistency in WMNs . . . . . . . . . . 860--873 Dimitris Kaseridis and Muhammad Faisal Iqbal and Lizy Kurian John Cache Friendliness-Aware Management of Shared Last-Level Caches for High Performance Multi-Core Systems . . . . . 874--887 David A. Dillow and Galen M. Shipman and Feiyi Wang and Sarp Oral and Junghee Lee and Youngjae Kim Coordinating Garbage Collection for Arrays of Solid-State Drives . . . . . . 888--901 Yan Sui and Xukai Zou and Eliza Y. Du and Feng Li Design and Analysis of a Highly User-Friendly, Secure, Privacy-Preserving, and Revocable Authentication Method . . . . . . . . . 902--916 T. Aaron Gulliver and Stephen W. Neville and Ulrich Speidel and Niko Rebenich FLOTT --- A Fast, Low Memory T-Transform Algorithm for Measuring String Complexity . . . . . . . . . . . . . . . 917--926 Kyoung-Soo We and Chang-Gun Lee and Kyongsu Yi and Yun Sang Lee and Kwei-Jay Lin HRT-PLRU: A New Paging Scheme for Executing Hard Real-Time Programs on NAND Flash Memory . . . . . . . . . . . 927--940 Jinguang Han and Willy Susilo and Yu Mu Identity-Based Secure Distributed Data Storage Schemes . . . . . . . . . . . . 941--953 Zhen Xiao and Cheng Liu and Qi Chen Improving MapReduce Performance Using Smart Speculative Execution Strategy . . 954--967 Edler Lins de Albuquerque and Orlando S. Junior and Raquel A. F. Mini MuSA: Multivariate Sampling Algorithm for Wireless Sensor Networks . . . . . . 968--978 Kam-Yiu Lam and Song Han and Deji Chen and Ming Xiong and Krithi Ramamritham and Aloysius K. Mok Schedulability Analysis of Deferrable Scheduling Algorithms for Maintaining Real-Time Data Freshness . . . . . . . . 979--994 Krithi Ramamritham and Song Han and Deji Chen and Ming Xiong and Kam-Yiu Lam and Aloysius K. Mok Schedulability Analysis of Deferrable Scheduling Algorithms for Maintaining Real-Time Data Freshness . . . . . . . . 979--994 Yinlong Xu and John C. S. Lui and Liping Xiang and Yunfeng Zhu and Runhui Li and Patrick P. C. Lee and Silei Xu Single Disk Failure Recovery for X-Code-Based Parallel Storage Systems 995--1007 Yunfeng Zhu and Liping Xiang and Yinlong Xu and John C. S. Lui and Patrick P. C. Lee and Runhui Li and Silei Xu Single Disk Failure Recovery for X-Code-Based Parallel Storage Systems 995--1007 Rahul Potharaju and Dan Pei and Fabian E. Bustamante and Yan Chen and David R. Choffnes and Yao Zhao and Kai Chen Where the Sidewalk Ends: Extending the Internet AS Graph Using Traceroutes from P2P Users . . . . . . . . . . . . . . . 1021--1036 Maryline Chetto and Audrey Queudet A Note on EDF Scheduling for Real-Time Energy Harvesting Systems . . . . . . . 1037--1040 Vassil Dimitrov and Kimmo Jarvinen and Reza Azarderakhsh Fast Inversion in $ {\rm GF}(2^m) $ with Normal Basis Using Hybrid-Double Multipliers . . . . . . . . . . . . . . 1041--1047 Irith Pomeranz Sharing Logic for Built-In Generation of Functional Broadside Tests . . . . . . . 1048--1054 Ruimin Hu and Xiaochen Wang and Jichang Guo and Qiang Liu and Tao Zhang and Haojun Quan Comments on ``Algorithmic Aspects of Hardware/Software Partitioning: $1$D Search Algorithms'' . . . . . . . . . . 1055--1056
J. Morris Chang and Zhiming Zhang A Cool Scheduler for Multi-Core Systems Exploiting Program Phases . . . . . . . 1061--1073 Nicola Nicolici and Zahra Lak A Novel Algorithmic Approach to Aid Post-Silicon Delay Measurement and Clock Tuning . . . . . . . . . . . . . . . . . 1074--1084 Eui-Young Chung and Sungjoo Yoo and Hyuk-Jun Lee and Kwanhu Bang and Dong-gun Kim and Sang-Hoon Park An Adaptive Idle-Time Exploiting Method for Low Latency NAND Flash-Based Storage Devices . . . . . . . . . . . . . . . . 1085--1096 Luca Benini and Andrea Tilli and Andrea Bartolini and Francesco Beneventi An Effective Gray-Box Identification Procedure for Multicore Thermal Modeling 1097--1110 Qi Chen and Haipeng Luo and Zhen Xiao Automatic Scaling of Internet Applications for Cloud Computing Services . . . . . . . . . . . . . . . . 1111--1123 Santosh Ghosh and Ingrid Verbauwhede BLAKE-512-Based 128-Bit CCA2 Secure Timing Attack Resistant McEliece Cryptoprocessor . . . . . . . . . . . . 1124--1133 Yunfu Shen and Yi Jin and Rong Shen and Junjie Peng and Sheng Luo Design and Implementation of Modified Signed-Digit Adder . . . . . . . . . . . 1134--1143 Meltem Ozsoy and Nael Abu Ghazaleh and Dmitry Ponomarev and Mehmet Kayaalp Efficiently Securing Systems from Code Reuse Attacks . . . . . . . . . . . . . 1144--1156 Yuyang Du and Hongliang Yu Increasing Endurance and Security of Phase-Change Memory with Multi-Way Wear-Leveling . . . . . . . . . . . . . 1157--1168 Che Wun Chiou and Wen-Yo Lee and Chiou-Yng Lee and Jim-Min Lin and Mehran Mozaffari Kermani and Reza Azarderakhsh and Jeng-Shyang Pan Low-Latency Digit-Serial Systolic Double Basis Multiplier over $ {\rm GF}(2^m) $ Using Subquadratic Toeplitz Matrix--Vector Product Approach . . . . 1169--1181 Erkay Savas and Serdar Suer Erdem and Kazim Yumbul On Selection of Modulus of Quadratic Codes for the Protection of Cryptographic Operations against Fault Attacks . . . . . . . . . . . . . . . . 1182--1196 Kang G. Shin and Jinkyu Lee Preempt a Job or Not in EDF Scheduling of Uniprocessor Systems . . . . . . . . 1197--1206 Jinglei Ren and Yongwei Wu and Meiqi Zhu and Weimin Zheng Quatrain: Accelerating Data Aggregation between Multiple Layers . . . . . . . . 1207--1219 Tzi-cker Chiueh and Xin Wang and Zhiyong Shan Shuttle: Facilitating Inter-Application Interactions for OS-Level Virtualization 1220--1233 Ho-Lin Chen and Jehoshua Bruck and Hongchao Zhou Synthesis of Stochastic Flow Networks 1234--1247 Graziano Pravadelli and Franco Fummi and Valerio Guarnieri and Nicola Bombieri Testbench Qualification of SystemC TLM Protocols through Mutation Analysis . . 1248--1261 Shivkumar Kalyanaraman and Isaac Keslassy and Inbal Horev and Pu Li and Ori Rottenstreich The Switch Reordering Contagion: Preventing a Few Late Packets from Ruining the Whole Party . . . . . . . . 1262--1276 Xrysovalantis Kavousianos and Yiorgos Tsiatouhas and Angela Arapoyanni and Andreas Floros and Stefanos Valadimas The Time Dilation Technique for Timing Error Tolerance . . . . . . . . . . . . 1277--1286 Dan Gordon The Well-Connected Processor Array . . . 1287--1295 Dominique Gaiti and Ahmad Sardouk and Abdelhakim Hafid and Ali El Masri and Lyes Khoukhi Toward Fuzzy Traffic Adaptation Solution in Wireless Mesh Networks . . . . . . . 1296--1308 Heemin Park and Moonju Park An Efficient Test Method for Rate Monotonic Schedulability . . . . . . . . 1309--1315 Joonho Kong and Taeweon Suh and Sung Woo Chung and Junhee Lee and Hyung Beom Jang Leveraging Process Variation for Performance and Energy: In the Perspective of Overclocking . . . . . . 1316--1322
Weisheng Si and Albert Y. Zomaya and Selvadurai Selvakennedy A Geometric Deployment and Routing Scheme for Directional Wireless Mesh Networks . . . . . . . . . . . . . . . . 1323--1335 Jie Han and Hao Chen and Jinghang Liang and Peican Zhu and Zhixi Yang and Fabrizio Lombardi A Stochastic Computational Approach for Accurate and Efficient Reliability Evaluation . . . . . . . . . . . . . . . 1336--1350 Cheng Wang and Changjun Jiang and Yunhao Liu and Xiang-Yang Li and Shaojie Tang Aggregation Capacity of Wireless Sensor Networks: Extended Network Case . . . . 1351--1364 Geng Lin and Wenxing Zhu An Efficient Memetic Algorithm for the Max-Bisection Problem . . . . . . . . . 1365--1376 Morteza Mohaqeqi and Mehdi Kargahi and Ali Movaghar Analytical Leakage-Aware Thermal Modeling of a Real-Time System . . . . . 1378--1392 Hongliang Yu and Xiaojia Xiang and Ying Zhao and Weimin Zheng BIRDS: A Bare-Metal Recovery System for Instant Restoration of Data Services . . 1392--1407 Naga Durga Prasad Avirneni and Arun K. Somani Countering Power Analysis Attacks Using Reliable and Aggressive Designs . . . . 1408--1420 Jin Teng and Boying Zhang and Xinfeng Li and Xiaole Bai and Dong Xuan E-Shadow: Lubricating Social Interaction Using Mobile Phones . . . . . . . . . . 1422--1433 Minje Jun and Won W. Ro and Eui-Young Chung Exploiting Implementation Diversity and Partial Connection of Routers in Application-Specific Network-on-Chip Topology Synthesis . . . . . . . . . . . 1434--1445 Zhehui Wang and Jiang Xu and Xiaowen Wu and Yaoyao Ye and Wei Zhang and Mahdi Nikdast and Xuan Wang and Zhe Wang Floorplan Optimization of Fat-Tree-Based Networks-on-Chip for Chip Multiprocessors . . . . . . . . . . . . 1446--1459 Min-Young Nam and Jaemyoun Lee and Kyung-Joon Park and Lui Sha and Kyungtae Kang Guaranteeing the End-to-End Latency of an IMA System with an Increasing Workload . . . . . . . . . . . . . . . . 1460--1473 Peng Li and David J. Lilja and Weikang Qian and Marc D. Riedel and Kia Bazargan Logical Computation on Stochastic Bit Streams with Linear Finite-State Machines . . . . . . . . . . . . . . . . 1474--1486 Gwangsun Kim and Michael Mihn-Jong Lee and John Kim and Jae W. Lee and Dennis Abts and Michael Marty Low-Overhead Network-on-Chip Support for Location-Oblivious Task Placement . . . 1487--1500 Kun Fang and Hongzhong Zheng and Jiang Lin and Zhao Zhang and Zhichun Zhu Mini-Rank: A Power-Efficient DDRx DRAM Memory Architecture . . . . . . . . . . 1500--1512 J. Matadamas-Hernandez and G. Roman-Alonso and F. Rojas-Gonzalez and M. A. Castro-Garcia and Azzedine Boukerche and M. Aguilar-Cornejo and S. Cordero-Sanchez Parallel Simulation of Pore Networks Using Multicore CPUs . . . . . . . . . . 1513--1525 Tania Banerjee and Sartaj Sahni and Gunasekaran Seetharaman PC-DUOS+: A TCAM Architecture for Packet Classifiers . . . . . . . . . . . . . . 1527--1540 Haider A. F. Almurib and T. Nandha Kumar and Fabrizio Lombardi Scalable Application-Dependent Diagnosis of Interconnects of SRAM-Based FPGAs . . 1540--1550 Andrey Mokhov and Alexei Iliasov and Danil Sokolov and Maxim Rykunov and Alex Yakovlev and Alexander Romanovsky Synthesis of Processor Instruction Sets from High-Level ISA Specifications . . . 1552--1566 Aparna Mandke Dani and Bharadwaj Amrutur and Y. N. Srikant Toward a Scalable Working Set Size Estimation Method and Its Application for Chip Multiprocessors . . . . . . . . 1567--1579 Zhuo Hao and Yunlong Mao and Sheng Zhong and Li Erran Li and Haifan Yao and Nenghai Yu Toward Wireless Security without Computational Assumptions --- Oblivious Transfer Based on Wireless Channel Characteristics . . . . . . . . . . . . 1580--1593 Nai-Wen Chang and Cheng-Yen Tsai and Sun-Yuan Hsieh On $3$-Extra Connectivity and $3$-Extra Edge Connectivity of Folded Hypercubes 1594--1600
Sidharta Andalam and Partha S. Roop and Alain Girault and Claus Traulsen A Predictable Framework for Safety-Critical Embedded Systems . . . . 1600--1612 Yean-Ru Chen and Jia-Jen Yeh and Pao-Ann Hsiung and Sao-Jie Chen Accelerating Coverage Estimation Through Partial Model Checking . . . . . . . . . 1613--1625 Dawei Wang and Xian-He Sun APC: A Novel Memory Metric and Measurement Methodology for Modern Memory Systems . . . . . . . . . . . . . 1626--1639 Mafijul Md. Islam and Per Stenstrom Characterizing and Exploiting Small-Value Memory Instructions . . . . 1640--1655 Dongyuan Zhan and Hong Jiang and Sharad C. Seth CLU: Co-Optimizing Locality and Utility in Thread-Aware Capacity Management for Shared Last Level Caches . . . . . . . . 1656--1667 Musfiq Rahman and Bruce R. Childers and Sangyeun Cho COMeT+: Continuous Online Memory Testing with Multi-Threading Extension . . . . . 1668--1681 Mingjun Xiao and Jie Wu and Liusheng Huang Community-Aware Opportunistic Routing in Mobile Social Networks . . . . . . . . . 1682--1695 Seung Hun Kim and Dongmin Choi and Won Woo Ro and Jean-Luc Gaudiot Complexity-Effective Contention Management with Dynamic Backoff for Transactional Memory Systems . . . . . . 1696--1708 Sanjay Bhattacherjee and Palash Sarkar Concrete Analysis and Trade-Offs for the (Complete Tree) Layered Subset Difference Broadcast Encryption Scheme 1709--1722 Letian Yi and Jiwu Shu and Ying Zhao and Yingjin Qian and Youyou Lu and Weimin Zheng Design and Implementation of an Asymmetric Block-Based Parallel File System . . . . . . . . . . . . . . . . . 1723--1735 Kai Ma and Xiaorui Wang and Yefu Wang DPPC: Dynamic Power Partitioning and Control for Improved Chip Multiprocessor Performance . . . . . . . . . . . . . . 1736--1750 Prapaporn Rattanatamrong and Jose A. B. Fortes Dynamic Scheduling of Real-Time Mixture-of-Experts Systems on Limited Resources . . . . . . . . . . . . . . . 1751--1764 Qi Duan and Mohit Virendra and Shambhu Upadhyaya and Ameya Sanzgiri Minimum Cost Blocking Problem in Multi-Path Wireless Routing Protocols 1765--1777 Weiping Zhu and Jiannong Cao and Henry C. B. Chan and Xuefeng Liu and Vaskar Raychoudhury Mobile RFID with a High Identification Rate . . . . . . . . . . . . . . . . . . 1778--1792 Jenq-Shiou Leu and Nguyen Hai Tung and Chun-Yao Liu Non-Parametric RSS Prediction Based Energy Saving Scheme for Moving Smartphones . . . . . . . . . . . . . . 1793--1801 Qin Zheng and Bharadwaj Veeravalli On the Design of Mutually Aware Optimal Pricing and Load Balancing Strategies for Grid Computing Systems . . . . . . . 1802--1811 Enes Yildiz and Kemal Akkaya and Esra Sisikoglu and Mustafa Y. Sir Optimal Camera Placement for Providing Angular Coverage in Wireless Video Sensor Networks . . . . . . . . . . . . 1812--1825 Alvaro Garcia Yaguez and Diego R. Llanos and Arturo Gonzalez-Escribano Squashing Alternatives for Software-Based Speculative Parallelization . . . . . . . . . . . . 1826--1839 Chih-Cheng Hsu and Ming-Shing Kuo and Shi-Chen Wang and Cheng-Fu Chou Joint Design of Asynchronous Sleep-Wake Scheduling and Opportunistic Routing in Wireless Sensor Networks . . . . . . . . 1840--1846 Qiang Zhu and Guodong Guo and Dajin Wang Relating Diagnosability, Strong Diagnosability and Conditional Diagnosability of Strong Networks . . . 1847--1851
Alberto Nannarelli and Peter-Michael Seidel and Ping Tak Peter Tang Guest Editors' Introduction: Special Section on Computer Arithmetic . . . . . 1852--1853 Ardavan Pedram and Andreas Gerstlauer and Robert A. van de Geijn Algorithm, Architecture, and Floating-Point Unit Codesign of a Matrix Factorization Accelerator . . . . . . . 1854--1867 Bilgiday Yuce and H. Fatih Ugurdag and Sezer Gören and Günhan Dündar Fast and Efficient Circuit Topologies for Finding the Maximum of $n$ $k$-Bit Numbers . . . . . . . . . . . . . . . . 1868--1881 Syed Zohaib Gilani and Nam Sung Kim and Michael Schulte Energy-Efficient Pixel-Arithmetic . . . 1882--1894 Cyril Bouvier and Paul Zimmermann Division-Free Binary-to-Decimal Conversion . . . . . . . . . . . . . . . 1895--1901 Alvaro Vazquez and Elisardo Antelo and Javier D. Bruguera Fast Radix-$ 10 $ Multiplication Using Redundant BCD Codes . . . . . . . . . . 1902--1914 Nathalie Revol and Philippe Theveny Numerical Reproducibility and Parallel Computations: Issues for Interval Algorithms . . . . . . . . . . . . . . . 1915--1924 Cong Liu and Yan Pan and Ai Chen and Jie Wu A DFA with Extended Character-Set for Fast Deep Packet Inspection . . . . . . 1925--1937 Min Yang and Yuanyuan Yang Applying Network Coding to Peer-to-Peer File Sharing . . . . . . . . . . . . . . 1938--1950 Chun-I Fan and Vincent Shi-Ming Huang and He-Ming Ruan Arbitrary-State Attribute-Based Encryption with Dynamic Membership . . . 1951--1961 Seung Hun Kim and Sang Hyong Lee and Minje Jun and Byunghoon Lee and Won Woo Ro and Eui-Young Chung and Jean-Luc Gaudiot C-Lock: Energy Efficient Synchronization for Embedded Multicore Systems . . . . . 1962--1974 Mazen Kharbutli and Rami Sheikh LACS: A Locality-Aware Cost-Sensitive Cache Replacement Algorithm . . . . . . 1975--1987 Song Guo and Minyi Guo and Victor C. M. Leung and Shui Yu and Yong Xiang On the Multicast Lifetime of WANETs with Multibeam Antennas: Formulation, Algorithms, and Analysis . . . . . . . . 1988--2001 Qilian Liang and Xiuzhen Cheng and Scott C. H. Huang and Dechang Chen Opportunistic Sensing in Wireless Sensor Networks: Theory and Application . . . . 2002--2010 Dan Li and Mingwei Xu and Ying Liu and Xia Xie and Yong Cui and Jingyi Wang and Guihai Chen Reliable Multicast in Data Center Networks . . . . . . . . . . . . . . . . 2011--2024 Madhu Saravana Sibi Govindan and Behnam Robatmili and Dong Li and Bertrand A. Maher and Aaron Smith and Stephen W. Keckler and Doug Burger Scaling Power and Performance via Processor Composability . . . . . . . . 2025--2038 Jingtong Hu and Qingfeng Zhuge and Chun Jason Xue and Wei-Che Tseng and Shouzhen Gu and Edwin H.-M. Sha Scheduling to Optimize Cache Utilization for Non-Volatile Main Memories . . . . . 2039--2051 Hyotaek Shim and Jin-Soo Kim and Seungryoul Maeng System-Wide Cooperative Optimization for NAND Flash-Based Mobile Systems . . . . 2052--2065 Anwar Mohammadi and Nathan Fisher and Daniel Grosu Truthful Mechanisms for Allocating a Single Processor to Sporadic Tasks in Competitive Real-Time Environments . . . 2066--2079 Ping Zhou and Bo Zhao and Jun Yang and Youtao Zhang Throughput Enhancement for Phase Change Memories . . . . . . . . . . . . . . . . 2080--2093 Syed Mohsin Abbas and Soonyoung Lee and Sanghyeon Baeg and Sungju Park An Efficient Multiple Cell Upsets Tolerant Content-Addressable Memory . . 2094--2098 Gavin Xiaoxu Yao and Junfeng Fan and Ray C. C. Cheung and Ingrid Verbauwhede Novel RNS Parameter Selection for Fast Modular Multiplication . . . . . . . . . 2099--2105 Jean-Guillaume Dumas On Newton--Raphson Iteration for Multiplicative Inverses Modulo Prime Powers . . . . . . . . . . . . . . . . . 2106--2109
Fang-Chen Kuo and Yeim-Kuan Chang and Cheng-Chien Su A Memory-Efficient TCAM Coprocessor for IPv4/IPv6 Routing Table Update . . . . . 2110--2121 Joao Carlos Neto and Alexandre Ferreira Tenca and Wilson Vicente Ruggiero A Parallel and Uniform $k$-Partition Method for Montgomery Multiplication . . 2122--2133 Weiran Nie and Sen Zhou and Kwei-Jay Lin and Soo Dong Kim An On-Line Capacity-Based Admission Control for Real-Time Service Processes 2134--2145 Yu Hua and Xue Liu and Hong Jiang ANTELOPE: A Semantic-Aware Data Cube Scheme for Cloud Data Center Networks 2146--2159 Abbas Rahimi and Luca Benini and Rajesh K. Gupta Application-Adaptive Guardbanding to Mitigate Static and Dynamic Variability 2160--2173 Baoxian Zhang and Jie Hao and Hussein T. Mouftah Bidirectional Multi-Constrained Routing Algorithms . . . . . . . . . . . . . . . 2174--2186 Soyoon Lee and Hyokyung Bahn and Sam H. Noh CLOCK-DWF: A Write-History-Aware Page Replacement Algorithm for Hybrid PCM and DRAM Memory Architectures . . . . . . . 2187--2200 Lide Duan and Ying Zhang and Bin Li and Lu Peng Comprehensive and Efficient Design Parameter Selection for Soft Error Resilient Processors via Universal Rules 2201--2214 Changwoo Min and Sang-Won Lee and Young Ik Eom Design and Implementation of a Log-Structured File System for Flash-Based Solid State Drives . . . . . 2215--2227 Bugra Gedik Discriminative Fine-Grained Mixing for Adaptive Compression of Data Streams . . 2228--2244 Zhiqiang Ma and Zhonghua Sheng and Lin Gu DVM: A Big Virtual Machine for Cloud Computing . . . . . . . . . . . . . . . 2245--2258 Jianqiang Luo and Mochan Shrestha and Lihao Xu and James S. Plank Efficient Encoding Schedules for XOR-Based Erasure Codes . . . . . . . . 2259--2272 Murat Cenk and M. Anwar Hasan and Christophe Negre Efficient Subquadratic Space Complexity Binary Polynomial Multipliers Based on Block Recombination . . . . . . . . . . 2273--2287 Sai Tung On and Shen Gao and Bingsheng He and Ming Wu and Qiong Luo and Jianliang Xu FD-Buffer: A Cost-Based Adaptive Buffer Replacement Algorithm for Flash Memory Devices . . . . . . . . . . . . . . . . 2288--2301 Ahcene Bendjoudi and Nouredine Melab and El-Ghazali Talbi FTH-B&B: A Fault-Tolerant Hierarchical Branch and Bound for Large Scale Unreliable Environments . . . . . . . . 2302--2315 Junghoon Lee and Hanjoon Kim and Minjeong Shin and John Kim and Jaehyuk Huh Mutually Aware Prefetcher and On-Chip Network Designs for Multi-Cores . . . . 2316--2329 M. H. Neishaburi and Zeljko Zilic On a New Mechanism of Trigger Generation for Post-Silicon Debugging . . . . . . . 2330--2342 Safayet Ahmed and Bonnie H. Ferri Prediction-Based Asynchronous CPU-Budget Allocation for Soft-Real-Time Applications . . . . . . . . . . . . . . 2343--2355 Yongsoo Joo and Junhee Ryu and Sangsoo Park and Heonshik Shin and Kang G. Shin Rapid Prototyping and Evaluation of Intelligence Functions of Active Storage Devices . . . . . . . . . . . . . . . . 2356--2368 Christos K. Liaskos and Angeliki N. Tsioliaridou and Georgios I. Papadimitriou and Petros Nicopolitidis and Andreas S. Pomportsis On Data Compatibility and Broadcast Stream Formation . . . . . . . . . . . . 2369--2375
P. R. Possa and S. A. Mahmoudi and N. Harb and C. Valderrama and P. Manneback A Multi-Resolution FPGA-Based Architecture for Real-Time Edge and Corner Detection . . . . . . . . . . . . 2376--2388 C. G. Shirley and W. R. Daasch Copula Models of Correlation: A DRAM Case Study . . . . . . . . . . . . . . . 2389--2401 Jin Xie and Wei Hu and Zhenghao Zhang Efficient Software Partial Packet Recovery in 802.11 Wireless LANs . . . . 2402--2415 Pei-Lun Suei and Mi-Yen Yeh and Tei-Wei Kuo Endurance-Aware Flash-Cache Management for Storage Servers . . . . . . . . . . 2416--2430 M. Manoochehri and M. Annavaram and M. Dubois Extremely Low Cost Error Protection with Correctable Parity Protected Cache . . . 2431--2444 Sungjin Lee and Jihong Kim Improving Performance and Capacity of Flash Storage Devices by Exploiting Heterogeneity of MLC Flash Memory . . . 2445--2458 Gang Feng Improving Space Efficiency With Path Length Prediction for Finding $k$ Shortest Simple Paths . . . . . . . . . 2459--2472 I. A. Stewart Interconnection Networks of Degree Three Obtained by Pruning Two-Dimensional Tori 2473--2486 Yongwei Wu and Weichao Guo and Jinglei Ren and Xun Zhao and Weimin Zheng NO2: Speeding up Parallel Processing of Massive Compute-Intensive Tasks . . . . 2487--2499 Qi Wu and Tong Zhang OFWAR: Reducing SSD Response Time Using On-Demand Fast-Write-and-Rewrite . . . . 2500--2512 T. A. Drane and T. M. Rose and G. A. Constantinides On the Systematic Creation of Faithfully Rounded Truncated Multipliers and Arrays 2513--2525 Xu Yang Path-Dividing Based Scheduling Algorithm for Reducing Energy Consumption of Clustered VLIW Architectures . . . . . . 2526--2539 Weihua Yang and Huiqiu Lin Reliability Evaluation of BC Networks in Terms of the Extra Vertex- and Edge-Connectivity . . . . . . . . . . . 2540--2548 M. Fanelli and L. Foschini and A. Corradi and A. Boukerche Self-Adaptive Context Data Management in Large-Scale Mobile Systems . . . . . . . 2549--2562 Hehua Zhang and Yu Jiang and W. N. N. Hung and Xiaoyu Song and Ming Gu and Jiaguang Sun Symbolic Analysis of Programmable Logic Controllers . . . . . . . . . . . . . . 2563--2575 A. Sridhar and A. Vincenzi and D. Atienza and T. Brunschwiler 3D-ICE: A Compact Thermal Model for Early-Stage Design of Liquid-Cooled ICs 2576--2589 M. Pricopi and T. Mitra Task Scheduling on Adaptive Multi-Core 2590--2603 N. Homma and K. Saito and T. Aoki Toward Formal Design of Practical Cryptographic Hardware Based on Galois Field Arithmetic . . . . . . . . . . . . 2604--2613 R. Azarderakhsh and K. Karabina A New Double Point Multiplication Algorithm and Its Application to Binary Elliptic Curves with Endomorphisms . . . 2614--2619 Inwook Kong and Seong-Wan Kim and E. E. Swartzlander Design of Goldschmidt Dividers with Quantum-Dot Cellular Automata . . . . . 2620--2625 Duc-Phong Le and Chik How Tan Improved Miller's Algorithm for Computing Pairings on Edwards Curves . . 2626--2632
Hongchuan Wei and S. Ferrari A Geometric Transversals Approach to Analyzing the Probability of Track Detection for Maneuvering Targets . . . 2633--2646 Weijia Song and Zhen Xiao and Qi Chen and Haipeng Luo Adaptive Resource Provisioning for the Cloud Using Online Bin Packing . . . . . 2647--2660 Hua-Wei Fang and Mi-Yen Yeh and Pei-Lun Suei and Tei-Wei Kuo An Adaptive Endurance-Aware $ {B^+} $-Tree for Flash Memory Storage Systems 2661--2673 Wanchun Jiang and Fengyuan Ren and Yongwei Wu and Chuang Lin and I. Stojmenovic Analysis of Backward Congestion Notification with Delay for Enhanced Ethernet Networks . . . . . . . . . . . 2674--2684 Zhemin Zhang and Zhiyang Guo and Yuanyuan Yang Bufferless Routing in Optical Gaussian Macrochip Interconnect . . . . . . . . . 2685--2700 F. J. Andujar and J. A. Villar and J. L. Sanchez and F. J. Alfaro and J. Duato Building $3$D Torus Using Low-Profile Expansion Cards . . . . . . . . . . . . 2701--2715 M. Karpovsky and Zhen Wang Design of Strongly Secure Communication and Computation Channels by Nonlinear Error Detecting Codes . . . . . . . . . 2716--2728 H. M. Ammari Investigating the Energy Sink-Hole Problem in Connected $k$-Covered Wireless Sensor Networks . . . . . . . . 2729--2742 Haiying Shen and Ze Li Leveraging Social Networks for Effective Spam Filtering . . . . . . . . . . . . . 2743--2759 P. Bernardi and L. M. Ciganda and E. Sanchez and M. S. Reorda MIHST: A Hardware Technique for Embedded Microprocessor Functional On-Line Self-Test . . . . . . . . . . . . . . . 2760--2771 Dawei Gong and Yuanyuan Yang On-Line AP Association Algorithms for 802.11n WLANs with Heterogeneous Clients 2772--2786 Shuo Guo and Liang He and Yu Gu and Bo Jiang and Tian He Opportunistic Flooding in Low-Duty-Cycle Wireless Sensor Networks with Unreliable Links . . . . . . . . . . . . . . . . . 2787--2802 Hai Anh Tran and S. Hoceini and A. Mellouk and J. Perez and S. Zeadally QoE-Based Server Selection for Content Distribution Networks . . . . . . . . . 2803--2815 Guangyan Zhang and Weimin Zheng and Keqin Li Rethinking RAID-5 Data Layout for Better Scalability . . . . . . . . . . . . . . 2816--2828 G. Adj and F. Rodriguez-Henriquez Square Root Computation over Even Extension Fields . . . . . . . . . . . . 2829--2841 Han Xu and Wenyu Liu and Bang Wang Subarea Localization Performance of the Divide-and-Cover Node Deployment in a Long-Bounded Belt Scenario . . . . . . . 2842--2850 Ting-Yu Lin and Tai-Yi Huang and Chia-Fu Hsu Synergizing Wireless Communication Technologies to Improve Internet Downloading Experiences . . . . . . . . 2851--2865 H. Cotuk and K. Bicakci and B. Tavli and E. Uzun The Impact of Transmission Power Control Strategies on Lifetime of Wireless Sensor Networks . . . . . . . . . . . . 2866--2879 T. R. Muck and A. A. Frohlich Toward Unified Design of Hardware and Software Components Using C++ . . . . . 2880--2893
Hong-Chun Hsu and Kuang-Shyr Wu and Cheng-Kuan Lin and Chiou-Yng Lee and Chien-Ping Chang A Linear Time Pessimistic Diagnosis Algorithm for Hypermesh Multiprocessor Systems under the PMC Model . . . . . . 2894--2904 Yong Li and R. Melhem and A. K. Jones A Practical Data Classification Framework for Scalable and High Performance Chip-Multiprocessors . . . . 2905--2918 H. Giefers and M. Platzner An FPGA-Based Reconfigurable Mesh Many-Core . . . . . . . . . . . . . . . 2919--2932 S. Misra and N. E. Majd and Hong Huang Approximation Algorithms for Constrained Relay Node Placement in Energy Harvesting Wireless Sensor Networks . . 2933--2947 Dong Wang and Milo\vs D. Ercegovac and Yang Xiao Complex Function Approximation Using Two-Dimensional Interpolation . . . . . 2948--2960 P. H. Guzzi and G. Agapito and M. Cannataro coreSNP: Parallel Processing of Microarray Data . . . . . . . . . . . . 2961--2974 J. H. Abawajy and M. M. Deris Data Replication Approach with Consistency Guarantee for Data Grid . . 2975--2987 Menglan Hu and B. Veeravalli Dynamic Scheduling of Hybrid Real-Time Tasks on Clusters . . . . . . . . . . . 2988--2997 L. Kosmidis and J. Abella and E. Quinones and F. J. Cazorla Efficient Cache Designs for Probabilistically Analysable Real-Time Systems . . . . . . . . . . . . . . . . 2998--3011 Fei Xu and Fangming Liu and Linghui Liu and Hai Jin and Bo Li and Baochun Li iAware: Making Live Migration of Virtual Machines Interference-Aware in the Cloud 3012--3025 Bumjoon Seo and Sooyong Kang and Jongmoo Choi and Jaehyuk Cha and Youjip Won and Sungroh Yoon IO Workload Characterization Revisited: A Data-Mining Approach . . . . . . . . . 3026--3038 Yeim-Kuan Chang and Fang-Chen Kuo and Han-Jhen Kuo and Cheng-Chien Su LayeredTrees: Most Specific Prefix-Based Pipelined Design for On-Chip IP Address Lookups . . . . . . . . . . . . . . . . 3039--3052 A. Mostefaoui and M. Melkemi and A. Boukerche Localized Routing Approach to Bypass Holes in Wireless Sensor Networks . . . 3053--3065 R. Shukla and K. C. Ray Low Latency Hybrid CORDIC Algorithm . . 3066--3078 Jen-Wei Hsieh and Han-Yi Lin and Dong-Lin Yang Multi-Channel Architecture-Based FTL for Reliable and High-Performance SSD . . . 3079--3091 Jianxin Wang and Peiqiang Tan and Jinyi Yao and Qilong Feng and Jianer Chen On the Minimum Link-Length Rectilinear Spanning Path Problem: Complexity and Algorithms . . . . . . . . . . . . . . . 3092--3100 Xiaoyan Yin and Xiaomin Ma and K. S. Trivedi and A. Vinel Performance and Reliability Evaluation of BSM Broadcasting in DSRC with Multi-Channel Schemes . . . . . . . . . 3101--3113 S. Baek and Sangyeun Cho and R. Melhem Refresh Now and Then . . . . . . . . . . 3114--3126 L. D. Briceno and H. J. Siegel and A. A. Maciejewski and Ye Hong and B. Lock and C. Panaccione and F. Wedyan and M. N. Teli and Chen Zhang Resource Allocation in a Client/Server System for Massive Multi-Player Online Games . . . . . . . . . . . . . . . . . 3127--3142 N. Tziritas and S. U. Khan and T. Loukopoulos and S. Lalis and Cheng-Zhong Xu and P. Lampsas Single and Group Agent Migration: Algorithms, Bounds, and Optimality Issues . . . . . . . . . . . . . . . . . 3143--3161 Sun-Mi Park and Ku-Young Chang and Dowon Hong and Changho Seo Comments on ``On the Polynomial Multiplication in Chebyshev Form'' . . . 3162--3163
A. Y. Zomaya Farewell State of the Journal Editorial 1--1 Ching-Yi Chen and Hsiu-Chuan Shih and Cheng-Wen Wu and Chih-He Lin and Pi-Feng Chiu and Shyh-Shyuan Sheu and F. T. Chen RRAM Defect Modeling and Failure Analysis Based on March Test and a Novel Squeeze-Search Scheme . . . . . . . . . 1--11 Anonymous 2014 Index IEEE Transactions on Computers Vol. 63 . . . . . . . . . . . 1--30 P. Montuschi Editorial from the New Editor in Chief 2--2 A. Y. Zomaya In Memoriam [Ivan Stojmenovic] . . . . . 3--3 Xinyu Yang and Jie Lin and Wei Yu and P.-M. Moulema and Xinwen Fu and Wei Zhao A Novel En-Route Filtering Scheme Against False Data Injection Attacks in Cyber-Physical Networked Systems . . . . 4--18 Yuan Le and Liran Ma and Wei Cheng and Xiuzhen Cheng and Biao Chen A Time Fairness-Based MAC Algorithm for Throughput Maximization in 802.11 Networks . . . . . . . . . . . . . . . . 19--31 Guangyan Zhang and Keqin Li and Jingzhe Wang and Weimin Zheng Accelerate RDP RAID-6 Scaling by Reducing Disk I/Os and XOR Operations 32--44 J. L. Nunez-Yanez Adaptive Voltage Scaling with In-Situ Detectors in Commercial FPGAs . . . . . 45--53 Guoxin Liu and Haiying Shen and L. Ward An Efficient and Trustworthy P2P and Social Network Integrated File Sharing System . . . . . . . . . . . . . . . . . 54--70 Ting-Yu Lin and Kun-Ru Wu and Guang-Chuen Yin Channel-Hopping Scheme and Channel-Diverse Routing in Static Multi-Radio Multi-Hop Wireless Networks 71--86 Xiulong Liu and Keqiu Li and Geyong Min and Yanming Shen and A. X. Liu and Wenyu Qu Completely Pinpointing the Missing RFID Tags in a Time-Efficient Way . . . . . . 87--96 P. Lama and Xiaobo Zhou Coordinated Power and Performance Guarantee with Fuzzy MIMO Control in Virtualized Server Clusters . . . . . . 97--111 Dae Hyun Kim and K. Athikulwongse and M. B. Healy and M. M. Hossain and Moongon Jung and I. Khorosh and G. Kumar and Young-Joon Lee and D. L. Lewis and Tzu-Wei Lin and Chang Liu and S. Panth and M. Pathak and Minzhen Ren and Guanhao Shen and Taigon Song and Dong Hyuk Woo and Xin Zhao and Joungho Kim and Ho Choi and G. H. Loh and H.-H. S. Lee and Sung Kyu Lim Design and Analysis of $3$D-MAPS ($3$D Massively Parallel Processor with Stacked Memory) . . . . . . . . . . . . 112--125 Zhibin Zhou and Dijiang Huang and Zhijie Wang Efficient Privacy-Preserving Ciphertext-Policy Attribute Based-Encryption and Broadcast Encryption . . . . . . . . . . . . . . . 126--138 Shui Yu and Song Guo and I. Stojmenovic Fool Me If You Can: Mimicking Attacks and Anti-Attacks in Cyberspace . . . . . 139--151 L. Alvarez and L. Vilanova and M. Gonzalez and X. Martorell and N. Navarro and E. Ayguade Hardware--Software Coherence Protocol for the Coexistence of Caches and Local Memories . . . . . . . . . . . . . . . . 152--165 Yan Cui and Yingxin Wang and Yu Chen and Yuanchun Shi Requester-Based Spin Lock: A Scalable and Energy Efficient Locking Scheme on Multicore Systems . . . . . . . . . . . 166--179 Kenli Li and Xiaoyong Tang and B. Veeravalli and Keqin Li Scheduling Precedence Constrained Stochastic Tasks on Heterogeneous Cluster Systems . . . . . . . . . . . . 191--204 K. M. Salehin and R. Rojas-Cessa and Chuan-bi Lin and Ziqian Dong and T. Kijkanjanarat Scheme to Measure Packet Processing Time of a Remote Host through Estimation of End-Link Capacity . . . . . . . . . . . 205--218 Zibin Zheng and M. R. Lyu Selecting an Optimal Fault Tolerance Strategy for Reliable Service-Oriented Systems with Local and Global Constraints . . . . . . . . . . . . . . 219--232 A. Wang and M. Gaudet and Peng Wu and M. Ohmacht and J. N. Amaral and C. Barton and R. Silvera and M. M. Michael Software Support and Evaluation of Hardware Transactional Memory on Blue Gene/Q . . . . . . . . . . . . . . . . . 233--246 S. Hamdioui and M. Taouil and N. Z. Haron Testing Open Defects in Memristor-Based Memories . . . . . . . . . . . . . . . . 247--259 B. Dietrich and D. Goswami and S. Chakraborty and A. Guha and M. Gries Time Series Characterization of Gaming Workload for Runtime Power Management 260--273 Chia-Wei Lee and Chao-Wen Huang and Wen-Hao Pi and Sun-Yuan Hsieh An Improved Approximation Ratio to the Partial-Terminal Steiner Tree Problem 274--279 F. Saqib and A. Dutta and J. Plusquellic and P. Ortiz and M. S. Pattichis Pipelined Decision Tree Classification Accelerator Implementation in FPGA (DT-CAIF) . . . . . . . . . . . . . . . 280--285 Jae Min Kim and Young Geun kim and Sung Woo Chung Stabilizing CPU Frequency and Voltage for Temperature-Aware DVFS in Mobile Devices . . . . . . . . . . . . . . . . 286--292 S. Gorgin and G. Jaberipur Comment on ``High-Speed Parallel Decimal Multiplication With Redundant Internal Encodings'' . . . . . . . . . . . . . . 293--294 Anonymous 2014 Reviewers List . . . . . . . . . . 295--302
J. L. Jerez and G. A. Constantinides and E. C. Kerrigan A Low Complexity Scaling Method for the Lanczos Kernel in Fixed-Point Arithmetic 303--315 A. Kayi and O. Serres and T. El-Ghazawi Adaptive Cache Coherence Mechanisms with Producer-Consumer Sharing Optimization for Chip Multiprocessors . . . . . . . . 316--328 A. G. Bayrak and F. Regazzoni and D. Novo and P. Brisk and F.-X. Standaert and P. Ienne Automatic Application of Power Analysis Countermeasures . . . . . . . . . . . . 329--341 A. C.-C. Hsu and D. S. L. Wei and C.-C. J. Kuo Coexistence Wi-Fi MAC Design for Mitigating Interference Caused by Collocated Bluetooth . . . . . . . . . . 342--352 Haiying Shen and Yuhua Lin and Ting Li Combining Efficiency, Fidelity, and Flexibility in Resource Information Services . . . . . . . . . . . . . . . . 353--367 L. Yavits and A. Morad and R. Ginosar Computer Architecture with Associative Processor Replacing Last-Level Cache and SIMD Accelerator . . . . . . . . . . . . 368--381 M. Z. A. Bhuiyan and Guojun Wang and Jiannong Cao and Jie Wu Deploying Wireless Sensor Networks with Fault-Tolerance for Structural Health Monitoring . . . . . . . . . . . . . . . 382--395 I. Jangjaimon and Nian-Feng Tzeng Effective Cost Reduction for Elastic Clouds under Spot Instance Pricing Through Adaptive Checkpointing . . . . . 396--409 J. Rajendran and Huan Zhang and Chi Zhang and G. S. Rose and Youngok Pino and O. Sinanoglu and R. Karri Fault Analysis-Based Logic Encryption 410--424 Jin Li and Jingwei Li and Xiaofeng Chen and Chunfu Jia and Wenjing Lou Identity-Based Encryption with Outsourced Revocation in Cloud Computing 425--437 E. A. H. Abdulrahman and A. Reyhani-Masoleh New Regular Radix-8 Scheme for Elliptic Curve Scalar Multiplication without Pre-Computation . . . . . . . . . . . . 438--451 Daqiang Zhang and Daqing Zhang and Haoyi Xiong and L. T. Yang and V. Gauthier NextCell: Predicting Location Using Social Interplay from Cell Phone Traces 452--463 Bin Xue and S. K. Shukla and S. S. Ravi Optimization of Latency Insensitive Systems Through Back Pressure Minimization . . . . . . . . . . . . . . 464--476 A. M. Al-Qawasmeh and S. Pasricha and A. A. Maciejewski and H. J. Siegel Power and Thermal-Aware Workload Allocation in Heterogeneous Data Centers 477--491 Ching-Nung Yang and Zih-Yang Lin and Sheng-Lung Peng Reducing Code Length of Second-Order Spectral-Null Code . . . . . . . . . . . 492--503 S. Schneider and M. Hirzel and B. Gedik and Kun-Lung Wu Safe Data Parallelism for General Streaming . . . . . . . . . . . . . . . 504--517 Haiying Shen and Jinwei Liu and Kang Chen and Jianwei Liu and S. Moyer SCPS: A Social-Aware Distributed Cyber-Physical Human-Centric Search Engine . . . . . . . . . . . . . . . . . 518--532 M. Kayaalp and T. Schmitt and J. Nomani and D. Ponomarev and N. Abu Ghazaleh Signature-Based Protection from Code Reuse Attacks . . . . . . . . . . . . . 533--546 Shuming Zhou and Limei Lin and Li Xu and Dajin Wang The $ t / k$-Diagnosability of Star Graph Networks . . . . . . . . . . . . . 547--555 Weikuan Yu and Yandong Wang and Xinyu Que and Cong Xu Virtual Shuffling for Efficient Data Movement in MapReduce . . . . . . . . . 556--568 Youngjae Lee and Jin-Soo Kim and Sang-Won Lee and Seungryoul Maeng Zombie Chasing: Efficient Flash Management Considering Dirty Data in the Buffer Cache . . . . . . . . . . . . . . 569--581 Yu-Chieh Cheng and Pi-Chung Wang Packet Classification Using Dynamically Generated Decision Trees . . . . . . . . 582--586 Bang Wang and Han Xu and Wenyu Liu and L. T. Yang The Optimal Node Placement for Long Belt Coverage in Wireless Networks . . . . . 587--592 E. Bini The Quadratic Utilization Upper Bound for Arbitrary Deadline Real-Time Tasks 593--599
Wenzheng Xu and Weifa Liang and Xiaola Lin Approximation Algorithms for Min-Max Cycle Cover Problems . . . . . . . . . . 600--613 C. Rezende and A. Boukerche and H. S. Ramos and A. A. F. Loureiro A Reactive and Scalable Unicast Solution for Video Streaming over VANETs . . . . 614--626 M. S. Haghighi and Yang Xiang and V. Varadharajan and B. Quinn A Stochastic Time-Domain Model for Burst Data Aggregation in IEEE 802.15.4 Wireless Sensor Networks . . . . . . . . 627--639 Sheng Wen and M. S. Haghighi and Chao Chen and Yang Xiang and Wanlei Zhou and Weijia Jia A Sword with Two Edges: Propagation Studies on Both Positive and Negative Information in Online Social Networks 640--653 Sheng Zhang and Jie Wu and Sanglu Lu Collaborative Mobile Charging . . . . . 654--667 A. Jarray and A. Karmouch Cost-Efficient Mapping for Fault-Tolerant Virtual Networks . . . . 668--681 Dan Xu and Xin Liu and Bin Fan Efficient Server Provisioning and Offloading Policies for Internet Data Centers with Dynamic Load-Demand . . . . 682--697 Wei Wang and Yin Hu and Lianmu Chen and Xinming Huang and B. Sunar Exploring the Feasibility of Fully Homomorphic Encryption . . . . . . . . . 698--706 Dan Chen and Xiaoli Li and Lizhe Wang and S. U. Khan and Juan Wang and Ke Zeng and Chang Cai Fast and Scalable Multi-Way Analysis of Massive Neural Data . . . . . . . . . . 707--719 H. Park and J. Choi and D. Lee and S. H. Noh iBuddy: Inverse Buddy for Enhancing Memory Allocation/Deallocation Performance on Multi-Core Systems . . . 720--732 J. Rajendran and R. Karri and G. S. Rose Improving Tolerance to Variations in Memristor-Based Applications Using Parallel Memristors . . . . . . . . . . 733--746 Songtao Guo and Changyin Dang and Yuanyuan Yang Joint Optimal Data Rate and Power Allocation in Lossy Mobile Ad Hoc Networks with Delay-Constrained Traffics 747--762 Sheng Ma and Zhiying Wang and Zonglin Liu and N. E. Jerger Leaving One Slot Empty: Flit Bubble Flow Control for Torus Cache-Coherent NoCs 763--777 C. Rebeiro and D. Mukhopadhyay Micro-Architectural Analysis of Time-Driven Cache Attacks: Quest for the Ideal Implementation . . . . . . . . . . 778--790 M. Jessa On the Quality of Random Sequences Produced with a Combined Random Bit Generator . . . . . . . . . . . . . . . 791--804 S. F. Beldianu and S. G. Ziavras Performance-Energy Optimizations for Shared Vector Accelerators in Multicores 805--817 Liang Liu and Yuning Song and Haiyang Zhang and Huadong Ma and A. V. Vasilakos Physarum Optimization: A Biology-Inspired Algorithm for the Steiner Tree Problem in Networks . . . . 819--832 Y. Al Ridhawi and A. Karmouch QoS-Based Composition of Service Specific Overlay Networks . . . . . . . 832--846 R. Maddah and R. Melhem and Sangyeun Cho RDIS: Tolerating Many Stuck-At Faults in Resistive Memory . . . . . . . . . . . . 847--861 Jiangtao Han and Haining Fan Shifted Polynomial Basis Multipliers Based on Subquadratic Toeplitz Matrix-Vector Product Approach for All Irreducible Pentanomials . . . . . . . . 862--867 En-Jui Chang and Hsien-Kai Hsin and Chih-Hao Chao and Shu-Yen Lin and An-Yeu Wu Regional ACO-Based Cascaded Adaptive Routing for Traffic Balancing in Mesh-Based Network-on-Chip Systems . . . 868--875 Jin-Xin Zhou and Zhen-Lin Wu and Shi-Chen Yang and Kui-Wu Yuan Symmetric Property and Reliability of Balanced Hypercube . . . . . . . . . . . 876--881 Chen Li and Le Chen and Rongxing Lu and Hui Li Comment on ``An Efficient Homomorphic MAC with Small Key Size for Authentication in Network Coding'' . . . 882--883
B.-C. C. Lai and Hsien-Kai Kuo and Jing-Yang Jou A Cache Hierarchy Aware Thread Mapping Methodology for GPGPUs . . . . . . . . . 884--898 Dayong Ye and Minjie Zhang A Self-Adaptive Strategy for Evolution of Cooperation in Distributed Networks 899--911 P. Di Francesco and S. McGettrick and U. K. Anyanwu and J. C. O'Sullivan and A. B. MacKenzie and L. A. DaSilva A Split MAC Approach for SDR Platforms 912--924 Jiantao Wang and Kam-Yiu Lam and Yuan-Hao Chang and Jen-Wei Hsieh and Po-Chun Huang Block-Based Multi-Version B-Tree for Flash-Based Embedded Database Systems 925--940 Jinkyu Lee and K. G. Shin and I. Shin and A. Easwaran Composition of Schedulability Analyses for Real-Time Multiprocessor Systems . . 941--954 S. Franchini and A. Gentile and F. Sorbello and G. Vassallo and S. Vitabile ConformalALU: A Conformal Geometric Algebra Coprocessor for Medical Image Processing . . . . . . . . . . . . . . . 955--970 Xinyi Huang and J. K. Liu and Shaohua Tang and Yang Xiang and Kaitai Liang and Li Xu and Jianying Zhou Cost-Effective Authentic and Anonymous Data Sharing with Forward Security . . . 971--983 A. Momeni and Jie Han and P. Montuschi and F. Lombardi Design and Analysis of Approximate Compressors for Multiplication . . . . . 984--994 A. Garcia-Guirado and R. Fernandez-Pascual and J. M. Garcia ICCI: In-Cache Coherence Information . . 995--1014 M. I. Akbas and M. Erol-Kantarci and D. Turgut Localization for Wireless Sensor and Actor Networks with Meandering Mobility 1015--1028 Kang Chen and Haiying Shen Maximizing P2P File Access Availability in Mobile Ad Hoc Networks though Replication for Efficient File Sharing 1029--1042 G. Levitin and Liudong Xing and B. W. Johnson and Yuanshun Dai Mission Reliability, Cost and Time for Cold Standby Computing Systems with Periodic Backup . . . . . . . . . . . . 1043--1057 Zhiyang Guo and Yuanyuan Yang On Nonblocking Multicast Fat-Tree Data Center Networks with Server Redundancy 1058--1073 A. Randolph and H. Boucheneb and A. Imine and A. Quintero On Synthesizing a Consistent Operational Transformation Approach . . . . . . . . 1074--1089 T. Nechma and M. Zwolinski Parallel Sparse Matrix Solution for Circuit Simulation on FPGAs . . . . . . 1090--1103 T. Banerjee and S. Sahni and G. Seetharaman PC-TRIO: A Power Efficient TCAM Architecture for Packet Classifiers . . 1104--1118 T. Banerjee and S. Sahni Pubsub: An Efficient Publish/Subscribe System . . . . . . . . . . . . . . . . . 1119--1132 Hui Sun and Xiao Qin and Hong Jiang and Jianzhong Huang and Changsheng Xie RB-Explorer: An Accurate and Practical Approach to Write Amplification Measurement for SSDs . . . . . . . . . . 1133--1148 Pei Huang and Chen Wang and Li Xiao RC-MAC: A Receiver-Centric MAC Protocol for Event-Driven Wireless Sensor Networks . . . . . . . . . . . . . . . . 1149--1161 Wen Xia and Hong Jiang and Dan Feng and Yu Hua Similarity and Locality Based Indexing for High Performance Data Deduplication 1162--1176 H. Kashif and S. Gholamian and H. Patel SLA: A Stage-Level Latency Analysis for Real-Time Communication in a Pipelined Resource Model . . . . . . . . . . . . . 1177--1190 D. Lubicz and N. Bochard Towards an Oscillator Based TRNG with a Certified Entropy Rate . . . . . . . . . 1191--1200 A. A. Bertossi and D. Diodati and C. M. Pinotti Storage Placement in Path Networks . . . 1201--1207 K. Datta and I. Sengupta and H. Rahaman A Post-Synthesis Optimization Technique for Reversible Circuits Exploiting Negative Control Lines . . . . . . . . . 1208--1214 A. Reyhani-Masoleh Comments on ``Low-Latency Digit-Serial Systolic Double Basis Multiplier over Using Subquadratic Toeplitz Matrix-Vector Product Approach'' . . . . 1215--1216
W. Ibrahim and M. Shousha and J. W. Chinneck Accurate and Efficient Estimation of Logic Circuits Reliability Bounds . . . 1217--1229 Shyue-Kung Lu and Tsu-Lin Li and M. Hashizume and Jiann-Liang Chen Address Scrambling and Data Inversion Techniques for Yield Enhancement of NROM-Based ROMs . . . . . . . . . . . . 1230--1240 A. Burns and M. Gutierrez and M. Aldea Rivas and M. Gonzalez Harbour A Deadline-Floor Inheritance Protocol for EDF Scheduled Embedded Real-Time Systems with Resource Sharing . . . . . 1241--1253 Yi Tang and N. W. Bergmann A Hardware Scheduler Based on Task Queues for FPGA-Based Embedded Real-Time Systems . . . . . . . . . . . . . . . . 1254--1267 Cong Liu and Jie Han and F. Lombardi An Analytical Framework for Evaluating the Error Characteristics of Approximate Adders . . . . . . . . . . . . . . . . . 1268--1281 C. Liaskos and A. Tsioliaridou A Promise of Realizable, Ultra-Scalable Communications at Nano-Scale: A Multi-Modal Nano-Machine Architecture 1282--1295 Chao Wang and Xi Li and Junneng Zhang and Peng Chen and Yunji Chen and Xuehai Zhou and R. C. C. Cheung Architecture Support for Task Out-of-Order Execution in MPSoCs . . . . 1296--1310 W. Dargie A Stochastic Model for Estimating the Power Consumption of a Processor . . . . 1311--1322 Wenping Liu and Hongbo Jiang and Yang Yang and Xiaofei Liao and Hongzhi Lin and Zemeng Jin A Unified Framework for Line-Like Skeleton Extraction in $2$D/$3$D Sensor Networks . . . . . . . . . . . . . . . . 1323--1335 M. Menzel and R. Ranjan and Lizhe Wang and S. U. Khan and Jinjun Chen CloudGenius: A Hybrid Decision Support Method for Automating the Migration of Web Application Clusters to Public Clouds . . . . . . . . . . . . . . . . . 1336--1348 Eunji Lee and Seung Hoon Yoo and Hyokyung Bahn Design and Implementation of a Journaling File System for Phase-Change Memory . . . . . . . . . . . . . . . . . 1349--1360 A. Saifullah and You Xu and Chenyang Lu and Yixin Chen End-to-End Communication Delay Analysis in Industrial Wireless Networks . . . . 1361--1374 Youjip Won and Kyeongyeol Lim and Jaehong Min MUCH: Multithreaded Content-Based File Chunking . . . . . . . . . . . . . . . . 1375--1388 Gang Lu and Jianfeng Zhan and Haining Wang and Lin Yuan and Yunwei Gao and Chuliang Weng and Yong Qi PowerTracer: Tracing Requests in Multi-Tier Services to Reduce Energy Inefficiency . . . . . . . . . . . . . . 1389--1401 Ziming Zheng and Li Yu and Zhiling Lan Reliability-Aware Speedup Models for Parallel Applications with Coordinated Checkpointing/Restart . . . . . . . . . 1402--1415 M. Lukic and A. Barnawi and I. Stojmenovic Robot Coordination for Energy-Balanced Matching and Sequence Dispatch of Robots to Events . . . . . . . . . . . . . . . 1416--1428 E. Zavattoni and L. J. Dominguez Perez and S. Mitsunari and A. H. Sanchez-Ramirez and T. Teruya and F. Rodriguez-Henriquez Software Implementation of an Attribute-Based Encryption Scheme . . . 1429--1441 Tianshi Chen and Qi Guo and O. Temam and Yue Wu and Yungang Bao and Zhiwei Xu and Yunji Chen Statistical Performance Comparisons of Computers . . . . . . . . . . . . . . . 1442--1455 Gaofeng Zhang and Xiao Liu and Yun Yang Time-Series Pattern Based Effective Noise Generation for Privacy Protection on Cloud . . . . . . . . . . . . . . . . 1456--1469 Chuliang Weng and Jianfeng Zhan and Yuan Luo TSAC: Enforcing Isolation of Virtual Machines in Clouds . . . . . . . . . . . 1470--1482 M. Gottscho and L. A. D. Bathen and N. Dutt and A. Nicolau and P. Gupta ViPZonE: Hardware Power Variability-Aware Virtual Memory Management for Energy Savings . . . . . 1483--1496 S. Pontarelli and P. Reviriego and M. Ottavi and J. A. Maestro Low Delay Single Symbol Error Correction Codes Based on Reed Solomon Codes . . . 1497--1501 P. Kornerup Reviewing High-Radix Signed-Digit Adders 1502--1505
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N. Lasla and M. F. Younis and A. Ouadjaout and N. Badache An Effective Area-Based Localization Algorithm for Wireless Networks . . . . 2103--2118 Hsien-Kai Hsin and En-Jui Chang and Kuan-Yu Su and An-Yeu Wu Ant Colony Optimization-Based Adaptive Network-on-Chip Routing Framework Using Network Information Region . . . . . . . 2119--2131 M. Dehyadegari and A. Marongiu and M. R. Kakoee and S. Mohammadi and N. Yazdani and L. Benini Architecture Support for Tightly-Coupled Multi-Core Clusters with Shared-Memory HW Accelerators . . . . . . . . . . . . 2132--2144 Yunfeng Zhu and Jian Lin and P. P. C. Lee and Yinlong Xu Boosting Degraded Reads in Heterogeneous Erasure-Coded Storage Systems . . . . . 2145--2157 Zhen Huang and Cheng Wang and M. Stojmenovi and A. Nayak Characterization of Cascading Failures in Interdependent Cyber-Physical Systems 2158--2168 Qingan Li and Yanxiang He and Jianhua Li and Liang Shi and Yiran Chen and C. J. Xue Compiler-Assisted Refresh Minimization for Volatile STT-RAM Cache . . . . . . . 2169--2181 R. Sheikh and J. Tuck and E. Rotenberg Control-Flow Decoupling: An Approach for Timely, Non-Speculative Branching . . . 2182--2203 N. Meloni and M. A. Hasan Efficient Double Bases for Scalar Multiplication . . . . . . . . . . . . . 2204--2212 C. George and S. Vadhiyar Fault Tolerance on Large Scale Systems using Adaptive Process Replication . . . 2213--2225 Xinmu Wang and Yu Zheng and A. Basak and S. Bhunia IIPS: Infrastructure IP for Secure SoC Design . . . . . . . . . . . . . . . . . 2226--2238 E. Deniz and A. Sen and B. Kahne and J. Holt MINIME: Pattern-Aware Multicore Benchmark Synthesizer . . . . . . . . . 2239--2252 Lei Yang and Jiannong Cao and Hui Cheng and Yusheng Ji Multi-User Computation Partitioning for Latency Sensitive Mobile Cloud Applications . . . . . . . . . . . . . . 2253--2266 Xin Zhan and S. Reda Power Budgeting Techniques for Data Centers . . . . . . . . . . . . . . . . 2267--2278 S. Bardhan and A. Daniel Predicting the Effect of Memory Contention in Multi-Core Computers Using Analytic Performance Models . . . . . . 2279--2292 Xuyun Zhang and Wanchun Dou and Jian Pei and S. Nepal and Chi Yang and Chang Liu and Jinjun Chen Proximity-Aware Local-Recoding Anonymization with MapReduce for Scalable Big Data Privacy Preservation in Cloud . . . . . . . . . . . . . . . . 2293--2307 U. Sadiq and M. Kumar and A. Passarella and M. Conti Service Composition in Opportunistic Networks: A Load and Mobility Aware Solution . . . . . . . . . . . . . . . . 2308--2322 H. J. Garcia and I. L. Markov Simulation of Quantum Circuits via Stabilizer Frames . . . . . . . . . . . 2323--2336 Seungcheol Baek and Hyung Gyu Lee and C. Nicopoulos and Junghee Lee and Jongman Kim Size-Aware Cache Management for Compressed Cache Architectures . . . . . 2337--2352 Feng Gu and K. Shaban and N. Ghani and S. Khan and M. R. Naeini and M. M. Hayat and C. Assi Survivable Cloud Network Mapping for Disaster Recovery Support . . . . . . . 2353--2366 Yanchao Lu and Bingsheng He and Xueyan Tang and Minyi Guo Synergy of Dynamic Frequency Scaling and Demotion on DRAM Power Management: Models and Optimizations . . . . . . . . 2367--2381 Wei Xue and Chao Yang and Haohuan Fu and Xinliang Wang and Yangtong Xu and Junfeng Liao and Lin Gan and Y. Lu and R. Ranjan and L. Wang Ultra-Scalable CPU-MIC Acceleration of Mesoscale Atmospheric Modeling on Tianhe-2 . . . . . . . . . . . . . . . . 2382--2393 B. Khemka and R. Friese and L. D. Briceno and A. A. Maciejewski and G. A. Koenig and G. Okonski and M. M. Hilton and R. Rambharos and S. Poole and C. Groer Utility Functions and Resource Management in an Oversubscribed Heterogeneous Computing Environment . . 2394--2407 Jiantao Zhou and Caihe Lan and W. N. N. Hung and Xinrui Guo and Xiaoyu Song A Quantitative Characterization of Cross Coverage . . . . . . . . . . . . . . . . 2408--2414 I. Pomeranz Piecewise-Functional Broadside Tests Based on Reachable States . . . . . . . 2415--2420
K. Jarvinen and V. Dimitrov and R. Azarderakhsh A Generalization of Addition Chains and Fast Inversions in Binary Fields . . . . 2421--2432 Seokin Hong and Soontae Kim A Low-Cost Mechanism Exploiting Narrow-Width Values for Tolerating Hard Faults in ALU . . . . . . . . . . . . . 2433--2446 Yan Wu and Chun Gang Yan and Lu Liu and Zhi Jun Ding and Chang Jun Jiang An Adaptive Multilevel Indexing Method for Disaster Service Discovery . . . . . 2447--2459 Joonho Kong and F. Koushanfar and Sung Woo Chung An Energy-Efficient Last-Level Cache Architecture for Process Variation-Tolerant $3$D Microprocessors 2460--2475 V. A. Mardiris and G. C. Sirakoulis and I. G. Karafyllidis Automated Design Architecture for $1$-D Cellular Automata Using Quantum Cellular Automata . . . . . . . . . . . . . . . . 2476--2489 Dianxiang Xu and M. Kent and L. Thomas and T. Mouelhi and Y. Le Traon Automated Model-Based Testing of Role-Based Access Control Using Predicate/Transition Nets . . . . . . . 2490--2505 Ziming Zhong and V. Rychkov and A. Lastovetsky Data Partitioning on Multicore and Multi-GPU Platforms Using Functional Performance Models . . . . . . . . . . . 2506--2518 Zhiyuan Tan and A. Jamdagni and Xiangjian He and P. Nanda and Ren Ping Liu and Jiankun Hu Detection of Denial-of-Service Attacks Based on Computer Vision Techniques . . 2519--2533 Dan Li and Yunfei Shang and Wu He and Congjie Chen EXR: Greening Data Center Network with Software Defined Exclusive Routing . . . 2534--2544 Ji Wang and Weidong Bao and Xiaomin Zhu and L. T. Yang and Yang Xiang FESTAL: Fault-Tolerant Elastic Scheduling Algorithm for Real-Time Tasks in Virtualized Clouds . . . . . . . . . 2545--2558 Gang Feng and T. Korkmaz Finding Multi-Constrained Multiple Shortest Paths . . . . . . . . . . . . . 2559--2572 H. Kumarage and I. Khalil and Z. Tari Granular Evaluation of Anomalies in Wireless Sensor Networks Using Dynamic Data Partitioning with an Entropy Criteria . . . . . . . . . . . . . . . . 2573--2585 Jenq-Shiou Leu and Jheng-Huei Chen and Kuen-Han Li Hybrid Search Scheme for Social Networks Supported by Dynamic Weighted Distributed Label Clustering . . . . . . 2586--2594 Tsz Hon Yuen and J. K. Liu and Man Ho Au and Xinyi Huang and W. Susilo and Jianying Zhou $k$-Times Attribute-Based Anonymous Access Control for Cloud Computing . . . 2595--2608 Chang Liu and R. Ranjan and Chi Yang and Xuyun Zhang and Lizhe Wang and Jinjun Chen MuR-DPA: Top-Down Levelled Multi-Replica Merkle Hash Tree Based Secure Public Auditing for Dynamic Big Data Storage on Cloud . . . . . . . . . . . . . . . . . 2609--2622 Wangdong Yang and Kenli Li and Zeyao Mo and Keqin Li Performance Optimization Using Partitioned SpMV on GPUs and Multicore CPUs . . . . . . . . . . . . . . . . . . 2623--2636 Suzhen Wu and Hong Jiang and Bo Mao Proactive Data Migration for Improved Storage Availability in Large-Scale Data Centers . . . . . . . . . . . . . . . . 2637--2651 J. Ebergen and N. Jamadagni Radix-$2$ Division Algorithms with an Over-Redundant Digit Set . . . . . . . . 2652--2663 M. Maniatakos and M. Michael and C. Tirumurti and Y. Makris Revisiting Vulnerability Analysis in Modern Microprocessors . . . . . . . . . 2664--2674 Wanchun Jiang and Fengyuan Ren and Ran Shu and Yongwei Wu and Chuang Lin Sliding Mode Congestion Control for Data Center Ethernet Networks . . . . . . . . 2675--2690 D. Chakraborty and C. Mancillas-Lopez and P. Sarkar STES: A Stream Cipher Based Low Cost Scheme for Securing Stored Data . . . . 2691--2707 N. Rajapaksha and A. Madanayake and R. J. Cintra and J. Adikari and V. S. Dimitrov VLSI Computational Architectures for the Arithmetic Cosine Transform . . . . . . 2708--2715 Yang Wang and P. Lu and K. B. Kent WaFS: A Workflow-Aware File System for Effective Storage Utilization in the Cloud . . . . . . . . . . . . . . . . . 2716--2729
Cheng Yu-Chun and Cheng-Fu Chou and E. H. Wu and Gen-Huey Chen A Cognitive TCP Design for a Cognitive Radio Network with an Unstable-Bandwidth Link . . . . . . . . . . . . . . . . . . 2730--3740 Wenzhi Chen and Lei Xu and Guoxi Li and Yang Xiang A Lightweight Virtualization Solution for Android Devices . . . . . . . . . . 2741--2751 Hanying Zheng and Xueyan Tang Analysis of Server Provisioning for Distributed Interactive Applications . . 2752--2766 Sheng-Wei Cheng and Ling-Chia Ku and Pi-Cheng Hsiu Dynamic Antenna Management for Uplink Energy Efficiency on 802.11n Mobile Devices . . . . . . . . . . . . . . . . 2767--2780 Dong Yuan and Xiao Liu and Yun Yang Dynamic On-the-Fly Minimum Cost Benchmarking for Storing Generated Scientific Datasets in the Cloud . . . . 2781--2795 R. Baldoni and S. Bonomi and M. Platania and L. Querzoni Efficient Notification Ordering for Geo-Distributed Pub/Sub Systems . . . . 2796--2808 Kaimin Wei and Song Guo and Deze Zeng and Ke Xu and Keqiu Li Exploiting Small World Properties for Message Forwarding in Delay Tolerant Networks . . . . . . . . . . . . . . . . 2809--2818 Youyou Lu and Jiwu Shu and Jia Guo and Shuai Li and O. Mutlu High-Performance and Lightweight Transaction Support in Flash-Based SSDs 2819--2832 Seongwook Jin and Jeongseob Ahn and Jinho Seol and Sanghoon Cha and Jaehyuk Huh and Seungryoul Maeng H-SVM: Hardware-Assisted Secure Virtual Machines under a Vulnerable Hypervisor 2833--2846 F. J. Andujar-Munoz and J. A. Villar-Ortiz and J. L. Sanchez and F. J. Alfaro and J. Duato $N$-Dimensional Twin Torus Topology . . 2847--2861 Keunsoo Kim and B. Y. Cho and Won Woo Ro and J.-L. Gaudiot Network Variation and Fault Tolerant Performance Acceleration in Mobile Devices with Simultaneous Remote Execution . . . . . . . . . . . . . . . 2862--2874 C. Negre and J.-M. Robert New Parallel Approaches for Scalar Multiplication in Elliptic Curve over Fields of Small Characteristic . . . . . 2875--2890 I. K. Voyiatzis and D. J. Kavvadias On the Generation of SIC Pairs in Optimal Time . . . . . . . . . . . . . . 2891--2901 K. Namba and F. Lombardi Parallel Decodable Two-Level Unequal Burst Error Correcting Codes . . . . . . 2902--2911 S. Sarkar and S. Misra and B. Bandyopadhyay and C. Chakraborty and M. S. Obaidat Performance Analysis of IEEE 802.15.6 MAC Protocol under Non-Ideal Channel Conditions and Saturated Traffic Regime 2912--2925 Guiyuan Jiang and Jigang Wu and Yajun Ha and Yi Wang and Jizhou Sun Reconfiguring Three-Dimensional Processor Arrays for Fault-Tolerance: Hardness and Heuristic Algorithms . . . 2926--2939 W. P. McCartney and N. Sridhar Stackless Multi-Threading for Embedded Systems . . . . . . . . . . . . . . . . 2940--2952 Haiying Shen and Guoxin Liu and H. Chandler Swarm Intelligence Based File Replication and Consistency Maintenance in Structured P2P File Sharing Systems 2953--2967 Lin Chen and Kaigui Bian The Telephone Coordination Game Revisited: From Random to Deterministic Algorithms . . . . . . . . . . . . . . . 2968--2980 C. Condo and G. Masera and P. Montuschi Unequal Error Protection of Memories in LDPC Decoders . . . . . . . . . . . . . 2981--2993 S. Sundaresan and R. Doss and Wanlei Zhou Zero Knowledge Grouping Proof Protocol for RFID EPC C1G2 Tags . . . . . . . . . 2994--3008 I. Pomeranz Two-Dimensional Static Test Compaction for Functional Test Sequences . . . . . 3009--3015 Juan Luo and Yaling Guo and Shan Fu and Keqin Li and Wenfeng He Virtual Resource Allocation Based on Link Interference in Cayley Wireless Data Centers . . . . . . . . . . . . . . 3016--3021
S. Manoj P. D. and H. Yu and K. Wang $3$D Many-Core Microprocessor Power Management by Space-Time Multiplexing Based Demand-Supply Matching . . . . . . 3022--3036 J. Huang and X. Qin and X. Liang and C. Xie An Efficient I/O-Redirection-Based Reconstruction Scheme for Erasure-Coded Storage Clusters . . . . . . . . . . . . 3037--3050 F. Liu and P. Shu and J. C. Lui AppATP: An Energy Conserving Adaptive Mobile-Cloud Transmission Protocol . . . 3051--3063 J. Mei and K. Li and A. Ouyang and K. Li A Profit Maximization Scheme with Guaranteed Quality of Service in Cloud Computing . . . . . . . . . . . . . . . 3064--3078 Y. Shih and A. Pang and M. Tsai and C. Chai A Rewarding Framework for Network Resource Sharing in Co-Channel Hybrid Access Femtocell Networks . . . . . . . 3079--3090 J. Chung and L. Kim Bit-Width Optimization by Divide-and-Conquer for Fixed-Point Digital Signal Processing Systems . . . 3091--3101 N. B. Lakshminarayana and H. Kim Block-Precise Processors: Low-Power Processors with Reduced Operand Store Accesses and Result Broadcasts . . . . . 3102--3114 J. Hsieh and Y. Kuan DCCS: Double Circular Caching Scheme for DRAM/PRAM Hybrid Cache . . . . . . . . . 3115--3127 D. Zeng and P. Li and S. Guo and T. Miyazaki and J. Hu and Y. Xiang Energy Minimization in Multi-Task Software-Defined Sensor Networks . . . . 3128--3139 A. Rodriguez and F. Moreno Evolutionary Computing and Particle Filtering: A Hardware-Based Motion Estimation System . . . . . . . . . . . 3140--3152 Z. Yu and L. Eeckhout and N. Goswami and T. Li and L. K. John and H. Jin and C. Xu and J. Wu GPGPU-MiniBench: Accelerating GPGPU Micro-Architecture Simulation . . . . . 3153--3166 J. Lee and D. H. Woo and H. Kim and M. Azimi GREEN Cache: Exploiting the Disciplined Memory Model of OpenCL on GPUs . . . . . 3167--3180 M. Otoom and J. M. Paul Multiprocessor Capacity Metric and Analysis . . . . . . . . . . . . . . . . 3181--3196 J. Ranieri and A. Vincenzi and A. Chebira and D. Atienza and M. Vetterli Near-Optimal Thermal Monitoring Framework for Many-Core Systems-on-Chip 3197--3209 D. Li and J. Wu On Data Center Network Architectures for Interconnecting Dual-Port Servers . . . 3210--3222 Z. Xu and Y. Tu and X. Wang Online Energy Estimation of Relational Operations in Database Systems . . . . . 3223--3236 Y. Shang and D. Li and J. Zhu and M. Xu On the Network Power Effectiveness of Data Center Architectures . . . . . . . 3237--3248 Z. Zhang and T. G. Robertazzi Scheduling Divisible Loads in Gaussian, Mesh and Torus Network of Processors . . 3249--3264 X. Liu and B. Xiao and S. Zhang and K. Bu and A. Chan STEP: A Time-Efficient Tag Searching Protocol in Large RFID Systems . . . . . 3265--3277 W. Zheng and K. Ma and X. Wang TE-Shave: Reducing Data Center Capital and Operating Expenses with Thermal Energy Storage . . . . . . . . . . . . . 3278--3292 J. Wang and X. Chen and X. Huang and I. You and Y. Xiang Verifiable Auditing for Outsourced Database in Cloud Computing . . . . . . 3293--3303 Y. Chai and Z. Du and X. Qin and D. A. Bader WEC: Improving Durability of SSD Cache Drives by Caching Write-Efficient Data 3304--3316 I. Pomeranz Test Vector Omission for Fault Coverage Improvement of Functional Test Sequences 3317--3321
L. Sousa $ 2^n $ RNS Scalers for Extended $4$-Moduli Sets . . . . . . . . . . . . 3322--3334 U. Ingelsson and S. K. Goel and E. Larsson and E. J. Marinissen Abort-on-Fail Test Scheduling for Modular SOCs without and with Preemption 3335--3347 J. Hsieh and C. Chen and H. Lin Adaptive ECC Scheme for Hybrid SSD's . . 3348--3361 M. Won and R. Stoleru A Hybrid Multicast Routing for Large Scale Sensor Networks with Holes . . . . 3362--3375 D. T. Lee and J. Bruck Algorithms for Generating Probabilities with Multivalued Stochastic Relay Circuits . . . . . . . . . . . . . . . . 3376--3388 X. Zhu and C. Chen and L. T. Yang and Y. Xiang ANGEL: Agent-Based Scheduling for Real-Time Tasks in Virtualized Clouds 3389--3403 C. Chang and J. Cheng and T. Huang and X. Huang and D. Lee and C. Chen Bit-Stuffing Algorithms for Crosstalk Avoidance in High-Speed Switching . . . 3404--3416 L. Chen and A. Cui and C. Chang Design of Optimal Scan Tree Based on Compact Test Patterns for Test Time Reduction . . . . . . . . . . . . . . . 3417--3429 Z. Wang and D. Huang and Y. Zhu and B. Li and C. Chung Efficient Attribute-Based Comparable Data Access Control . . . . . . . . . . 3430--3443 C. Tsao and Y. Chang and M. Yang and P. Huang Efficient Victim Block Selection for Flash Storage Devices . . . . . . . . . 3444--3460 J. Ahn and S. Jin and J. Huh Fast Two-Level Address Translation for Virtualized Systems . . . . . . . . . . 3461--3474 S. Alawneh and R. Dragt and D. Peters and C. Daley and S. Bruneau Hyper-Real-Time Ice Simulation and Modeling Using GPGPU . . . . . . . . . . 3475--3487 H. Huang and S. Guo and P. Li and B. Ye and I. Stojmenovic Joint Optimization of Rule Placement and Traffic Engineering for QoS Provisioning in Software Defined Network . . . . . . 3488--3499 J. Qian and Q. Zhu and H. Chen Multi-Granularity Locality-Sensitive Bloom Filter . . . . . . . . . . . . . . 3500--3514 H. Yao and D. Zeng and H. Huang and S. Guo and A. Barnawi and I. Stojmenovic Opportunistic Offloading of Deadline-Constrained Bulk Cellular Traffic in Vehicular DTNs . . . . . . . 3515--3527 M. Qiu and Z. Ming and J. Li and K. Gai and Z. Zong Phase-Change Memory Optimization for Green Cloud with Genetic Algorithm . . . 3528--3540 A. Y. Du and S. D. Smith and Z. Yang and C. Qiao and R. Ramesh Predicting Transient Downtime in Virtual Server Systems: An Efficient Sample Path Randomization Approach . . . . . . . . . 3541--3554 D. DiTomaso and A. K. Kodi and A. Louri and R. Bunescu Resilient and Power-Efficient Multi-Function Channel Buffers in Network-on-Chip Architectures . . . . . 3555--3568 J. Li and X. Chen and X. Huang and S. Tang and Y. Xiang and M. M. Hassan and A. Alelaiwi Secure Distributed Deduplication Systems with Improved Reliability . . . . . . . 3569--3579 M. A. Thornton Simulation and Implication Using a Transfer Function Model for Switching Logic . . . . . . . . . . . . . . . . . 3580--3590 A. Eghbal and P. M. Yaghini and N. Bagherzadeh and M. Khayambashi Analytical Fault Tolerance Assessment and Metrics for TSV-Based $3$D Network-on-Chip . . . . . . . . . . . . 3591--3604 A. Bernasconi and V. Ciriani and G. Trucco and T. Villa Using Flexibility in $P$-Circuits by Boolean Relations . . . . . . . . . . . 3605--3618 Y. Kim Comments on ``An Efficient Homomorphic MAC with Small Key Size for Authentication in Network Coding . . . . 3619--3620
P. Montuschi State of the Journal . . . . . . . . . . 1--4 Anonymous 2015 Index IEEE Transactions on Computers Vol. 64 . . . . . . . . . . . 1--34 G. Upasani and X. Vera and A. Gonzalez A Case for Acoustic Wave Detectors for Soft-Errors . . . . . . . . . . . . . . 5--18 L. Gu and D. Zeng and S. Guo and Y. Xiang and J. Hu A General Communication Cost Optimization Framework for Big Data Stream Processing in Geo-Distributed Data Centers . . . . . . . . . . . . . . 19--29 A. Fajar Firdaus and M. Meribout A New Parallel VLSI Architecture for Real-Time Electrical Capacitance Tomography . . . . . . . . . . . . . . . 30--41 C. Bolchini and L. Cassano A Novel Approach to Incremental Functional Diagnosis for Complex Electronic Boards . . . . . . . . . . . 42--52 C. Chen and C. Chu A Novel Computational Model for Non-Linear Divisible Loads on a Linear Network . . . . . . . . . . . . . . . . 53--65 P. Xu and T. Jiao and Q. Wu and W. Wang and H. Jin Conditional Identity-Based Broadcast Proxy Re-Encryption and Its Application to Cloud Email . . . . . . . . . . . . . 66--79 S. Rehman and K. Chen and F. Kriebel and A. Toma and M. Shafique and J. Chen and J. Henkel Cross-Layer Software Dependability on Unreliable Hardware . . . . . . . . . . 80--94 Y. Wang and Z. Li and G. Tyson and S. Uhlig and G. Xie Design and Evaluation of the Optimal Cache Allocation for Content-Centric Networking . . . . . . . . . . . . . . . 95--107 I. Bhati and M. Chang and Z. Chishti and S. Lu and B. Jacob DRAM Refresh Mechanisms, Penalties, and Trade-Offs . . . . . . . . . . . . . . . 108--121 N. Jing and L. Jiang and T. Zhang and C. Li and F. Fan and X. Liang Energy-Efficient eDRAM-Based On-Chip Storage Architecture for GPGPUs . . . . 122--135 J. N. Coleman and R. Che Ismail LNS with Co-Transformation Competes with Floating-Point . . . . . . . . . . . . . 136--146 D. D. Chen and G. X. Yao and R. C. Cheung and D. Pao and C. K. Koc Parameter Space for the Architecture of FFT-Based Montgomery Modular Multiplication . . . . . . . . . . . . . 147--160 V. Kliuchnikov and D. Maslov and M. Mosca Practical Approximation of Single-Qubit Unitaries by Single-Qubit Quantum Clifford and $T$ Circuits . . . . . . . 161--172 W. Zhu and J. Cao and M. Raynal Predicate Detection in Asynchronous Distributed Systems: A Probabilistic Approach . . . . . . . . . . . . . . . . 173--186 Y. Lu and D. Wu and B. He and X. Tang and J. Xu and M. Guo Rank-Aware Dynamic Migrations and Adaptive Demotions for DRAM Power Management . . . . . . . . . . . . . . . 187--202 Y. Yue and B. He and L. Tian and H. Jiang and F. Wang and D. Feng Rotated Logging Storage Architectures for Data Centers: Models and Optimizations . . . . . . . . . . . . . 203--215 C. Wang and K. Ren and J. Wang Secure Optimization Computation Outsourcing in Cloud Computing: A Case Study of Linear Programming . . . . . . 216--229 K. Xiao and X. S. Hu and B. Zhou and D. Z. Chen Shell: A Spatial Decomposition Data Structure for Ray Traversal on GPU . . . 230--243 T. Meng and F. Wu and Z. Yang and G. Chen and A. V. Vasilakos Spatial Reusability-Aware Routing in Multi-Hop Wireless Networks . . . . . . 244--255 P. Radojkovic and P. M. Carpenter and M. Moreto and V. Cakarevic and J. Verdu and A. Pajuelo and F. J. Cazorla and M. Nemirovsky and M. Valero Thread Assignment in Multicore/Multithreaded Processors: A Statistical Approach . . . . . . . . . . 256--269 J. Wang and Z. Cao and X. Mao and X. Li and Y. Liu Towards Energy Efficient Duty-Cycled Networks: Analysis, Implications and Improvement . . . . . . . . . . . . . . 270--280 Y. Gao and W. Dong and C. Chen and J. Bu and X. Liu Towards Reconstructing Routing Paths in Large Scale Sensor Networks . . . . . . 281--293 K. Han and C. Zhang and J. Luo and M. Hu and B. Veeravalli Truthful Scheduling Mechanisms for Powering Mobile Crowdsensing . . . . . . 294--307 W. Liu and L. Chen and C. Wang and M. O'Neill and F. Lombardi Design and Analysis of Inexact Floating-Point Adders . . . . . . . . . 308--314 B. Albader and B. Bose Edge Disjoint Hamiltonian Cycles in Gaussian Networks . . . . . . . . . . . 315--321 N. Koo and G. H. Cho and S. Kwon On $r$-th Root Extraction Algorithm in $ \mathbb {F}_q$ for $ q \equiv l r^s (\bmod r^{s + 1})$ with $ 0 < l < r $ and Small $s$ . . . . . . . . . . . . . . . 322--325 S. Pontarelli and P. Reviriego and J. A. Maestro Parallel $d$-Pipeline: A Cuckoo Hashing Implementation for Increased Throughput 326--331 S. Park and K. Chang and D. Hong and C. Seo Comments on ``Multiway Splitting Method for Toeplitz Matrix Vector Product'' . . 332--333 Anonymous 2015 reviewers list . . . . . . . . . . 334--342
H. Fan A Chinese Remainder Theorem Approach to Bit-Parallel Polynomial Basis Multipliers for Irreducible Trinomials 343--352 P. Ren and X. Ren and S. Sane and M. A. Kinsy and N. Zheng A Deadlock-Free and Connectivity-Guaranteed Methodology for Achieving Fault-Tolerance in On-Chip Networks . . . . . . . . . . . . . . . . 353--366 J. Ma and G. Yan and Y. Han and X. Li An Analytical Framework for Estimating Scale-Out and Scale-Up Power Efficiency of Heterogeneous Manycores . . . . . . . 367--381 L. T. Clark and D. W. Patterson and C. Ramamurthy and K. E. Holbert An Embedded Microprocessor Radiation Hardened by Microarchitecture and Circuits . . . . . . . . . . . . . . . . 382--395 T. Fatt Tay and C. Chang A Non-Iterative Multiple Residue Digit Error Detection and Correction Algorithm in RRNS . . . . . . . . . . . . . . . . 396--408 K. Sakai and M. Sun and W. Ku and T. H. Lai A Novel Coding Scheme for Secure Communications in Distributed RFID Systems . . . . . . . . . . . . . . . . 409--421 J. Feliu and J. Sahuquillo and S. Petit and J. Duato Bandwidth-Aware On-Line Scheduling in SMT Multicores . . . . . . . . . . . . . 422--434 G. Zhang and G. Wu and S. Wang and J. Shu and W. Zheng and K. Li CaCo: An Efficient Cauchy Coding Approach for Cloud Storage Systems . . . 435--447 M. Yang and Y. Chang and T. Kuo and P. Huang Capacity-Independent Address Mapping for Flash Storage Devices with Explosively Growing Capacity . . . . . . . . . . . . 448--465 Q. Wu and B. Qin and L. Zhang and J. Domingo-Ferrer and O. Farras and J. A. Manjon Contributory Broadcast Encryption with Efficient Encryption and Short Ciphertexts . . . . . . . . . . . . . . 466--479 H. Kim and G. Kim and H. Yeo and J. Kim and S. Maeng Design and Analysis of Hybrid Flow Control for Hierarchical Ring Network-on-Chip . . . . . . . . . . . . 480--494 W. Zhang and A. M. K. Cheng and J. Subhlok DwarfCode: A Performance Prediction Tool for Parallel Applications . . . . . . . 495--507 D. Cheng and J. Rao and C. Jiang and X. Zhou Elastic Power-Aware Resource Provisioning of Heterogeneous Workloads in Self-Sustainable Datacenters . . . . 508--521 Y. Yang and Y. Huang and X. Ma and J. Lu Enabling Context-Awareness by Predicate Detection in Asynchronous Environments 522--534 A. Lukefahr and S. Padmanabha and R. Das and F. M. Sleiman and R. G. Dreslinski and T. F. Wenisch and S. Mahlke Exploring Fine-Grained Heterogeneity with Composite Cores . . . . . . . . . . 535--547 R. W. L. Coutinho and A. Boukerche and L. F. M. Vieira and A. A. F. Loureiro Geographic and Opportunistic Routing for Underwater Sensor Networks . . . . . . . 548--561 H. Yun and G. Yao and R. Pellizzoni and M. Caccamo and L. Sha Memory Bandwidth Management for Efficient Performance Isolation in Multi-Core Platforms . . . . . . . . . . 562--576 B. Wang and J. Chen and W. Liu and L. T. Yang Minimum Cost Placement of Bistatic Radar Sensors for Belt Barrier Coverage . . . 577--588 J. Jung and Y. Won \tt nvramdisk: A Transactional Block Device Driver for Non-Volatile RAM . . . 589--600 G. Yao and H. Yun and Z. P. Wu and R. Pellizzoni and M. Caccamo and L. Sha Schedulability Analysis for Memory Bandwidth Regulated Multicore Real-Time Systems . . . . . . . . . . . . . . . . 601--614 L. Kekely and J. Kucera and V. Pus and J. Korenek and A. V. Vasilakos Software Defined Monitoring of Application Protocols . . . . . . . . . 615--626 Y. Lu and J. Shu and J. Guo and P. Zhu Supporting System Consistency with Differential Transactions in Flash-Based SSDs . . . . . . . . . . . . . . . . . . 627--639 G. Paul and A. Chattopadhyay Three Snakes in One Hole: The First Systematic Hardware Accelerator Design for SOSEMANUK with Optional Serpent and SNOW 2.0 Modes . . . . . . . . . . . . . 640--653 S. Valadimas and Y. Tsiatouhas and A. Arapoyanni Timing Error Tolerance in Small Core Designs for SoC Applications . . . . . . 654--663 O. Acevedo and D. Kagaris On The Computation of LFSR Characteristic Polynomials for Built-In Deterministic Test Pattern Generation 664--669 K. Tsoumanis and N. Axelos and N. Moschopoulos and G. Zervakis and K. Pekmestzi Pre-Encoded Multipliers Based on Non-Redundant Radix-$4$ Signed-Digit Encoding . . . . . . . . . . . . . . . . 670--676
C. Bolchini and S. Kundu and S. Pontarelli Guest Editorial: \booktitleIEEE Transactions on Computers and \booktitleIEEE Transactions on Nanotechnology Joint Special Section on Defect and Fault Tolerance in VLSI and Nanotechnology Systems . . . . . . . . . 677--678 L. Huang and J. Wang and M. Ebrahimi and M. Daneshtalab and X. Zhang and G. Li and A. Jantsch Non-Blocking Testing for Network-on-Chip 679--692 P. M. Yaghini and A. Eghbal and S. S. Yazdi and N. Bagherzadeh and M. M. Green Capacitive and Inductive TSV-to-TSV Resilient Approaches for $3$D ICs . . . 693--705 M. Favalli and M. Dalpasso Boolean and Pseudo-Boolean Test Generation for Feedback Bridging Faults 706--715 G. Yan and F. Sun and H. Li and X. Li CoreRank: Redeeming ``Sick Silicon'' by Dynamically Quantifying Core-Level Healthy Condition . . . . . . . . . . . 716--729 M. Haghbayan and A. Rahmani and A. Miele and M. Fattah and J. Plosila and P. Liljeberg and H. Tenhunen A Power-Aware Approach for Online Test Scheduling in Many-Core Architectures 730--743 P. Bernardi and R. Cantoro and S. De Luca and E. Sanchez and A. Sansonetti Development Flow for On-Line Core Self-Test of Automotive Microcontrollers 744--754 A. Ferreron and D. Suarez-Gracia and J. Alastruey-Benede and T. Monreal-Arnal and P. Ibanez Concertina: Squeezing in Cache Content to Operate at Near-Threshold Voltage . . 755--769 B. Lin and C. Wu and M. Lee and H. Lin and C. Peng and M. Wang A Local Parallel Search Approach for Memory Failure Pattern Identification 770--780 W. Wei and K. Namba and Y. Kim and F. Lombardi A Novel Scheme for Tolerating Single Event/Multiple Bit Upsets (SEU/MBU) in Non-Volatile Memories . . . . . . . . . 781--790 D. A. G. de Oliveira and L. L. Pilla and T. Santini and P. Rech Evaluation and Mitigation of Radiation-Induced Soft Errors in Graphics Processing Units . . . . . . . 791--804 H. Zhang and H. Jiang and B. Li and F. Liu and A. V. Vasilakos and J. Liu A Framework for Truthful Online Auctions in Cloud Computing with Heterogeneous User Demands . . . . . . . . . . . . . . 805--818 V. Soteriou and T. Theocharides and E. Kakoulli A Holistic Approach Towards Intelligent Hotspot Prevention in Network-on-Chip-Based Multicores . . . . 819--833 A. Aminifar and E. Bini and P. Eles and Z. Peng Analysis and Design of Real-Time Servers for Control Applications . . . . . . . . 834--846 P. Liu and L. Fang and M. C. Huang and Q. Hu and G. Jiang Building Expressive and Area-Efficient Directories with Hybrid Representation and Adaptive Multi-Granular Tracking . . 847--859 K. Hu and H. K. Chandrikakutty and Z. Goodman and R. Tessier and T. Wolf Dynamic Hardware Monitors for Network Processor Protection . . . . . . . . . . 860--872 P. Ren and M. A. Kinsy and N. Zheng Fault-Aware Load-Balancing Routing for $2$D-Mesh and Torus On-Chip Network Topologies . . . . . . . . . . . . . . . 873--887 Y. Yin and L. Xie and J. Wu and S. Lu Focus and Shoot: Exploring Auto-Focus in RFID Tag Identification Towards a Specified Area . . . . . . . . . . . . . 888--901 J. Ahn and C. Seo and R. Mayuram and R. Yaseen and J. Kim and S. Maeng ForestDB: A Fast Key-Value Storage System for Variable-Length String Keys 902--915 W. Guo and K. Chen and H. Feng and Y. Wu and R. Zhang and W. Zheng Mobile Application Relaunching Speed-Up through Flash-Aware Page Swapping . . . 916--928 B. Tang and S. Yang and B. Ye and S. Guo and S. Lu Near-Optimal One-Sided Scheduling for Coded Segmented Network Coding . . . . . 929--939 J. Ahn and S. Yoo and K. Choi Prediction Hybrid Cache: An Energy-Efficient STT-RAM Cache Architecture . . . . . . . . . . . . . . 940--951 W. Jiang and J. Wu and F. Li and G. Wang and H. Zheng Trust Evaluation in Online Social Networks Using Generalized Network Flow 952--963 M. Fugger and T. Nowak and U. Schmid Unfaithful Glitch Propagation in Existing Binary Circuit Models . . . . . 964--978 N. D. P. Avirneni and P. K. Ramesh and A. K. Somani Utilization Aware Power Management in Reliable and Aggressive Chip Multi Processors . . . . . . . . . . . . . . . 979--991 J. Wu and X. Zhu and T. Li and X. Sui WBSP: A Novel Synchronization Mechanism for Architecture Parallel Simulation . . 992--1005
H. Asadi and P. Ienne and H. Sarbazi-Azad Guest Editors' Introduction: Special Section on Emerging Memory Technologies in Very Large Scale Computing and Storage Systems . . . . . . . . . . . . 1006--1009 R. Venkatesan and V. J. Kozhikkottu and M. Sharad and C. Augustine and A. Raychowdhury and K. Roy and A. Raghunathan Cache Design with Domain Wall Memory . . 1010--1024 P. M. Palangappa and J. Li and K. Mohanram WOM-Code Solutions for Low Latency and High Endurance in Phase Change Memory 1025--1040 Zhenyu Sun and Xiuyuan Bi and Wenqing Wu and Sungjoo Yoo and Hai (Helen) Li Array Organization and Data Management Exploration in Racetrack Memory . . . . 1041--1054 J. Wang and L. Wang and H. Yin and Z. Wei and Z. Yang and N. Gong cNV SRAM: CMOS Technology Compatible Non-Volatile SRAM Based Ultra-Low Leakage Energy Hybrid Memory System . . 1055--1067 E. Amat and A. Calomarde and F. Moll and R. Canal and A. Rubio Feasibility of Embedded DRAM Cells on FinFET Technology . . . . . . . . . . . 1068--1074 S. Lee and J. Kim Effective Lifetime-Aware Dynamic Throttling for NAND Flash-Based SSDs . . 1075--1089 R. S. Liu and M. Y. Chuang and C. L. Yang and C. H. Li and K. C. Ho and H. P. Li Improving Read Performance of NAND Flash SSDs by Exploiting Error Locality . . . 1090--1102 M. Jung Exploring Design Challenges in Getting Solid State Drives Closer to CPU . . . . 1103--1115 J. Kim and E. Lee and J. Choi and D. Lee and S. H. Noh Chip-Level RAID with Flexible Stripe Size and Parity Placement for Enhanced SSD Reliability . . . . . . . . . . . . 1116--1130 Y. Li and P. P. C. Lee and J. C. S. Lui Analysis of Reliability Dynamics of SSD RAID . . . . . . . . . . . . . . . . . . 1131--1144 E. Lee and H. Kang and H. Bahn and K. G. Shin Eliminating Periodic Flush Overhead of File I/O with Non-Volatile Buffer Cache 1145--1157 C. W. Liu and S. H. Ou and K. C. Chang and T. C. Lin and S. K. Chen A Low-Error, Cost-Efficient Design Procedure for Evaluating Logarithms to Be Used in a Logarithmic Arithmetic Processor . . . . . . . . . . . . . . . 1158--1164 X. Cui and W. Liu and X. Chen and E. E. Swartzlander and F. Lombardi A Modified Partial Product Generator for Redundant Binary Multipliers . . . . . . 1165--1171 L. Mashayekhy and M. M. Nejad and D. Grosu and A. V. Vasilakos An Online Mechanism for Resource Allocation and Pricing in Clouds . . . . 1172--1184 S. M. P. D. and H. Yu and H. Huang and D. Xu A Q-Learning Based Self-Adaptive I/O Communication for 2.5D Integrated Many-Core Microprocessor and Memory . . 1185--1196 M. Joldes and O. Marty and J. M. Muller and V. Popescu Arithmetic Algorithms for Extended Precision Using Floating-Point Expansions . . . . . . . . . . . . . . . 1197--1210 W. Jiang and J. Wu and G. Wang and H. Zheng Forming Opinions via Trusted Friends: Time-Evolving Rating Prediction Using Fluid Dynamics . . . . . . . . . . . . . 1211--1224 N. L. Or and X. Wang and D. Pao MEMORY-Based Hardware Architectures to Detect ClamAV Virus Signatures with Restricted Regular Expression Features 1225--1238 D. Nikolov and E. Larsson Optimizing the Level of Confidence for Multiple Jobs . . . . . . . . . . . . . 1239--1252 S. Lee and W. W. Ro Parallel GPU Architecture Simulation Framework Exploiting Architectural-Level Parallelism with Timing Error Prediction 1253--1265 Y. Gu and C. Q. Wu Performance Analysis and Optimization of Distributed Workflows in Heterogeneous Network Environments . . . . . . . . . . 1266--1282 G. Mingas and C. S. Bouganis Population-Based MCMC on Multi-Core CPUs, GPUs and FPGAs . . . . . . . . . . 1283--1296 T. H. Tsai and L. F. Fan and Y. S. Chen and T. S. Yao Triple Speed: Energy-Aware Real-Time Task Synchronization in Homogeneous Multi-Core Systems . . . . . . . . . . . 1297--1309 B. K. Saha and S. Misra and S. Pal Utility-Based Exploration for Performance Enhancement in Opportunistic Mobile Networks . . . . . . . . . . . . 1310--1322 R. G. Kim and W. Choi and G. Liu and E. Mohandesi and P. P. Pande and D. Marculescu and R. Marculescu Wireless NoC for VFI-Enabled Multicore Chip Design: Performance Evaluation and Design Trade-Offs . . . . . . . . . . . 1323--1336
L. Wang and S. Hu and G. Betis and R. Ranjan A Computing Perspective on Smart City [Guest Editorial] . . . . . . . . . . . 1337--1338 Y. Li and W. Dai and Z. Ming and M. Qiu Privacy Protection for Preventing Data Over-Collection in Smart City . . . . . 1339--1350 Q. Zhang and L. T. Yang and Z. Chen Privacy Preserving Deep Computation Model on Cloud for Big Data Feature Learning . . . . . . . . . . . . . . . . 1351--1362 I. L. Santos and L. Pirmez and L. R. Carmo and P. F. Pires and F. C. Delicato and S. U. Khan and A. Y. Zomaya A Decentralized Damage Detection System for Wireless Sensor and Actuator Networks . . . . . . . . . . . . . . . . 1363--1376 Z. Ding and B. Yang and Y. Chi and L. Guo Enabling Smart Transportation Systems: A Parallel Spatio-Temporal Database Approach . . . . . . . . . . . . . . . . 1377--1391 T. Wei and Q. Zhu and N. Yu Proactive Demand Participation of Smart Buildings in Smart Grid . . . . . . . . 1392--1406 J. Huang and Y. Deng and Q. Yang and J. Sun An Energy-Efficient Train Control Framework for Smart Railway Transportation . . . . . . . . . . . . . 1407--1417 S. Yu and W. Zhou and S. Guo and M. Guo A Feasible IP Traceback Framework through Dynamic Deterministic Packet Marking . . . . . . . . . . . . . . . . 1418--1427 X. Zheng and J. Wang and W. Dong and Y. He and Y. Liu Bulk Data Dissemination in Wireless Sensor Networks: Analysis, Implications and Improvement . . . . . . . . . . . . 1428--1439 L. Yang and J. Cao and G. Liang and X. Han Cost Aware Service Placement and Load Dispatching in Mobile Cloud Systems . . 1440--1452 M. A. Skitsas and C. A. Nicopoulos and M. K. Michael DaemonGuard: Enabling O/S-Orchestrated Fine-Grained Software-Based Selective-Testing in Multi-/Many-Core Microprocessors . . . . . . . . . . . . 1453--1466 Y. M. Chang and Y. H. Chang and T. W. Kuo and Y. C. Li and H. P. Li Disturbance Relaxation for $3$D Flash Memory . . . . . . . . . . . . . . . . . 1467--1483 J. Luis Nunez-Yanez and M. Hosseinabady and A. Beldachi Energy Optimization in Commercial FPGAs with Voltage, Frequency and Logic Scaling . . . . . . . . . . . . . . . . 1484--1493 W. Li and Y. Yang and D. Yuan Ensuring Cloud Data Reliability with Minimum Replication by Proactive Replica Checking . . . . . . . . . . . . . . . . 1494--1506 Y. H. Gong and S. W. Chung Exploiting Refresh Effect of DRAM Read Operations: A Practical Approach to Low-Power Refresh . . . . . . . . . . . 1507--1517 J. Lee and H. Roh and S. Park External Mergesort for Flash-Based Solid State Drives . . . . . . . . . . . . . . 1518--1527 K. Xie and X. Wang and X. Liu and J. Wen and J. Cao Interference-Aware Cooperative Communication in Multi-Radio Multi-Channel Wireless Networks . . . . 1528--1542 N. Altiparmak and A. S. Tosun Multithreaded Maximum Flow Based Optimal Replica Selection Algorithm for Heterogeneous Storage Architectures . . 1543--1557 J. H. Mun and H. Lim New Approach for Efficient IP Address Lookup Using a Bloom Filter in Trie-Based Algorithms . . . . . . . . . 1558--1565 W. Zhang and Y. Lin and S. Xiao and J. Wu and S. Zhou Privacy Preserving Ranked Multi-Keyword Search for Multiple Data Owners in Cloud Computing . . . . . . . . . . . . . . . 1566--1577 H. Wang and Y. Li and D. Jin and P. Hui and J. Wu Saving Energy in Partially Deployed Software Defined Networks . . . . . . . 1578--1592 A. Biondi and G. C. Buttazzo and M. Bertogna Schedulability Analysis of Hierarchical Real-Time Systems under Shared Resources 1593--1605 H. Chen and H. Jin and L. Guo Sink-Free Audio-on-Demand over Wireless Sensor Networks . . . . . . . . . . . . 1606--1618 T. Liu and Y. Zhu and Q. Zhang and A. Vasilakos Stochastic Optimal Control for Participatory Sensing Systems with Heterogeneous Requests . . . . . . . . . 1619--1631 J. Li and J. J. Chen and M. Xiong and G. Li and W. Wei Temporal Consistency Maintenance Upon Partitioned Multiprocessor Platforms . . 1632--1645 Yu Li and Albert Mo Kim Cheng Transparent Real-Time Task Scheduling on Temporal Resource Partitions . . . . . . 1646--1655 Pejman Lotfi-Kamran and Mehdi Modarressi and Hamid Sarbazi-Azad An Efficient Hybrid-Switched Network-on-Chip for Chip Multiprocessors 1656--1662 Fan Li and Zhiyuan Yin and Shaojie Tang and Yu Cheng and Yu Wang Optimization Problems in Throwbox-Assisted Delay Tolerant Networks: Which Throwboxes to Activate? How Many Active Ones I Need? . . . . . . 1663--1670 Alberto Nannarelli Performance/Power Space Exploration for Binary64 Division Units . . . . . . . . 1671--1677
Mojtaba Tarihi and Hossein Asadi and Alireza Haghdoost and Mohammad Arjomand and Hamid Sarbazi-Azad A Hybrid Non-Volatile Cache Design for Solid-State Drives Using Comprehensive I/O Characterization . . . . . . . . . . 1678--1691 Wen Xia and Hong Jiang and Dan Feng and Lei Tian DARE: A Deduplication-Aware Resemblance Detection and Elimination Scheme for Data Reduction with Low Overheads . . . 1692--1705 Yuqi Lin and Saif U. R. Malik and Kashif Bilal and Qiusong Yang and Yongji Wang and Samee U. Khan Designing and Modeling of Covert Channels in Operating Systems . . . . . 1706--1719 Dongwook Kim and Youjip Won and Jaehyuk Cha and Sungroh Yoon and Jongmoo Choi and Sooyong Kang Exploiting Compression-Induced Internal Fragmentation for Power-Off Recovery in SSD . . . . . . . . . . . . . . . . . . 1720--1733 Ebrahim A. Hasan Abdulrahman and Arash Reyhani-Masoleh High-Speed Hybrid-Double Multiplication Architectures Using New Serial-Out Bit-Level Mastrovito Multipliers . . . . 1734--1747 Walid Ibrahim Identifying the Worst Reliability Input Vectors and the Associated Critical Logic Gates . . . . . . . . . . . . . . 1748--1760 Timo Bartkewitz Leakage Prototype Learning for Profiled Differential Side-Channel Cryptanalysis 1761--1774 Bo Mao and Hong Jiang and Suzhen Wu and Lei Tian Leveraging Data Deduplication to Improve the Performance of Primary Storage Systems in the Cloud . . . . . . . . . . 1775--1788 Hesam Shabani and Arman Roohi and Akram Reza and Midia Reshadi and Nader Bagherzadeh and Ronald F. DeMara Loss-Aware Switch Design and Non-Blocking Detection Algorithm for Intra-Chip Scale Photonic Interconnection Networks . . . . . . . . 1789--1801 Chenxi Qiu and Haiying Shen and Lei Yu and Sohraab Soltani Low-Latency Multi-Flow Cooperative Broadcast in Fading Wireless Networks 1802--1815 Ruijun Wang and Pengju Shang and Junyao Zhang and Qingdong Wang and Ting Liu and Jun Wang MAR: A Novel Power Management for CMP Systems in Data-Intensive Environment 1816--1830 Tseng-Yi Chen and Yuan-Hao Chang and Ming-Chang Yang and Yun-Jhu Chen and Hsin-Wen Wei and Wei-Kuan Shih Multi-Grained Block Management to Enhance the Space Utilization of File Systems on PCM Storages . . . . . . . . 1831--1845 Boyang Du and Matteo Sonza Reorda and Luca Sterpone and Luis Parra and Marta Portela-García and Almudena Lindoso and Luis Entrena Online Test of Control Flow Errors: A New Debug Interface-Based Approach . . . 1846--1855 Alexandru Turcu and Roberto Palmieri and Binoy Ravindran On Open Nesting in Distributed Transactional Memory . . . . . . . . . . 1856--1868 Matthias Sauer and Bernd Becker and Ilia Polian PHAETON: A SAT-Based Framework for Timing-Aware Path Sensitization . . . . 1869--1881 Sven Goossens and Karthik Chandrasekar and Benny Akesson and Kees Goossens Power/Performance Trade-Offs in Real-Time SDRAM Command Scheduling . . . 1882--1895 Huai Liu and Tsong Yueh Chen Randomized Quasi-Random Testing . . . . 1896--1909 Wen-Hsing Kuo and Yung-Hsuan Lin Resource-Saving File Management Scheme for Online Video Provisioning on Content Delivery Networks . . . . . . . . . . . 1910--1920 Lei Liu and Yong Li and Chen Ding and Hao Yang and Chengyong Wu Rethinking Memory Management in Modern Operating System: Horizontal, Vertical or Random? . . . . . . . . . . . . . . . 1921--1935 Fei Chen and Tao Xiang and Yuanyuan Yang and Sherman S. M. Chow Secure Cloud Storage Meets with Secure Network Coding . . . . . . . . . . . . . 1936--1948 Vimalraj Venkatesan and Y. C. Tay and Qingsong Wei Sizing Cleancache Allocation for Virtual Machines' Transcendent Memory . . . . . 1949--1963 Maomeng Su and Lei Zhang and Yongwei Wu and Kang Chen and Keqin Li Systematic Data Placement Optimization in Multi-Cloud Storage for Complex Requirements . . . . . . . . . . . . . . 1964--1977 Goutam Mali and Sudip Misra TRAST: Trust-Based Distributed Topology Management for Wireless Multimedia Sensor Networks . . . . . . . . . . . . 1978--1991 Joseph K. Liu and Kaitai Liang and Willy Susilo and Jianghua Liu and Yang Xiang Two-Factor Data Security Protection Mechanism for Cloud Storage System . . . 1992--2004 Kazuteru Namba and Fabrizio Lombardi Single Multiscale-Symbol Error Correction Codes for Multiscale Storage Systems . . . . . . . . . . . . . . . . 2005--2009 L. Yavits and A. Morad and R. Ginosar The Effect of Temperature on Amdahl Law in $3$D Multicore Era . . . . . . . . . 2010--2013
Paolo Montuschi and Edward J. McCluskey and Samarjit Chakraborty and Jason Cong and Ramón M. Rodríguez-Dagnino and Fred Douglis and Lieven Eeckhout and Gernot Heiser and Sushil Jajodia and Ruby B. Lee and Dinesh Manocha and Tomás F. Pena and Isabelle Puaut and Hanan Samet and Donatella Sciuto State of the Journal . . . . . . . . . . 2014--2018 Lazaros Papadopoulos and Ivan Walulya and Philippas Tsigas and Dimitrios Soudris A Systematic Methodology for Optimization of Applications Utilizing Concurrent Data Structures . . . . . . . 2019--2031 Nicolas Brisebarre and Christoph Lauter and Marc Mezzarobba and Jean-Michel Muller Comparison between Binary and Decimal Floating-Point Numbers . . . . . . . . . 2032--2044 Gert-Jan van den Braak and Juan Gómez-Luna and José María González-Linares and Henk Corporaal and Nicolás Guil Configurable XOR Hash Functions for Banked Scratchpad Memories in GPUs . . . 2045--2058 Mingsong Chen and Xinqian Zhang and Geguang Pu and Xin Fu and Prabhat Mishra Efficient Resource Constrained Scheduling Using Parallel Structure-Aware Pruning Techniques . . . 2059--2073 Thierry P. Berger and Julien Francq and Marine Minier and Gaël Thomas Extended Generalized Feistel Networks Using Matrix Representation to Propose a New Lightweight Block Cipher: Lilliput 2074--2089 Peyman Teymoori and Khosrow Sohraby and Kiseon Kim Fair Flow Control and Fairness Evaluation in Computer Networks and Systems . . . . . . . . . . . . . . . . 2090--2103 Xiaofeng Gao and Yongtian Yang and Guihai Chen and Xin Lu and Jiaofei Zhong Global Optimization for Multi-Channel Wireless Data Broadcast with AH-Tree Indexing Scheme . . . . . . . . . . . . 2104--2117 Dawei Gong and Yuanyuan Yang Link-Layer Multicast in Large-Scale 802.11n Wireless LANs with Smart Antennas . . . . . . . . . . . . . . . . 2118--2133 Yangbing Wu and Jianfeng Zhao and Deming Chen and Donghui Guo Modeling of Gaussian Network-Based Reconfigurable Network-on-Chip Designs 2134--2142 Dipanwita Gangopadhyay and Arash Reyhani-Masoleh Multiple-Bit Parity-Based Concurrent Fault Detection Architecture for Parallel CRC Computation . . . . . . . . 2143--2157 Javier Hormigo and Julio Villalba New Formats for Computing with Real-Numbers under Round-to-Nearest . . 2158--2168 Jun Yang and Qingsong Wei and Chundong Wang and Cheng Chen and Khai Leong Yong and Bingsheng He NV-Tree: A Consistent and Workload-Adaptive Tree Structure for Non-Volatile Memory . . . . . . . . . . 2169--2183 Jidong Zhai and Wenguang Chen and Weimin Zheng and Keqin Li Performance Prediction for Large-Scale Parallel Applications Using Representative Replay . . . . . . . . . 2184--2198 Matteo Dell'Amico and Damiano Carra and Pietro Michiardi PSBS: Practical Size-Based Scheduling 2199--2212 Wongyu Shin and Jungwhan Choi and Jaemin Jang and Jinwoong Suh and Yongkee Kwon and Youngsuk Moon and Hongsik Kim and Lee-Sup Kim Q-DRAM: Quick-Access DRAM with Decoupled Restoring from Row-Activation . . . . . 2213--2227 Ahmed Hassan and Roberto Palmieri and Binoy Ravindran Remote Transaction Commit: Centralizing Software Transactional Memory Commits 2228--2240 Ritesh Parikh and Valeria Bertacco Resource Conscious Diagnosis and Reconfiguration for NoC Permanent Faults 2241--2256 Yu-Chieh Cheng and Pi-Chung Wang Scalable Multi-Match Packet Classification Using TCAM and SRAM . . . 2257--2269 Rakan Maddah and Sangyeun Cho and Rami Melhem Symbol Shifting: Tolerating More Faults in PCM Blocks . . . . . . . . . . . . . 2270--2283 Panagiota Papavramidou and Michael Nicolaidis Test Algorithms for ECC-Based Memory Repair in Ultimate CMOS and Post-CMOS 2284--2298 Lena Mashayekhy and Nathan Fisher and Daniel Grosu Truthful Mechanisms for Competitive Reward-Based Scheduling . . . . . . . . 2299--2312 Keni Qiu and Qingan Li and Jingtong Hu and Weigong Zhang and Chun Jason Xue Write Mode Aware Loop Tiling for High Performance Low Power Volatile PCM in Embedded Systems . . . . . . . . . . . . 2313--2324 Shaohua Tang and Xiaoyu Li and Xinyi Huang and Yang Xiang and Lingling Xu Achieving Simple, Secure and Efficient Hierarchical Access Control in Cloud Computing . . . . . . . . . . . . . . . 2325--2331 Irith Pomeranz Improving the Accuracy of Defect Diagnosis with Multiple Sets of Candidate Faults . . . . . . . . . . . . 2332--2338 Yiorgos Sfikas and Yiorgos Tsiatouhas Testing Neighbouring Cell Leakage and Transition Induced Faults in DRAMs . . . 2339--2345
Fatos Xhafa and Vincenzo Loia Guest Editorial for Special Section on Advanced Techniques for Efficient and Reliable Cloud Storage . . . . . . . . . 2346--2347 Christian Esposito and Massimo Ficco and Francesco Palmieri and Aniello Castiglione Smart Cloud Storage Service Selection Based on Fuzzy Logic, Theory of Evidence and Game Theory . . . . . . . . . . . . 2348--2362 Tao Jiang and Xiaofeng Chen and Jianfeng Ma Public Integrity Auditing for Shared Dynamic Cloud Data with Group User Revocation . . . . . . . . . . . . . . . 2363--2373 Baojiang Cui and Zheli Liu and Lingyu Wang Key-Aggregate Searchable Encryption (KASE) for Group Data Sharing via Cloud Storage . . . . . . . . . . . . . . . . 2374--2385 Jingwei Li and Jin Li and Dongqing Xie and Zhang Cai Secure Auditing and Deduplicating Data in Cloud . . . . . . . . . . . . . . . . 2386--2396 Mehrtash Manoochehri and Michel Dubois Accurate Model for Application Failure Due to Transient Faults in Caches . . . 2397--2410 Cong Wang and Ji Li and Fan Ye and Yuanyuan Yang A Mobile Data Gathering Framework for Wireless Rechargeable Sensor Networks with Vehicle Movement Costs and Capacity Constraints . . . . . . . . . . . . . . 2411--2427 Detian Zhang and Chi-Yin Chow and Qing Li and Xinming Zhang and Yinlong Xu A Spatial Mashup Service for Efficient Evaluation of Concurrent $k$-NN Queries 2428--2442 Zhen Wang and Mark Karpovsky and Lake Bu Design of Reliable and Secure Devices Realizing Shamir's Secret Sharing . . . 2443--2455 Peng Guo and Xuefeng Liu and Shaojie Tang and Jiannong Cao Enabling Coverage-Preserving Scheduling in Wireless Sensor Networks for Structural Health Monitoring . . . . . . 2456--2469 Fei Xu and Fangming Liu and Hai Jin Heterogeneity and Interference-Aware Virtual Machine Provisioning for Predictable Performance in the Cloud . . 2470--2483 Hayssam El-Razouk and Arash Reyhani-Masoleh New Architectures for Digit-Level Single, Hybrid-Double, Hybrid-Triple Field Multiplications and Exponentiation Using Gaussian Normal Bases . . . . . . 2495--2509 Lei Yu and Fei Teng and Frédéric Magoul\`es Node Scaling Analysis for Power-Aware Real-Time Tasks Scheduling . . . . . . . 2510--2521 Linbin Chen and Jie Han and Weiqiang Liu and Fabrizio Lombardi On the Design of Approximate Restoring Dividers for Error-Tolerant Applications 2522--2533 K. Raghavendra and Biswabandan Panda and Madhu Mutyam PBC: Prefetched Blocks Compaction . . . 2534--2547 Alejandro Nieto and David L. Vilariño and Victor M. Brea PRECISION: A Reconfigurable SIMD/MIMD Coprocessor for Computer Vision Systems-on-Chip . . . . . . . . . . . . 2548--2561 Lei Zhang and Chuanyan Hu and Qianhong Wu and Josep Domingo-Ferrer and Bo Qin Privacy-Preserving Vehicular Communication Authentication with Hierarchical Aggregation and Fast Response . . . . . . . . . . . . . . . . 2562--2574 Sanjay Bhattacherjee and Palash Sarkar Reducing Communication Overhead of the Subset Difference Scheme . . . . . . . . 2575--2587 Juan Chen and Yuhua Tang and Yong Dong and Jingling Xue and Zhiyuan Wang and Wenhao Zhou Reducing Static Energy in Supercomputer Interconnection Networks Using Topology-Aware Partitioning . . . . . . 2588--2602 Wuhui Chen and Incheon Paik and Zhenni Li Tology-Aware Optimal Data Placement Algorithm for Network Traffic Optimization . . . . . . . . . . . . . . 2603--2617 Chundong Wang and Weng-Fai Wong TreeFTL: An Efficient Workload-Adaptive Algorithm for RAM Buffer Management of NAND Flash-Based Devices . . . . . . . . 2618--2630 Stefan Bieschewski and Joan-Manuel Parcerisa and Antonio González An Energy-Efficient Memory Unit for Clustered Microarchitectures . . . . . . 2631--2637 Honglan Jiang and Jie Han and Fei Qiao and Fabrizio Lombardi Approximate Radix-8 Booth Multipliers for Low-Power and High-Performance Operation . . . . . . . . . . . . . . . 2638--2644 Rafael Garibotti and Anastasiia Butko and Luciano Ost and Abdoulaye Gamatié and Gilles Sassatelli and Chris Adeniyi-Jones Efficient Embedded Software Migration towards Clusterized Distributed-Memory Architectures . . . . . . . . . . . . . 2645--2651 Viacheslav V. Fedorov and Monther Abusultan and Sunil P. Khatri FTCAM: An Area-Efficient Flash-Based Ternary CAM Design . . . . . . . . . . . 2652--2658 Irith Pomeranz $ L F S R $-Based Generation of Partially-Functional Broadside Tests . . 2659--2664 Zhiguang Chen and Nong Xiao and Yutong Lu and Fang Liu Me-CLOCK: A Memory-Efficient Framework to Implement Replacement Policies for Large Caches . . . . . . . . . . . . . . 2665--2671 Christopher Fritz and Adly T. Fam Interlaced Partition Multiplier . . . . 2672--2677
Christos Ttofis and Christos Kyrkou and Theocharis Theocharides A Low-Cost Real-Time Embedded Stereo Vision System for Accurate Disparity Estimation Based on Guided Image Filtering . . . . . . . . . . . . . . . 2678--2693 Sara Vinco and Valerio Guarnieri and Franco Fummi Code Manipulation for Virtual Platform Integration . . . . . . . . . . . . . . 2694--2708 Omer Y. Adam and Young Choon Lee and Albert Y. Zomaya Constructing Performance-Predictable Clusters with Performance-Varying Resources of Clouds . . . . . . . . . . 2709--2724 Kalikinkar Mandal and Guang Gong Feedback Reconstruction and Implementations of Pseudorandom Number Generators from Composited De Bruijn Sequences . . . . . . . . . . . . . . . 2725--2738 Gang Yao and Rodolfo Pellizzoni and Stanley Bak and Heechul Yun and Marco Caccamo Global Real-Time Memory-Centric Scheduling for Multicore Systems . . . . 2739--2751 Yusuke Suzuki and Shinpei Kato and Hiroshi Yamada and Kenji Kono GPUvm: GPU Virtualization at the Hypervisor . . . . . . . . . . . . . . . 2752--2766 Dong Xiang and Krishnendu Chakrabarty and Hideo Fujiwara Multicast-Based Testing and Thermal-Aware Test Scheduling for $3$D ICs with a Stacked Network-on-Chip . . . 2767--2779 Xiaohang Wang and Baoxin Zhao and Terrence Mak and Mei Yang and Yingtao Jiang and Masoud Daneshtalab On Fine-Grained Runtime Power Budgeting for Networks-on-Chip Systems . . . . . . 2780--2793 Xiaolin Cao and Ciara Moore and Máire O'Neill and Elizabeth O'Sullivan and Neil Hanley Optimised Multiplication Architectures for Accelerating Fully Homomorphic Encryption . . . . . . . . . . . . . . . 2794--2806 Tobias Distler and Christian Cachin and Rüdiger Kapitza Resource-Efficient Byzantine Fault Tolerance . . . . . . . . . . . . . . . 2807--2819 Anjan Kumar Pudi N S and Maryam Shojaei Baghini Robust Soft Error Tolerant CMOS Latch Configurations . . . . . . . . . . . . . 2820--2834 Victor Dumitriu and Lev Kirischian and Valeri Kirischian Run-Time Recovery Mechanism for Transient and Permanent Hardware Faults Based on Distributed, Self-Organized Dynamic Partially Reconfigurable Systems 2835--2847 Alhassan Khedr and Glenn Gulak and Vinod Vaikuntanathan SHIELD: Scalable Homomorphic Implementation of Encrypted Data-Classifiers . . . . . . . . . . . . 2848--2858 Marek Parfieniuk and Sang Yoon Park Sparse-Iteration $4$D CORDIC Algorithms for Multiplying Quaternions . . . . . . 2859--2871 Ming-Chang Yang and Yuan-Hao Chang and Tei-Wei Kuo Virtual Flash Chips: Reinforcing the Hardware Abstraction Layer to Improve Data Recoverability of Flash Devices . . 2872--2883 Liang-Cheng Ye and Jia-Rong Liang and Hai-Xiang Lin A Fast Pessimistic Diagnosis Algorithm for Hypercube-Like Networks under the Comparison Model . . . . . . . . . . . . 2884--2888 Luca Amarú and Pierre-Emmanuel Gaillardon and Anupam Chattopadhyay and Giovanni De Micheli A Sound and Complete Axiomatization of Majority-Logic . . . . . . . . . . . . . 2889--2895 Liang Wang and Xiaohang Wang and Terrence Mak Adaptive Routing Algorithms for Lifetime Reliability Optimization in Network-on-Chip . . . . . . . . . . . . 2896--2902 Binglong Chen and Chang-An Zhao An Improvement of the Elliptic Net Algorithm . . . . . . . . . . . . . . . 2903--2909 Jiao Zhang and Fengyuan Ren and Ran Shu and Tao Huang and Yunjie Liu Guaranteeing Delay of Live Virtual Machine Migration by Determining and Provisioning Appropriate Bandwidth . . . 2910--2917 William R. Trost and Guangwu Xu On the Optimal Pre-Computation of Window NAF for Koblitz Curves . . . . . . . . . 2918--2924 Aydin Aysu and Patrick Schaumont Precomputation Methods for Hash-Based Signatures on Energy-Harvesting Platforms . . . . . . . . . . . . . . . 2925--2931 Mustafa Demirci and Pedro Reviriego and Juan Antonio Maestro Unequal Error Protection Codes Derived from Double Error Correction Orthogonal Latin Square Codes . . . . . . . . . . . 2932--2938 Yogachandran Rahulamathavan and Suresh Veluru and Jinguang Han and Fei Li and Muttukrishnan Rajarajan and Rongxing Lu User Collusion Avoidance Scheme for Privacy-Preserving Decentralized Key-Policy Attribute-Based Encryption 2939--2946
Intae Kim and Seong Oun Hwang and Jong Hwan Park and Chanil Park An Efficient Predicate Encryption with Constant Pairing Computations and Minimum Costs . . . . . . . . . . . . . 2947--2958 Edwin H.-M. Sha and Xianzhang Chen and Qingfeng Zhuge and Liang Shi and Weiwen Jiang A New Design of In-Memory File System Based on File Virtual Address Framework 2959--2972 Panagiotis Sakellariou and Vassilis Paliouras Application-Specific Low-Power Multipliers . . . . . . . . . . . . . . 2973--2985 Mohammed A. Ambusaidi and Xiangjian He and Priyadarsi Nanda and Zhiyuan Tan Building an Intrusion Detection System Using a Filter-Based Feature Selection Algorithm . . . . . . . . . . . . . . . 2986--2998 Seokin Hong and Soontae Kim Designing a Resilient L1 Cache Architecture to Process Variation-Induced Access-Time Failures 2999--3012 Jun Suzuki and Yoichi Hidaka and Junichi Higuchi and Yuki Hayashi and Masaki Kan and Takashi Yoshikawa Disaggregation and Sharing of I/O Devices in Cloud Data Centers . . . . . 3013--3026 Wongyu Shin and Jungwhan Choi and Jaemin Jang and Jinwoong Suh and Youngsuk Moon and Yongkee Kwon and Lee-Sup Kim DRAM-Latency Optimization Inspired by Relationship between Row-Access Time and Refresh Timing . . . . . . . . . . . . . 3027--3040 Bernhard Egger and Younghyun Cho and Changyeon Jo and Eunbyun Park and Jaejin Lee Efficient Checkpointing of Live Virtual Machines . . . . . . . . . . . . . . . . 3041--3054 Ahmad Alzahrani and Ronald F. DeMara Fast Online Diagnosis and Recovery of Reconfigurable Logic Fabrics Using Design Disjunction . . . . . . . . . . . 3055--3069 Yuan-Cheng Lee and Chih-Wen Hsueh Hardware/Software Co-Design of Memory Page Translation for Mobile Virtualization . . . . . . . . . . . . . 3070--3082 Weihua Zhang and Shiqiang Yu and Haojun Wang and Zhuofang Dai and Haibo Chen Hardware Support for Concurrent Detection of Multiple Concurrency Bugs on Fused CPU--GPU Architectures . . . . 3083--3095 Ewerton R. Andrade and Marcos A. Simplicio and Paulo S. L. M. Barreto and Paulo C. F. dos Santos Lyra2: Efficient Password Hashing with High Security against Time-Memory Trade-Offs . . . . . . . . . . . . . . . 3096--3108 Tung-Wei Kuo and Kate Ching-Ju Lin and Ming-Jer Tsai On the Construction of Data Aggregation Tree with Minimum Energy Cost in Wireless Sensor Networks: NP-Completeness and Approximation Algorithms . . . . . . . . . . . . . . . 3109--3121 Di Zhu and Lizhong Chen and Siyu Yue and Timothy M. Pinkston and Massoud Pedram Providing Balanced Mapping for Multiple Applications in Many-Core Chip Multiprocessors . . . . . . . . . . . . 3122--3135 Anastasios Psarras and Ioannis Seitanidis and Chrysostomos Nicopoulos and Giorgos Dimitrakopoulos ShortPath: A Network-on-Chip Router with Fine-Grained Pipeline Bypassing . . . . 3136--3147 Andrea Ferrara and Paolo Liberatore and Marco Schaerf The Size of BDDs and Other Data Structures in Temporal Logics Model Checking . . . . . . . . . . . . . . . . 3148--3156 Limei Lin and Li Xu and Shuming Zhou and Sun-Yuan Hsieh The $ t / k $-Diagnosability for Regular Networks . . . . . . . . . . . . . . . . 3157--3170 Jinzhao Liu and Yuezhi Zhou and Di Zhang TranSim: A Simulation Framework for Cache-Enabled Transparent Computing Systems . . . . . . . . . . . . . . . . 3171--3183 Xiaofeng Chen and Jin Li and Jian Weng and Jianfeng Ma and Wenjing Lou Verifiable Computation over Large Database with Incremental Updates . . . 3184--3195 Christopher Babecki and Wenchao Qian and Somnath Paul and Robert Karam and Swarup Bhunia An Embedded Memory-Centric Reconfigurable Hardware Accelerator for Security Applications . . . . . . . . . 3196--3202 Carlos Garcia-Vega and Sonia Gonzalez-Navarro and Pedro Balboa-La Chica and Julio Villalba-Moreno Decimal Multiformat Online Addition . . 3203--3209 Yebin Lee and Soontae Kim RAMS: DRAM Rank-Aware Memory Scheduling for Energy Saving . . . . . . . . . . . 3210--3216 Rui Wang and William N. N. Hung and Guowu Yang and Xiaoyu Song Uncertainty Model for Configurable Hardware/Software and Resource Partitioning . . . . . . . . . . . . . . 3217--3223
Edin Kadric and Paul Gurniak and André DeHon Accurate Parallel Floating-Point Accumulation . . . . . . . . . . . . . . 3224--3238 Can Kìzìlkale and Ömer E\ugecio\uglu and Çetin Kaya Koç A Matrix Decomposition Method for Optimal Normal Basis Multiplication . . 3239--3250 Alberto A. Del Barrio and Román Hermida and Seda Ogrenci Memik A Partial Carry-Save On-the-Fly Correction Multispeculative Multiplier 3251--3264 Ronak Salamat and Misagh Khayambashi and Masoumeh Ebrahimi and Nader Bagherzadeh A Resilient Routing Algorithm with Formal Reliability Analysis for Partially Connected 3D-NoCs . . . . . . 3265--3279 Jaesung Park and Heejung Byun and Jung-Ryun Lee Bio-Inspired Load-Balancing Framework for Loosely Coupled Heterogeneous Server Systems . . . . . . . . . . . . . . . . 3280--3292 Jie Lu and Naveen Verma and Niraj K. Jha Compressed Signal Processing on Nyquist-Sampled Signals . . . . . . . . 3293--3303 Zhihong Liu and Qi Zhang and Reaz Ahmed and Raouf Boutaba and Yaping Liu and Zhenghu Gong Dynamic Resource Allocation for MapReduce with Partitioning Skew . . . . 3304--3317 Lilian Bossuet and Nilanjan Datta and Cuauhtemoc Mancillas-López and Mridul Nandi ELmD: A Pipelineable Authenticated Encryption and Its Hardware Implementation . . . . . . . . . . . . . 3318--3331 Meltem Ozsoy and Khaled N. Khasawneh and Caleb Donovick and Iakov Gorelik and Nael Abu-Ghazaleh and Dmitry Ponomarev Hardware-Based Malware Detection Using Low-Level Architectural Features . . . . 3332--3344 Seyed Mohammad Seyedzadeh and Rakan Maddah and Donald Kline and Alex K. Jones and Rami Melhem Improving Bit Flip Reduction for Biased and Random Data . . . . . . . . . . . . 3345--3356 Zoltán Ádám Mann Multicore-Aware Virtual Machine Placement in Cloud Data Centers . . . . 3357--3369 Robert M. Hierons and Uraz Cengiz Türker Parallel Algorithms for Generating Harmonised State Identifiers and Characterising Sets . . . . . . . . . . 3370--3383 Junghoon Lee and Taehoon Kim and Jaehyuk Huh Reducing the Memory Bandwidth Overheads of Hardware Security Support for Multi-Core Processors . . . . . . . . . 3384--3397 Muhammad Shafique and Anton Ivanov and Benjamin Vogel and Jörg Henkel Scalable Power Management for On-Chip Systems with Malleable Applications . . 3398--3412 Saiyu Qi and Yuanqing Zheng and Mo Li and Li Lu and Yunhao Liu Secure and Private RFID-Enabled Third-Party Supply Chain Systems . . . . 3413--3426 Guangyu Sun and Chao Zhang and Peng Li and Tao Wang and Yiran Chen Statistical Cache Bypassing for Non-Volatile Memory . . . . . . . . . . 3427--3440 Kuan-Hsun Chen and Jian-Jia Chen and Florian Kriebel and Semeen Rehman and Muhammad Shafique and Jörg Henkel Task Mapping for Redundant Multithreading in Multi-Cores with Reliability and Performance Heterogeneity . . . . . . . . . . . . . 3441--3455 Syed M. A. H. Jafri and Masoud Daneshtalab and Naeem Abbas and Guillermo Serrano Leon and Ahmed Hemani TransMap: Transformation Based Remapping and Parallelism for High Utilization and Energy Efficiency in CGRAs . . . . . . . 3456--3469 Taras Iakymchuk and Alfredo Rosado-Muñoz and Manuel Bataller Mompéan and José Vicente Francés Víllora and Emmanuel Ovie Osimiry Versatile Direct and Transpose Matrix Multiplication with Chained Operations: An Optimized Architecture Using Circulant Matrices . . . . . . . . . . . 3470--3479 Qi Zhang and Ling Liu Workload Adaptive Shared Memory Management for High Performance Network I/O in Virtualized Cloud . . . . . . . . 3480--3494 Karim Bigou and Arnaud Tisserand Binary-Ternary Plus-Minus Modular Inversion in RNS . . . . . . . . . . . . 3495--3501 Chang Xu and Gang Wang and Xiaoguang Liu and Dongdong Guo and Tie-Yan Liu Health Status Assessment and Failure Prediction for Hard Drives with Recurrent Neural Networks . . . . . . . 3502--3508
Arlinta C. Barus and Tsong Yueh Chen and Fei-Ching Kuo and Huai Liu and Robert Merkel and Gregg Rothermel A Cost-Effective Random Testing Method for Programs with Non-Numeric Inputs . . 3509--3523 Bowen Du and Runhe Huang and Xi Chen and Zhipu Xie and Ye Liang and Weifeng Lv and Jianhua Ma Active CTDaaS: A Data Service Framework Based on Transparent IoD in City Traffic 3524--3536 Sam Van den Steen and Stijn Eyerman and Sander De Pestel and Moncef Mechri and Trevor E. Carlson and David Black-Schaffer and Erik Hagersten and Lieven Eeckhout Analytical Processor Performance and Power Modeling Using Micro-Architecture Independent Characteristics . . . . . . 3537--3551 Peng Deng and Qi Zhu and Abhijit Davare and Anastasios Mourikis and Xue Liu and Marco Di Natale An Efficient Control-Driven Period Optimization Algorithm for Distributed Real-Time Systems . . . . . . . . . . . 3552--3566 Ximeng Liu and Baodong Qin and Robert H. Deng and Rongxing Lu and Jianfeng Ma A Privacy-Preserving Outsourced Functional Computation Framework Across Large-Scale Multiple Encrypted Domains 3567--3579 Ahmad Hiasat A Sign Detector for a Group of Three-Moduli Sets . . . . . . . . . . . 3580--3590 Karim Kanoun and Cem Tekin and David Atienza and Mihaela van der Schaar Big-Data Streaming Applications Scheduling Based on Staged Multi-Armed Bandits . . . . . . . . . . . . . . . . 3591--3605 Yan Zhang and Guowu Yang and William N. N. Hung and Juling Zhang Computing Affine Equivalence Classes of Boolean Functions by Group Isomorphism 3606--3616 Muhammad Shafique and Muhammad Usman Karim Khan and Jörg Henkel Content-Aware Low-Power Configurable Aging Mitigation for SRAM Memories . . . 3617--3630 Kun He and Jing Chen and Ruiying Du and Qianhong Wu and Guoliang Xue and Xiang Zhang DeyPoS: Deduplicatable Dynamic Proof of Storage for Multi-User Environments . . 3631--3645 Muhammad Faisal Iqbal and Jim Holt and Jee Ho Ryoo and Gustavo de Veciana and Lizy K. John Dynamic Core Allocation and Packet Scheduling in Multicore Network Processors . . . . . . . . . . . . . . . 3646--3660 Hamed Farbeh and Hyeonggyu Kim and Seyed Ghassem Miremadi and Soontae Kim Floating-ECC: Dynamic Repositioning of Error Correcting Code Bits for Extending the Lifetime of STT-RAM Caches . . . . . 3661--3675 Xiaobing Shi and Nicola Nicolici Generating Cyclic-Random Sequences in a Constrained Space for In-System Validation . . . . . . . . . . . . . . . 3676--3686 Xun Yi and Fang-Yu Rao and Zahir Tari and Feng Hao and Elisa Bertino and Ibrahim Khalil and Albert Y. Zomaya ID2S Password-Authenticated Key Exchange Protocols . . . . . . . . . . . . . . . 3687--3701 Deze Zeng and Lin Gu and Song Guo and Zixue Cheng and Shui Yu Joint Optimization of Task Scheduling and Image Placement in Fog Computing Supported Software-Defined Embedded System . . . . . . . . . . . . . . . . . 3702--3712 Yanzhi Wang and Massoud Pedram Model-Free Reinforcement Learning and Bayesian Classification in System-Level Power Management . . . . . . . . . . . . 3713--3726 Xin Xu and H. Howie Huang On Soft Error Reliability of Virtualization Infrastructure . . . . . 3727--3739 Biswabandan Panda SPAC: A Synergistic Prefetcher Aggressiveness Controller for Multi-Core Systems . . . . . . . . . . . . . . . . 3740--3753 Bo-Cheng Charles Lai and Chia-Ying Lee and Tsou-Han Chiu and Hsien-Kai Kuo and Chun-Kai Chang Unified Designs for High Performance LDPC Decoding on GPGPU . . . . . . . . . 3754--3765 Hsing-Min Chen and Supreet Jeloka and Akhil Arunkumar and David Blaauw and Carole-Jean Wu and Trevor Mudge and Chaitali Chakrabarti Using Low Cost Erasure and Error Correction Schemes to Improve Reliability of Commodity DRAM Systems 3766--3779 Francisco J. Andújar and Juan A. Villar and José L. Sánchez and Francisco J. Alfaro and José Duato Adaptive Routing for $N$-Dimensional Twin Torus . . . . . . . . . . . . . . . 3780--3786 Chuliang Weng and Qian Liu and Kenli Li and Deqing Zou CloudMon: Monitoring Virtual Machines in Clouds . . . . . . . . . . . . . . . . . 3787--3793 Kazuteru Namba and Fabrizio Lombardi Parallel Decodable Multi-Level Unequal Burst Error Correcting Codes for Memories of Approximate Systems . . . . 3794--3801
Paolo Montuschi State of the Journal . . . . . . . . . . 1--2 Anonymous 2016 Index IEEE Transactions on Computers Vol. 65 . . . . . . . . . . . 1--37 Erdinç Öztürk and Yarkìn Doröz and Erkay Sava\cs and Berk Sunar A Custom Accelerator for Homomorphic Encryption Applications . . . . . . . . 3--16 Menglan Hu and Jun Luo and Yang Wang and Bharadwaj Veeravalli Adaptive Scheduling of Task Graphs with Dynamic Resilience . . . . . . . . . . . 17--23 Jun-Wei Li and Shi-Ning Li and Yu Zhang and Tao Gu and Yee Wei Law and Zhe Yang and Xingshe Zhou and Marimuthu Palaniswami An Analytical Model for Coding-Based Reprogramming Protocols in Lossy Wireless Sensor Networks . . . . . . . . 24--37 Hyunggoy Oh and Taewoo Han and Inhyuk Choi and Sungho Kang An On-Chip Error Detection Method to Reduce the Post-Silicon Debug Time . . . 38--44 Ettore Napoli and Gerardo Castellano and Davide De Caro and Darjn Esposito and Nicola Petra and Antonio G. M. Strollo A SISO Register Circuit Tailored for Input Data with Low Transition Probability . . . . . . . . . . . . . . 45--51 Aleksandar Ilic and Frederico Pratas and Leonel Sousa Beyond the Roofline: Cache-Aware Power and Energy-Efficiency Modeling for Multi-Cores . . . . . . . . . . . . . . 52--58 Bodhisatwa Mazumdar and Debdeep Mukhopadhyay Construction of Rotation Symmetric S-Boxes with High Nonlinearity and Improved DPA Resistivity . . . . . . . . 59--72 Tao Luo and Shaoli Liu and Ling Li and Yuqing Wang and Shijin Zhang and Tianshi Chen and Zhiwei Xu and Olivier Temam and Yunji Chen DaDianNao: A Neural Network Supercomputer . . . . . . . . . . . . . 73--88 Shen-Fu Hsiao and Chia-Sheng Wen and Yi-Hau Chen and Kuei-Chun Huang Hierarchical Multipartite Function Evaluation . . . . . . . . . . . . . . . 89--99 Ghobad Zarrinchian and Morteza Saheb Zamani Latch-Based Structure: A High Resolution and Self-Reference Technique for Hardware Trojan Detection . . . . . . . 100--113 Po-Cheng Hsu and Sun-Yuan Hsieh Multi-Inherited Search Tree for Dynamic IP Router-Tables . . . . . . . . . . . . 114--126 Yingxun Fu and Jiwu Shu and Xianghong Luo and Zhirong Shen and Qingda Hu Short Code: An Efficient RAID-6 MDS Code for Optimizing Degraded Reads and Partial Stripe Writes . . . . . . . . . 127--137 Minghua Tang and Xiaola Lin and Maurizio Palesi The Repetitive Turn Model for Adaptive Routing . . . . . . . . . . . . . . . . 138--146 Santiago Pagani and Heba Khdr and Jian-Jia Chen and Muhammad Shafique and Minming Li and Jörg Henkel Thermal Safe Power (TSP): Efficient Power Budgeting for Heterogeneous Manycore Systems in Dark Silicon . . . . 147--162 Eduardo Viegas and Altair O. Santin and André França and Ricardo Jasinski and Volnei A. Pedroni and Luiz S. Oliveira Towards an Energy-Efficient Anomaly-Based Intrusion Detection Engine for Embedded Systems . . . . . . . . . . 163--177 Anonymous 2016 Reviewers List . . . . . . . . . . 178--182
Di Wu and Dmitri I. Arkhipov and Minyoung Kim and Carolyn L. Talcott and Amelia C. Regan and Julie A. McCann and Nalini Venkatasubramanian ADDSEN: Adaptive Data Processing and Dissemination for Drone Swarms in Urban Sensing . . . . . . . . . . . . . . . . 183--198 Yucheng Zhang and Dan Feng and Hong Jiang and Wen Xia and Min Fu and Fangting Huang and Yukun Zhou A Fast Asymmetric Extremum Content Defined Chunking Algorithm for Data Deduplication in Backup Storage Systems 199--211 Manil Dev Gomony and Jamie Garside and Benny Akesson and Neil Audsley and Kees Goossens A Globally Arbitrated Memory Tree for Mixed-Time-Criticality Systems . . . . . 212--225 Ahmed A. Wahba and Hossam A. H. Fahmy Area Efficient and Fast Combined Binary/Decimal Floating Point Fused Multiply Add Unit . . . . . . . . . . . 226--239 Reza Hajisheykhi and Mohammad Roohitavaf and Sandeep S. Kulkarni Bounded Auditable Restoration of Distributed Systems . . . . . . . . . . 240--255 Wuhui Chen and Incheon Paik and Zhenni Li Cost-Aware Streaming Workflow Allocation on Geo-Distributed Data Centers . . . . 256--271 Freek Verbeek and Pooria M. Yaghini and Ashkan Eghbal and Nader Bagherzadeh Deadlock Verification of Cache Coherence Protocols and Communication Fabrics . . 272--284 Xingquan Li and Ziran Zhu and Wenxing Zhu Discrete Relaxation Method for Triple Patterning Lithography Layout Decomposition . . . . . . . . . . . . . 285--298 Nan Zheng and Pinaki Mazumder Hardware-Friendly Actor-Critic Reinforcement Learning Through Modulation of Spike-Timing-Dependent Plasticity . . . . . . . . . . . . . . . 299--311 Guoming Tang and Weixiang Jiang and Zhifeng Xu and Fangming Liu and Kui Wu NIPD: Non-Intrusive Power Disaggregation in Legacy Datacenters . . . . . . . . . 312--325 Jianwei Qian and Fudong Qiu and Fan Wu and Na Ruan and Guihai Chen and Shaojie Tang Privacy-Preserving Selective Aggregation of Online User Behavior Data . . . . . . 326--338 Alessandra Melani and Marko Bertogna and Vincenzo Bonifaci and Alberto Marchetti-Spaccamela and Giorgio Buttazzo Schedulability Analysis of Conditional Parallel Task Graphs in Multicore Systems . . . . . . . . . . . . . . . . 339--353 Xuan Thuy Ngo and Jean-Luc Danger and Sylvain Guilley and Tarik Graba and Yves Mathieu and Zakaria Najm and Shivam Bhasin Cryptographically Secure Shield for Security IPs Protection . . . . . . . . 354--360 Renhai Chen and Yi Wang and Duo Liu and Zili Shao and Song Jiang Heating Dispersal for Self-Healing NAND Flash Memory . . . . . . . . . . . . . . 361--367 Jeongkyu Hong and Soontae Kim Smart ECC Allocation Cache Utilizing Cache Data Space . . . . . . . . . . . . 368--374
Wangchen Dai and Donald Donglong Chen and Ray C. C. Cheung and Çetin Kaya Koç Area-Time Efficient Architecture of FFT-Based Montgomery Multiplication . . 375--388 Md Shahriar Shamim and Naseef Mansoor and Rounak Singh Narde and Vignesh Kothandapani and Amlan Ganguly and Jayanti Venkataraman A Wireless Interconnection Framework for Seamless Inter and Intra-Chip Communication in Multichip Systems . . . 389--402 Ozcan Ozturk and Umut Orhan and Wei Ding and Praveen Yedlapalli and Mahmut Taylan Kandemir Cache Hierarchy-Aware Query Mapping on Emerging Multicore Architectures . . . . 403--415 Dingbao Xie and Wen Xiong and Lei Bu and Xuandong Li Deriving Unbounded Reachability Proof of Linear Hybrid Automata during Bounded Checking Procedure . . . . . . . . . . . 416--430 Rei Ueno and Naofumi Homma and Yukihiro Sugawara and Takafumi Aoki Formal Approach for Verifying Galois Field Arithmetic Circuits of Higher Degrees . . . . . . . . . . . . . . . . 431--442 Abdulrahman Kaitoua and Pietro Pinoli and Michele Bertoni and Stefano Ceri Framework for Supporting Genomic Operations . . . . . . . . . . . . . . . 443--457 Sander De Pestel and Stijn Eyerman and Lieven Eeckhout Linear Branch Entropy: Characterizing and Optimizing Branch Behavior in a Micro-Architecture Independent Way . . . 458--472 Heba Khdr and Santiago Pagani and Éricles Sousa and Vahid Lari and Anuj Pathania and Frank Hannig and Muhammad Shafique and Jürgen Teich and Jörg Henkel Power Density-Aware Resource Management for Heterogeneous Tiled Multicores . . . 488--501 Hengfeng Wei and Yu Huang and Jian Lu Probabilistically-Atomic $2$-Atomicity: Enabling Almost Strong Consistency in Distributed Storage Systems . . . . . . 502--514 Sana Mazahir and Osman Hasan and Rehan Hafiz and Muhammad Shafique and Jörg Henkel Probabilistic Error Modeling for Approximate Adders . . . . . . . . . . . 515--530 Wang Kang and Liang Chang and Zhaohao Wang and Weifeng Lv and Guanyu Sun and Weisheng Zhao Pseudo-Differential Sensing Framework for STT-MRAM: A Cross-Layer Perspective 531--544 Iury Bessa and Hussama Ismail and Reinaldo Palhares and Lucas Cordeiro and João Edgar Chaves Filho Formal Non-Fragile Stability Verification of Digital Control Systems with Uncertainty . . . . . . . . . . . . 545--552 Xiayu Hua and Chunhui Guo and Hao Wu and Douglas Lautner and Shangping Ren Schedulability Analysis for Real-Time Task Set on Resource with Performance Degradation and Dual-Level Periodic Rejuvenations . . . . . . . . . . . . . 553--559
Muhammad Shafique and Semeen Rehman and Florian Kriebel and Muhammad Usman Karim Khan and Bruno Zatt and Arun Subramaniyan and Bruno Boessio Vizzotto and Jörg Henkel Application-Guided Power-Efficient Fault Tolerance for H.264 Context Adaptive Variable Length Coding . . . . . . . . . 560--574 Rubén Braojos and Daniele Bortolotti and Andrea Bartolini and Giovanni Ansaloni and Luca Benini and David Atienza A Synchronization-Based Hybrid-Memory Multi-Core Architecture for Energy-Efficient Biomedical Signal Processing . . . . . . . . . . . . . . . 575--585 Gabriel Fernandez and Javier Jalle and Jaume Abella and Eduardo Quiñones and Tullio Vardanega and Francisco J. Cazorla Computing Safe Contention Bounds for Multicore Resources with Round-Robin and FIFO Arbitration . . . . . . . . . . . . 586--600 Shoaib Akram and Jennifer B. Sartor and Lieven Eeckhout DEP+BURST: Online DVFS Performance Prediction for Energy-Efficient Managed Language Execution . . . . . . . . . . . 601--615 Jaeyong Jeong and Youngsun Song and Sangwook Shane Hahn and Sungjin Lee and Jihong Kim Dynamic Erase Voltage and Time Scaling for Extending Lifetime of NAND Flash-Based SSDs . . . . . . . . . . . . 616--630 Alessandra Melani and Marko Bertogna and Robert I. Davis and Vincenzo Bonifaci and Alberto Marchetti-Spaccamela and Giorgio Buttazzo Exact Response Time Analysis for Fixed Priority Memory-Processor Co-Scheduling 631--646 Tuo Li and Muhammad Shafique and Jude Angelo Ambrose and Jörg Henkel and Sri Parameswaran Fine-Grained Checkpoint Recovery for Application-Specific Instruction-Set Processors . . . . . . . . . . . . . . . 647--660 Aria Shahverdi and Mostafa Taha and Thomas Eisenbarth Lightweight Side Channel Resistance: Threshold Implementations of Simon . . . 661--671 Yifan Gong and Bingsheng He and Dan Li Network Performance Aware Optimizations on IaaS Clouds . . . . . . . . . . . . . 672--687 Jaemin Jang and Wongyu Shin and Jungwhan Choi and Jinwoong Suh and Yongkee Kwon and Yongju Kim and Lee-Sup Kim Refresh-Aware Write Recovery Memory Controller . . . . . . . . . . . . . . . 688--701 Ryota Yasudo and Hiroki Matsutani and Michihiro Koibuchi and Hideharu Amano and Tadao Nakamura Scalable Networks-on-Chip with Elastic Links Demarcated by Decentralized Routers . . . . . . . . . . . . . . . . 702--716 Gil Kedar and Avi Mendelson and Israel Cidon SPACE: Semi-PArtitioned CachE for Energy Efficient, Hard Real-Time Systems . . . 717--730 Yatish Turakhia and Guangshuo Liu and Siddharth Garg and Diana Marculescu Thread Progress Equalization: Dynamically Adaptive Power-Constrained Performance Optimization of Multi-Threaded Applications . . . . . . 731--744
S. Liu and G. Mingas and C. S. Bouganis An Unbiased MCMC FPGA-Based Accelerator in the Land of Custom Precision Arithmetic . . . . . . . . . . . . . . . 745--758 A. Mosenia and S. Sur-Kolay and A. Raghunathan and N. K. Jha CABA: Continuous Authentication Based on BioAura . . . . . . . . . . . . . . . . 759--772 Z. Liu and J. Großschädl and Z. Hu and K. Järvinen and H. Wang and I. Verbauwhede Elliptic Curve Cryptography with Efficiently Computable Endomorphisms and Its Hardware Implementations for the Internet of Things . . . . . . . . . . . 773--785 X. Chen and N. Khoshavi and R. F. DeMara and J. Wang and D. Huang and W. Wen and Y. Chen Energy-Aware Adaptive Restore Schemes for MLC STT-RAM Cache . . . . . . . . . 786--798 Y. Zhang and X. Liao and H. Jin and L. Gu and G. Tan and B. B. Zhou HotGraph: Efficient Asynchronous Processing for Real-World Graphs . . . . 799--809 T. G. Rodrigues and K. Suto and H. Nishiyama and N. Kato Hybrid Method for Minimizing Service Delay in Edge Cloud Computing Through VM Migration and Transmission Power Control 810--819 H. Wang and K. Zhao and M. Lv and X. Zhang and H. Sun and T. Zhang Improving $3$D DRAM Fault Tolerance Through Weak Cell Aware Error Correction 820--833 S. Lee and K. Kim and G. Koo and H. Jeon and M. Annavaram and W. W. Ro Improving Energy Efficiency of GPUs through Data Compression and Compressed Execution . . . . . . . . . . . . . . . 834--847 G. Schley and A. Dalirsani and M. Eggenberger and N. Hatami and H. J. Wunderlich and M. Radetzki Multi-Layer Diagnosis for Fault-Tolerant Networks-on-Chip . . . . . . . . . . . . 848--861 X. Hu and X. Wang and L. Zhou and Y. Luo and C. Ding and S. Jiang and Z. Wang Optimizing Locality-Aware Memory Management of Key--Value Caches . . . . 862--875 J. Xue and Z. Yang and S. Hou and Y. Dai Processing Concurrent Graph Analytics with Decoupled Computation Model . . . . 876--890 S. Patranabis and Y. Shrivastava and D. Mukhopadhyay Provably Secure Key-Aggregate Cryptosystems with Broadcast Aggregate Keys for Online Data Sharing on the Cloud . . . . . . . . . . . . . . . . . 891--904 J. Feliu and J. Sahuquillo and S. Petit and J. Duato Perf Fair: A Progress-Aware Scheduler to Enhance Performance and Fairness in SMT Multicores . . . . . . . . . . . . . . . 905--911 W. Jing and K. Yang and Y. Lin and B. Lee and S. Yoon and Y. Ye and Y. Du and B. Chen Retention-Aware Hybrid Main Memory (RAHMM): Big DRAM and Little SCM . . . . 912--918 Z. Ghaderi and M. Ebrahimi and Z. Navabi and E. Bozorgzadeh and N. Bagherzadeh SENSIBle: A Highly Scalable SENsor DeSIgn for Path-Based Age Monitoring in FPGAs . . . . . . . . . . . . . . . . . 919--926
Ronald F. DeMara and Marco Platzner and Marco Ottavi Guest Editorial: \booktitleIEEE Transactions on Computers and \booktitleIEEE Transactions on Emerging Topics in Computing Joint Special Section on Innovation in Reconfigurable Computing Fabrics from Devices to Architectures . . . . . . . . . . . . . 927--929 Martin A. Trefzer and David M. R. Lawson and Simon J. Bale and James A. Walker and Andy M. Tyrrell Hierarchical Strategies for Efficient Fault Recovery on the Reconfigurable PAnDA Device . . . . . . . . . . . . . . 930--945 Kibum Lee and S. Simon Wong Fault-Tolerant FPGA with Column-Based Redundancy and Power Gating Using RRAM 946--956 Hongyan Zhang and Lars Bauer and Michael Andreas Kochte and Eric Schneider and Hans-Joachim Wunderlich and Jörg Henkel Aging Resilience and Fault Tolerance in Runtime Reconfigurable Architectures . . 957--970 Rajat Subhra Chakraborty and Ratan Rahul Jeldi and Indrasish Saha and Jimson Mathew Binary Decision Diagram Assisted Modeling of FPGA-Based Physically Unclonable Function by Genetic Programming . . . . . . . . . . . . . . 971--981 Zahra Ebrahimi and Behnam Khaleghi and Hossein Asadi PEAF: A Power-Efficient Architecture for SRAM-Based FPGAs Using Reconfigurable Hard Logic Design in Dark Silicon Era 982--995 Wei-Yu Tsai and Davis R. Barch and Andrew S. Cassidy and Michael V. DeBole and Alexander Andreopoulos and Bryan L. Jackson and Myron D. Flickner and John V. Arthur and Dharmendra S. Modha and John Sampson and Vijaykrishnan Narayanan Always-On Speech Recognition Using TrueNorth, a Reconfigurable, Neurosynaptic Processor . . . . . . . . 996--1007 Mohamed S. Abdelfattah and Andrew Bitar and Vaughn Betz Design and Applications for Embedded Networks-on-Chip on FPGAs . . . . . . . 1008--1021 Matteo Sonza Reorda and Luca Sterpone and Anees Ullah An Error-Detection and Self-Repairing Method for Dynamically and Partially Reconfigurable Systems . . . . . . . . . 1022--1033 Myung Hyun Jo and Won Woo Ro Dynamic Load Balancing of Dispatch Scheduling for Solid State Disks . . . . 1034--1047 Shuibing He and Yang Wang and Xian-He Sun and Chengzhong Xu HARL: Optimizing Parallel File Systems with Heterogeneity-Aware Region-Level Data Layout . . . . . . . . . . . . . . 1048--1060 Sanjit Chatterjee and Alfred Menezes and Francisco Rodríguez-Henríquez On Instantiating Pairing-Based Protocols with Elliptic Curves of Embedding Degree One . . . . . . . . . . . . . . . . . . 1061--1070 Yongseok Son and Heon Young Yeom and Hyuck Han Optimizing I/O Operations in File Systems for Fast Storage Devices . . . . 1071--1084 Alfonso Sánchez-Macián and Pedro Reviriego and Juan Antonio Maestro Combined Modular Key and Data Error Protection for Content-Addressable Memories . . . . . . . . . . . . . . . . 1085--1090 Shuibing He and Yang Wang and Xian-He Sun and Chuanhe Huang and Chenzhong Xu Heterogeneity-Aware Collective I/O for Parallel I/O Systems with Hybrid HDD/SSD Servers . . . . . . . . . . . . . . . . 1091--1098 Elia Bisi and Filippo Melzani and Vittorio Zaccaria Symbolic Analysis of Higher-Order Side Channel Countermeasures . . . . . . . . 1099--1105
Nikita Baikov Algorithm and Implementation Details for Complementary Error Function . . . . . . 1106--1118 Guohui Li and Chenggang Deng and Jianjun Li and Quan Zhou and Wei Wei Deadline and Period Assignment for Update Transactions in Co-Scheduling Environment . . . . . . . . . . . . . . 1119--1131 Majid Jalili and Hamid Sarbazi-Azad Endurance-Aware Security Enhancement in Non-Volatile Memories Using Compression and Selective Encryption . . . . . . . . 1132--1144 Sri Harsha Gade and Sujay Deb HyWin: Hybrid Wireless NoC with Sandboxed Sub-Networks for CPU/GPU Architectures . . . . . . . . . . . . . 1145--1158 Martin Omana and Marco Padovani and Kreshnik Veliu and Cecilia Metra and Juergen Alt and Rajesh Galivanche New Approaches for Power Binning of High Performance Microprocessors . . . . . . 1159--1171 Arnab Raha and Soubhagya Sutar and Hrishikesh Jayakumar and Vijay Raghunathan Quality Configurable Approximate DRAM 1172--1187 Xuebin Zhang and Jiangpeng Li and Hao Wang and Danni Xiong and Jerry Qu and Hyunsuk Shin and Jung Pill Kim and Tong Zhang Realizing Transparent OS/Apps Compression in Mobile Devices at Zero Latency Overhead . . . . . . . . . . . . 1188--1199 Jesung Kim and Jongmin Lee and Soontae Kim TLB Index-Based Tagging for Reducing Data Cache and TLB Energy Consumption 1200--1211 Anne Benoit and Aurelien Cavelan and Valentin Le Fevre and Yves Robert and Hongyang Sun Towards Optimal Multi-Level Checkpointing . . . . . . . . . . . . . 1212--1226 Ke Chen and Jie Han and Fabrizio Lombardi Two Approximate Voting Schemes for Reliable Computing . . . . . . . . . . . 1227--1239 Hongzhi Zhao and Nader Bagherzadeh and Jie Wu A General Fault-Tolerant Minimal Routing for Mesh Architectures . . . . . . . . . 1240--1246 Heechul Yun and Waqar Ali and Santosh Gondi and Siddhartha Biswas BWLOCK: A Dynamic Memory Access Control Framework for Soft Real-Time Applications on Multicore Platforms . . 1247--1252 Ahmad Hiasat Efficient RNS Scalers for the Extended Three-Moduli Set $ (2^n - 1, 2^{n + p}, 2^n + 1) $ . . . . . . . . . . . . . . . 1253--1260 Pin Gao and Mingxing Zhang and Kang Chen and Yongwei Wu and Weimin Zheng High Performance Graph Processing with Locality Oriented Design . . . . . . . . 1261--1267 Marco Gaudesi and Irith Pomeranz and Matteo Sonza Reorda and Giovanni Squillero New Techniques to Reduce the Execution Time of Functional Test Programs . . . . 1268--1273 Wongyu Shin and Jaemin Jang and Jungwhan Choi and Jinwoong Suh and Yongkee Kwon and Youngsuk Moon and Lee-Sup Kim Rank-Level Parallelism in DRAM . . . . . 1274--1280
Fredrik Johansson Arb: Efficient Arbitrary-Precision Midpoint--Radius Interval Arithmetic . . 1281--1292 Hsuan-Hung Liu and Bing-Yang Lin and Cheng-Wen Wu and Wan-Ting Chiang and Lee Mincent and Hung-Chih Lin and Ching-Nen Peng and Min-Jer Wang A Built-Off Self-Repair Scheme for Channel-Based $3$D Memories . . . . . . 1293--1301 Peng Liu and Qi Hu and Xingcheng Hua Adaptive Coherence Granularity for Multi-Socket Systems . . . . . . . . . . 1302--1312 Jingwei Hu and Ray C. C. Cheung Area-Time Efficient Computation of Niederreiter Encryption on QC-MDPC Codes for Embedded Hardware . . . . . . . . . 1313--1325 Jianwei Yin and Yan Tang and Shuiguang Deng and Ying Li and Wei Lo and Kexiong Dong and Albert Y. Zomaya and Calton Pu ASSER: An Efficient, Reliable, and Cost-Effective Storage Scheme for Object-Based Cloud Storage Systems . . . 1326--1340 Dazhao Cheng and Xiaobo Zhou and Palden Lama and Jun Wu and Changjun Jiang Cross-Platform Resource Scheduling for Spark and MapReduce on YARN . . . . . . 1341--1353 Bo Yang and Kalikinkar Mandal and Mark D. Aagaard and Guang Gong Efficient Composited de Bruijn Sequence Generators . . . . . . . . . . . . . . . 1354--1368 Ciara Rafferty and Máire O'Neill and Neil Hanley Evaluation of Large Integer Multiplication Methods on Hardware . . . 1369--1382 Shih-Hsiang Lin and Pei-Yin Chen and Yu-Ning Lin Hardware Design of Low-Power High-Throughput Sorting Unit . . . . . . 1383--1395 Sun-Mi Park and Ku-Young Chang and Dowon Hong and Changho Seo New Block Recombination for Subquadratic Space Complexity Polynomial Multiplication Based on Overlap-Free Approach . . . . . . . . . . . . . . . . 1396--1406 Phuong Hoai Ha and Philippas Tsigas and Otto J. Anshus Wait-Free Programming for General Purpose Computations on Graphics Processors . . . . . . . . . . . . . . . 1407--1420 Ajay Kumar Nain and Jagadish Bandaru and Mohammed Abdullah Zubair and Rajalakshmi Pachamuthu A Secure Phase-Encrypted IEEE 802.15.4 Transceiver Design . . . . . . . . . . . 1421--1427 Wongyu Shin and Jaemin Jang and Jungwhan Choi and Jinwoong Suh and Lee-Sup Kim Bank-Group Level Parallelism . . . . . . 1428--1434 Weiqiang Liu and Liangyu Qian and Chenghua Wang and Honglan Jiang and Jie Han and Fabrizio Lombardi Design of Approximate Radix-4 Booth Multipliers for Error-Tolerant Computing 1435--1441 Diego F. G. Coelho and Renato J. Cintra and Nilanka Rajapaksha and Gihan J. Mendis and Arjuna Madanayake and Vassil S. Dimitrov DFT Computation Using Gauss--Eisenstein Basis: FFT Algorithms and VLSI Architectures . . . . . . . . . . . . . 1442--1448 Gregory Levitin and Liudong Xing and Yuanshun Dai and Vinod M. Vokkarane Dynamic Checkpointing Policy in Heterogeneous Real-Time Standby Systems 1449--1456 Che-Wei Chang and Geng-You Chen and Yi-Jung Chen and Chia-Wei Yeh and Pei Yin Eng and Ana Cheung and Chia-Lin Yang Exploiting Write Heterogeneity of Morphable MLC/SLC SSDs in Datacenters with Service-Level Objectives . . . . . 1457--1463
Yong Guan and Guohui Wang and Chenlin Ma and Renhai Chen and Yi Wang and Zili Shao A Block-Level Log-Block Management Scheme for MLC NAND Flash Memory Storage Systems . . . . . . . . . . . . . . . . 1464--1477 Mengjie Mao and Wujie Wen and Yaojun Zhang and Yiran Chen and Hai Li An Energy-Efficient GPGPU Register File Architecture Using Racetrack Memory . . 1478--1490 Kaiping Xue and Jianan Hong and Yingjie Xue and David S. L. Wei and Nenghai Yu and Peilin Hong CABE: A New Comparable Attribute-Based Encryption Construction with $0$-Encoding and $1$-Encoding . . . . . 1491--1503 Hyunggoy Oh and Inhyuk Choi and Sungho Kang DRAM-Based Error Detection Method to Reduce the Post-Silicon Debug Time for Multiple Identical Cores . . . . . . . . 1504--1517 Jing Huang and Renfa Li and Jiyao An and Derrick Ntalasha and Fan Yang and Keqin Li Energy-Efficient Resource Utilization for Heterogeneous Embedded Computing Systems . . . . . . . . . . . . . . . . 1518--1531 Qin Xiong and Fei Wu and Zhonghai Lu and Changsheng Xie Extending Real-Time Analysis for Wormhole NoCs . . . . . . . . . . . . . 1532--1546 Diomidis Spinellis and Marios Fragkoulis Extending Unix Pipelines to DAGs . . . . 1547--1561 Yin Li and Xingpo Ma and Yu Zhang and Chuanda Qi Mastrovito Form of Non-Recursive Karatsuba Multiplier for All Trinomials 1573--1584 Kevin Atighehchi and Robert Rolland Optimization of Tree Modes for Parallel Hash Functions: A Case Study . . . . . . 1585--1598 Mohammad-Hashem Haghbayan and Antonio Miele and Amir M. Rahmani and Pasi Liljeberg and Hannu Tenhunen Performance/Reliability-Aware Resource Management for Many-Cores in Dark Silicon Era . . . . . . . . . . . . . . 1599--1612 Wenjie Li and Sharief M. A. Oteafy and Hossam S. Hassanein Rate-Selective Caching for Adaptive Streaming Over Information-Centric Networks . . . . . . . . . . . . . . . . 1613--1628 Zheng Li and Fang Wang and Dan Feng and Yu Hua and Jingning Liu and Wei Tong and Yu Chen and Salah S. Harb Time and Space-Efficient Write Parallelism in PCM by Exploiting Data Patterns . . . . . . . . . . . . . . . . 1629--1644 Qi Zhang and Ling Liu and Gong Su and Arun Iyengar MemFlex: A Shared Memory Swapper for High Performance VM Execution . . . . . 1645--1652
Xian Li and Karthi Duraisamy and Joe Baylon and Turbo Majumder and Guopeng Wei and Paul Bogdan and Deukhyoun Heo and Partha Pratim Pande A Reconfigurable Wireless NoC for Large Scale Microbiome Community Analysis . . 1653--1666 Yi Wu and Ge Nong and Wai Hong Chan and Ling Bo Han Checking Big Suffix and LCP Arrays by Probabilistic Methods . . . . . . . . . 1667--1675 Xiaohang Wang and Yingtao Jiang and Mei Yang and Hong Li and Terrence Mak HRC: A $3$D NoC Architecture with Genuine Support for Runtime Thermal-Aware Task Management . . . . . 1676--1688 Arezki Laga and Jalil Boukhobza and Frank Singhoff and Michel Koskas MONTRES: Merge ON-the-Run External Sorting Algorithm for Large Data Volumes on SSD Based Storage Systems . . . . . . 1689--1702 Farimah R. Poursafaei and Mostafa Bazzaz and Alireza Ejlali NPAM: NVM-Aware Page Allocation for Multi-Core Embedded Systems . . . . . . 1703--1716 Samuel Marchal and Giovanni Armano and Tommi Gröndahl and Kalle Saari and Nidhi Singh and N. Asokan Off-the-Hook: An Efficient and Usable Client-Side Phishing Prevention Application . . . . . . . . . . . . . . 1717--1733 M. Hassan Najafi and David J. Lilja and Marc D. Riedel and Kia Bazargan Polysynchronous Clocking: Exploiting the Skew Tolerance of Stochastic Circuits 1734--1746 Jianhua Li and Minming Li and Chun Jason Xue and Yiming Ouyang and Fanfan Shen Thread Criticality Assisted Replication and Migration for Chip Multiprocessor Caches . . . . . . . . . . . . . . . . . 1747--1762 Jiageng Chen and Jesen Teh and Zhe Liu and Chunhua Su and Azman Samsudin and Yang Xiang Towards Accurate Statistical Analysis of Security Margins: New Searching Strategies for Differential Attacks . . 1763--1777 Hemendra Rawat and Patrick Schaumont Vector Instruction Set Extensions for Efficient Computation of Keccak . . . . 1778--1789 Shanker Shreejith and Philipp Mundhenk and Andreas Ettner and Suhaib A. Fahmy and Sebastian Steinhorst and Martin Lukasiewycz and Samarjit Chakraborty VEGa: A High Performance Vehicular Ethernet Gateway on Hybrid FPGA . . . . 1790--1803 Subhamoy Maitra and Akhilesh Siddhanti and Santanu Sarkar A Differential Fault Attack on Plantlet 1804--1808 Anastasios Psarras and Michalis Paschou and Chrysostomos Nicopoulos and Giorgos Dimitrakopoulos A Dual-Clock Multiple-Queue Shared Buffer . . . . . . . . . . . . . . . . . 1809--1815 Jinkyu Lee Improved Schedulability Analysis Using Carry-In Limitation for Non-Preemptive Fixed-Priority Multiprocessor Scheduling 1816--1823 Vikramkumar Pudi and K. Sridharan and Fabrizio Lombardi Majority Logic Formulations for Parallel Adder Designs at Reduced Delay and Circuit Complexity . . . . . . . . . . . 1824--1830 Alfonso Sánchez-Macián and Pedro Reviriego and Juan Antonio Maestro and Shanshan Liu Single Event Transient Tolerant Bloom Filter Implementations . . . . . . . . . 1831--1836
Conghui He and Haohuan Fu and Ce Guo and Wayne Luk and Guangwen Yang A Fully-Pipelined Hardware Design for Gaussian Mixture Models . . . . . . . . 1837--1850 Avijit Dutta and Ashwin Jha and Mridul Nandi A New Look at Counters: Don't Run Like Marathon in a Hundred Meter Race . . . . 1851--1864 Reza Hojabr and Mehdi Modarressi and Masoud Daneshtalab and Ali Yasoubi and Ahmad Khonsari Customizing Clos Network-on-Chip for Neural Networks . . . . . . . . . . . . 1865--1877 Young Geun Kim and Minyong Kim and Sung Woo Chung Enhancing Energy Efficiency of Multimedia Applications in Heterogeneous Mobile Multi-Core Processors . . . . . . 1878--1889 Kalidas Ganesh and Youngjae Kim and Monobrata Debnath and Sungyong Park and Junghee Lee LAWC: Optimizing Write Cache Using Layout-Aware I/O Scheduling for All Flash Storage . . . . . . . . . . . . . 1890--1902 Zhonghai Lu and Yuan Yao Marginal Performance: Formalizing and Quantifying Power Over/Under Provisioning in NoC DVFS . . . . . . . . 1903--1917 Duo Liu and Kan Zhong and Xiao Zhu and Yang Li and Lingbo Long and Zili Shao Non-Volatile Memory Based Page Swapping for Building High-Performance Mobile Devices . . . . . . . . . . . . . . . . 1918--1931 Fenggang Wu and Ziqi Fan and Ming-Chang Yang and Baoquan Zhang and Xiongzi Ge and David H. C. Du Performance Evaluation of Host Aware Shingled Magnetic Recording (HA--SMR) Drives . . . . . . . . . . . . . . . . . 1932--1945 Bomin Mao and Zubair Md. Fadlullah and Fengxiao Tang and Nei Kato and Osamu Akashi and Takeru Inoue and Kimihiro Mizutani Routing or Computing? The Paradigm Shift Towards Intelligent Computer Network Packet Transmission Based on Deep Learning . . . . . . . . . . . . . . . . 1946--1960 Leonardo Ecco and Rolf Ernst Tackling the Bus Turnaround Overhead in Real-Time SDRAM Controllers . . . . . . 1961--1974 Wei Shu and Nian-Feng Tzeng Compressed Sharer Tracking and Relinquishment Coherence for Superior Directory Efficiency of Chip Multiprocessors . . . . . . . . . . . . 1975--1981 Sana Mazahir and Osman Hasan and Rehan Hafiz and Muhammad Shafique Probabilistic Error Analysis of Approximate Recursive Multipliers . . . 1982--1990
Javier Hormigo and Jean-Michel Muller and Stuart Oberman and Nathalie Revol and Arnaud Tisserand and Julio Villalba-Moreno Introduction to the Special Issue on Computer Arithmetic . . . . . . . . . . 1991--1993 Xiaoping Cui and Wenwen Dong and Weiqiang Liu and Earl E. Swartzlander and Fabrizio Lombardi High Performance Parallel Decimal Multipliers Using Hybrid BCD Codes . . . 1994--2004 Paulo Martins and Julien Eynard and Jean-Claude Bajard and Leonel Sousa Arithmetical Improvement of the Round-Off for Cryptosystems in High-Dimensional Lattices . . . . . . . 2005--2018 Masahiro Ishii and Jérémie Detrey and Pierrick Gaudry and Atsuo Inomata and Kazutoshi Fujikawa Fast Modular Arithmetic on the Kalray MPPA-256 Processor for an Energy-Efficient Implementation of ECM 2019--2030 Martin Langhammer and Bogdan Pasca Single Precision Logarithm and Exponential Architectures for Hard Floating-Point Enabled FPGAs . . . . . . 2031--2043 Nicolas Brisebarre and Guillaume Hanrot and Olivier Robert Exponential Sums and Correctly-Rounded Functions . . . . . . . . . . . . . . . 2044--2057 Hugues de Lassus Saint-Geni\`es and David Defour and Guillaume Revy Exact Lookup Tables for the Evaluation of Trigonometric and Hyperbolic Functions . . . . . . . . . . . . . . . 2058--2071 Martin Kumm and Martin Hardieck and Peter Zipf Optimization of Constant Matrix Multiplication with Low Power and High Throughput . . . . . . . . . . . . . . . 2072--2080 Andrew Anderson and Servesh Muralidharan and David Gregg Efficient Multibyte Floating Point Data Formats Using Vectorization . . . . . . 2081--2096 H. Fatih Ugurdag and Florent de Dinechin and Y. Serhan Gener and Sezer Gören and Laurent-Stéphane Didier Hardware Division by Small Integer Constants . . . . . . . . . . . . . . . 2097--2110 Vincent Lef\`evre Correctly Rounded Arbitrary-Precision Floating-Point Summation . . . . . . . . 2111--2124
Paolo Montuschi State of the Journal . . . . . . . . . . 1--1 Anonymous 2017 Index \booktitleIEEE Transactions on Computers Vol. 66 . . . . . . . . . . 1--23 Chun-Yan Wei and Xiao-Qiu Cai and Bin Liu and Tian-Yin Wang and Fei Gao A Generic Construction of Quantum-Oblivious-Key-Transfer-Based Private Query with Ideal Database Security and Zero Failure . . . . . . . 2--8 Jasmine Madonna Sabarimuthu and T. G. Venkatesh Analytical Miss Rate Calculation of L2 Cache from the RD Profile of L1 Cache 9--15 Nektarios Georgios Tsoutsos and Michail Maniatakos Efficient Detection for Malicious and Random Errors in Additive Encrypted Computation . . . . . . . . . . . . . . 16--31 Ho Hyun Shin and Young Min Park and Duheon Choi and Byoung Jin Kim and Dae-Hyung Cho and Eui-Young Chung EXTREME: Exploiting Page Table for Reducing Refresh Power of $3$D-Stacked DRAM Memory . . . . . . . . . . . . . . 32--44 Shiru Ren and Le Tan and Chunqi Li and Zhen Xiao and Weijia Song Leveraging Hardware-Assisted Virtualization for Deterministic Replay on Commodity Multi-Core Processors . . . 45--58 Yuchang Mo and Lirong Cui and Liudong Xing and Zhao Zhang Performability Analysis of Large-Scale Multi-State Computing Systems . . . . . 59--72 Artem Aleksandrovich Andreev and Arvind Sridhar and Mohamed M. Sabry and Marina Zapater and Patrick Ruch and Bruno Michel and David Atienza PowerCool: Simulation of Cooling and Powering of $3$D MPSoCs with Integrated Flow Cell Arrays . . . . . . . . . . . . 73--85 Adrián Pérez Diéguez and Margarita Amor and Jacobo Lobeiras and Ramón Doallo Solving Large Problem Sizes of Index-Digit Algorithms on GPU: FFT and Tridiagonal System Solvers . . . . . . . 86--101 Zana Ghaderi and Nader Bagherzadeh and Ahmad Albaqsami STABLE: Stress-Aware Boolean Matching to Mitigate BTI-Induced SNM Reduction in SRAM-Based FPGAs . . . . . . . . . . . . 102--114 Anna Minaeva and Benny Akesson and Zden\vek Hanzálek and Dakshina Dasari Time-Triggered Co-Scheduling of Computation and Communication with Jitter Requirements . . . . . . . . . . 115--129 Andrey Rodchenko and Christos Kotselidis and Andy Nisbet and Antoniu Pop and Mikel Luján Type Information Elimination from Objects on Architectures with Tagged Pointers Support . . . . . . . . . . . . 130--143 Anonymous 2017 Reviewers List . . . . . . . . . . 144--148
Haider A. F. Almurib and Thulasiraman Nandha Kumar and Fabrizio Lombardi Approximate DCT Image Compression Using Inexact Computing . . . . . . . . . . . 149--159 Ravindranath Reddy Manumachu and Alexey Lastovetsky Bi-Objective Optimization of Data-Parallel Applications on Homogeneous Multicore Clusters for Performance and Energy . . . . . . . . . 160--177 Xiaohang Wang and Amit Kumar Singh and Bing Li and Yang Yang and Hong Li and Terrence Mak Bubble Budgeting: Throughput Optimization for Dynamic Workloads by Exploiting Dark Cores in Many Core Systems . . . . . . . . . . . . . . . . 178--192 Jianwei Yin and Yan Tang and Shuiguang Deng and Ying Li and Albert Y. Zomaya $ D^3 $: A Dynamic Dual-Phase Deduplication Framework for Distributed Primary Storage . . . . . . . . . . . . 193--207 Hadi Mardani Kamali and Kimia Zamiri Azar and Shaahin Hessabi DuCNoC: A High-Throughput FPGA-Based NoC Simulator Using Dual-Clock Lightweight Router Micro-Architecture . . . . . . . 208--221 Jie Lu and Hongyang Jia and Naveen Verma and Niraj K. Jha Genetic Programming for Energy-Efficient and Energy-Scalable Approximate Feature Computation in Embedded Inference Systems . . . . . . . . . . . . . . . . 222--236 Farrokh Ghani Zadegan and Dimitar Nikolov and Erik Larsson On-Chip Fault Monitoring Using Self-Reconfiguring IEEE 1687 Networks 237--251 Huan Feng and David Eyers and Steven Mills and Yongwei Wu and Zhiyi Huang Principal Component Analysis Based Filtering for Scalable, High Precision $k$-NN Search . . . . . . . . . . . . . 252--267 Liran Lerman and Nikita Veshchikov and Olivier Markowitch and François-Xavier Standaert Start Simple and then Refine: Bias-Variance Decomposition as a Diagnosis Tool for Leakage Profiling . . 268--283 Junhee Ryu and Dongeun Lee and Kang G. Shin and Kyungtae Kang ClusterFetch: A Lightweight Prefetcher for Intensive Disk Reads . . . . . . . . 284--290 Jagannath Samanta and Jaydeb Bhaumik and Soma Barman Compact CA-Based Single Byte Error Correcting Codec . . . . . . . . . . . . 291--298 Alexis Ramos and Anees Ullah and Pedro Reviriego and Juan Antonio Maestro Efficient Protection of the Register File in Soft-Processors Implemented on Xilinx FPGAs . . . . . . . . . . . . . . 299--304
Patrick Schaumont and Ruby Lee and Ronald Perez and Guido Bertoni Special Section on Secure Computer Architectures . . . . . . . . . . . . . 305--306 Marc Fyrbiak and Simon Rokicki and Nicolai Bissantz and Russell Tessier and Christof Paar Hybrid Obfuscation to Protect Against Disclosure Attacks on Embedded Microprocessors . . . . . . . . . . . . 307--321 James Howe and Ayesha Khalid and Ciara Rafferty and Francesco Regazzoni and Máire O'Neill On Practical Discrete Gaussian Samplers for Lattice-Based Cryptography . . . . . 322--334 Vincent Migliore and Maria Méndez Real and Vianney Lapotre and Arnaud Tisserand and Caroline Fontaine and Guy Gogniat Hardware/Software Co-Design of an Accelerator for FV Homomorphic Encryption Scheme Using Karatsuba Algorithm . . . . . . . . . . . . . . . 335--347 Pawel Swierczynski and Georg T. Becker and Amir Moradi and Christof Paar Bitstream Fault Injections (BiFI)-Automated Fault Attacks Against SRAM-Based FPGAs . . . . . . . . . . . . 348--360 Pieter Maene and Johannes Götzfried and Ruan de Clercq and Tilo Müller and Felix Freiling and Ingrid Verbauwhede Hardware-Based Trusted Computing Architectures for Isolation and Attestation . . . . . . . . . . . . . . 361--374 Alexander Wild and Amir Moradi and Tim Güneysu GliFreD: Glitch-Free Duplication Towards Power-Equalized Circuits on FPGAs . . . 375--387 Dan Huang and Dezhi Han and Jun Wang and Jiangling Yin and Xunchao Chen and Xuhong Zhang and Jian Zhou and Mao Ye Achieving Load Balance for Parallel Data Access on Distributed File Systems . . . 388--402 Durga Prasad Sahoo and Debdeep Mukhopadhyay and Rajat Subhra Chakraborty and Phuong Ha Nguyen A Multiplexer-Based Arbiter PUF Composition with Enhanced Reliability and Security . . . . . . . . . . . . . . 403--417 Eleonora Guerrini and Laurent Imbert and Théo Winterhalter Randomized Mixed-Radix Scalar Multiplication . . . . . . . . . . . . . 418--431 Edwin Hsing-Mean Sha and Weiwen Jiang and Hailiang Dong and Zhulin Ma and Runyu Zhang and Xianzhang Chen and Qingfeng Zhuge Towards the Design of Efficient and Consistent Index Structure with Minimal Write Activities for Non-Volatile Memory 432--448 Warren E. Ferguson and Jesse Bingham and Levent Erkök and John R. Harrison and Joe Leslie-Hurd Digit Serial Methods with Applications to Division and Square Root . . . . . . 449--456
Yu Zhang and Qingsong Wei and Cheng Chen and Mingdi Xue and Xinkun Yuan and Chundong Wang Dynamic Scheduling with Service Curve for QoS Guarantee of Large-Scale Cloud Storage . . . . . . . . . . . . . . . . 457--468 Jaewoo Lee and Saravanan Ramanathan and Kieu-My Phan and Arvind Easwaran and Insik Shin and Insup Lee MC-Fluid: Multi-Core Fluid-Based Mixed-Criticality Scheduling . . . . . . 469--483 Kuan-Hsun Chen and Georg von der Brüggen and Jian-Jia Chen Reliability Optimization on Multi-Core Systems with Multi-Tasking and Redundant Multi-Threading . . . . . . . . . . . . 484--497 Changmin Lee and Won Woo Ro Simultaneous and Speculative Thread Migration for Improving Energy Efficiency of Heterogeneous Core Architectures . . . . . . . . . . . . . 498--512 Kim-Anh Tran and Trevor E. Carlson and Konstantinos Koukos and Magnus Själander and Vasileios Spiliopoulos and Stefanos Kaxiras and Alexandra Jimborean Static Instruction Scheduling for High Performance on Limited Hardware . . . . 513--527 Kanchan Manna and Priyajit Mukherjee and Santanu Chattopadhyay and Indranil Sengupta Thermal-Aware Application Mapping Strategy for Network-on-Chip Based System Design . . . . . . . . . . . . . 528--542 Gang Chen and Nan Guan and Di Liu and Qingqiang He and Kai Huang and Todor Stefanov and Wang Yi Utilization-Based Scheduling of Flexible Mixed-Criticality Real-Time Tasks . . . 543--558 Kai Huang and Biao Hu and Long Chen and Alois Knoll and Zhihua Wang Adas on Cots with OpenCL: A Case Study with Lane Detection . . . . . . . . . . 559--565 G. Robert Redinbo Designing Checksums for Detecting Errors in Fast Unitary Transforms . . . . . . . 566--572 Jiajie Shen and Kai Zhang and Jiazhen Gu and Yangfan Zhou and Xin Wang Efficient Scheduling for Multi-Block Updates in Erasure Coding Based Storage Systems . . . . . . . . . . . . . . . . 573--581 Jonah Caplan and Zaid Al-bayati and Haibo Zeng and Brett H. Meyer Mapping and Scheduling Mixed-Criticality Systems with On-Demand Redundancy . . . 582--588 Jaehyung Kim and Hongchan Roh and Sanghyun Park Selective I/O Bypass and Load Balancing Method for Write-Through SSD Caching in Big Data Analytics . . . . . . . . . . . 589--595 V. Zaccaria and F. Melzani and G. Bertoni Spectral Features of Higher-Order Side-Channel Countermeasures . . . . . . 596--603
Jian Zhang and Shuming Chen and Yaohua Wang Advancing CMOS-Type Ising Arithmetic Unit into the Domain of Real-World Applications . . . . . . . . . . . . . . 604--616 Hai Wang and Jiachun Wan and Sheldon X.-D. Tan and Chi Zhang and He Tang and Yuan Yuan and Keheng Huang and Zhenghong Zhang A Fast Leakage-Aware Full-Chip Transient Thermal Estimation Method . . . . . . . 617--630 Yu Bai and Ronald F. DeMara and Jia Di and Mingjie Lin Clockless Spintronic Logic: A Robust and Ultra-Low Power Computing Paradigm . . . 631--645 Hiroshi Uchigaito and Seiji Miura and Takumi Nito Efficient Data-Allocation Scheme for Eliminating Garbage Collection During Analysis of Big Graphs Stored in NAND Flash Memory . . . . . . . . . . . . . . 646--657 Chundong Wang and Qingsong Wei and Jun Yang and Cheng Chen and Yechao Yang and Mingdi Xue NV-Dedup: High-Performance Inline Deduplication for Non-Volatile Memory 658--671 Wonje Choi and Karthi Duraisamy and Ryan Gary Kim and Janardhan Rao Doppa and Partha Pratim Pande and Diana Marculescu and Radu Marculescu On-Chip Communication Network for Efficient Training of Deep Convolutional Networks on Heterogeneous Manycore Systems . . . . . . . . . . . . . . . . 672--686 Alessandro Biondi and Marco Di Natale and Giorgio Buttazzo Response-Time Analysis of Engine Control Applications Under Fixed-Priority Scheduling . . . . . . . . . . . . . . . 687--703 Minghua Tang and Jing Lin and Maurizio Palesi The Suboptimal Routing Algorithm for $2$D Mesh Network . . . . . . . . . . . 704--716 Yu Sasaki and Yosuke Todo Tight Bounds of Differentially and Linearly Active S-Boxes and Division Property of Lilliput . . . . . . . . . . 717--732 Subhamoy Maitra and Nishant Sinha and Akhilesh Siddhanti and Ravi Anand and Sugata Gangopadhyay A TMDTO Attack Against Lizard . . . . . 733--739 Wei Shu and Nian-Feng Tzeng NUDA: Non-Uniform Directory Architecture for Scalable Chip Multiprocessors . . . 740--747 Amir Aminifar and Petru Eles and Zebo Peng Optimization of Message Encryption for Real-Time Applications in Embedded Systems . . . . . . . . . . . . . . . . 748--754
Rik Jongerius and Andreea Anghel and Gero Dittmann and Giovanni Mariani and Erik Vermij and Henk Corporaal Analytic Multi-Core Processor Model for Fast Design-Space Exploration . . . . . 755--770 Xun Jiao and Abbas Rahimi and Yu Jiang and Jianguo Wang and Hamed Fatemi and Jose Pineda de Gyvez and Rajesh K. Gupta CLIM: A Cross-Level Workload-Aware Timing Error Prediction Model for Functional Units . . . . . . . . . . . . 771--783 Quan Chen and Minyi Guo Contention and Locality-Aware Work-Stealing for Iterative Applications in Multi-Socket Computers . . . . . . . 784--798 Tianwei Zhang and Ruby B. Lee Design, Implementation and Verification of Cloud Architecture for Monitoring a Virtual Machine's Security Health . . . 799--815 Alejandro Villegas and Rafael Asenjo and Angeles Navarro and Oscar Plata and David Kaeli Lightweight Hardware Transactional Memory for GPU Scratchpad Memory . . . . 816--829 Ajeya Naithani and Stijn Eyerman and Lieven Eeckhout Optimizing Soft Error Reliability Through Scheduling on Heterogeneous Multicore Processors . . . . . . . . . . 830--846 Xiaochen Guo and Mahdi Nazm Bojnordi and Qing Guo and Engin Ipek Sanitizer: Mitigating the Impact of Expensive ECC Checks on STT-MRAM Based Main Memories . . . . . . . . . . . . . 847--860 Joo Hwan Lee and Hyesoon Kim StaleLearn: Learning Acceleration with Asynchronous Synchronization Between Model Replicas on PIM . . . . . . . . . 861--873 Ting-Hao Tsai and Ya-Shu Chen and Xue-Xin He and Cheng-Yu Li STEM: A Thermal-Constrained Real-Time Scheduling for $3$D Heterogeneous-ISA Multicore Processors . . . . . . . . . . 874--889 Xiaolong Xie and Yun Liang and Xiuhong Li and Yudong Wu and Guangyu Sun and Tao Wang and Dongrui Fan CRAT: Enabling Coordinated Register Allocation and Thread-Level Parallelism Optimization for GPUs . . . . . . . . . 890--897 José L. Imaña Fast Bit-Parallel Binary Multipliers Based on Type-I Pentanomials . . . . . . 898--904
Freek Verbeek and Pooria M. Yaghini and Ashkan Eghbal and Nader Bagherzadeh A Compositional Approach for Verifying Protocols Running on On-Chip Networks 905--919 Haeseung Lee and Muhammad Shafique and Mohammad Abdullah Al Faruque Aging-Aware Workload Management on Embedded GPU Under Process Variation . . 920--933 Imran Ashraf and Nader Khammassi and Mottaqiallah Taouil and Koen Bertels Memory and Communication Profiling for Accelerator-Based Platforms . . . . . . 934--948 Arman Roohi and Ronald F. DeMara NV-Clustering: Normally-Off Computing Using Non-Volatile Datapaths . . . . . . 949--959 Karthikeyan P. Saravanan and Paul M. Carpenter PerfBound: Conserving Energy with Bounded Overheads in On/Off-Based HPC Interconnects . . . . . . . . . . . . . 960--974 Di Liu and Nan Guan and Jelena Spasic and Gang Chen and Songran Liu and Todor Stefanov and Wang Yi Scheduling Analysis of Imprecise Mixed-Criticality Real-Time Tasks . . . 975--991 Nadesh Ramanathan and John Wickerson and George A. Constantinides Scheduling Weakly Consistent C Concurrency for Reconfigurable Hardware 992--1006 Kang-Wook Kim and Youngeun Cho and Jeongyoon Eo and Chang-Gun Lee and Junghee Han System-Wide Time versus Density Tradeoff in Real-Time Multicore Fluid Scheduling 1007--1022 Tseng-Yi Chen and Yuan-Hao Chang and Shuo-Han Chen and Chih-Ching Kuo and Ming-Chang Yang and Hsin-Wen Wei and Wei-Kuan Shih wrJFS: A Write-Reduction Journaling File System for Byte-addressable NVRAM . . . 1023--1038 Ricardo González-Toral and Pedro Reviriego and Juan Antonio Maestro and Zhen Gao A Scheme to Design Concurrent Error Detection Techniques for the Fast Fourier Transform Implemented in SRAM-Based FPGAs . . . . . . . . . . . . 1039--1045 N. A. Rodríguez-Olivares and A. Gómez-Hernández and L. Nava-Balanzar and H. Jiménez-Hernández and J. A. Soto-Cajiga FPGA-Based Data Storage System on NAND Flash Memory in RAID 6 Architecture for In-Line Pipeline Inspection Gauges . . . 1046--1053 Amin Jadidi and Mohammad Arjomand and Mahmut T. Kandemir and Chita R. Das Performance and Power-Efficient Design of Dense Non-Volatile Cache in CMPs . . 1054--1061
Anil kanduri and Mohammad-Hashem haghbayan and Amir M. Rahmani and Muhammad Shafique and Axel Jantsch and Pasi Liljeberg adBoost: Thermal Aware Performance Boosting Through Dark Silicon Patterning 1062--1077 Martin Kumm and Johannes Kappauf Advanced Compressor Tree Synthesis for FPGAs . . . . . . . . . . . . . . . . . 1078--1091 Alex Grieve and Michael Davies and Phillip H. Jones and Joseph Zambreno ARMOR: A Recompilation and Instrumentation-Free Monitoring Architecture for Detecting Memory Exploits . . . . . . . . . . . . . . . . 1092--1104 Li Han and Louis-Claude Canon and Henri Casanova and Yves Robert and Frédéric Vivien Checkpointing Workflows for Fail-Stop Errors . . . . . . . . . . . . . . . . . 1105--1120 Gruia Calinescu and Chenchen Fu and Minming Li and Kai Wang and Chun Jason Xue Energy Optimal Task Scheduling with Normally-Off Local Memory and Sleep-Aware Shared Memory with Access Conflict . . . . . . . . . . . . . . . . 1121--1135 Changdae Kim and Jaehyuk Huh Exploring the Design Space of Fair Scheduling Supports for Asymmetric Multicore Systems . . . . . . . . . . . 1136--1152 Ronak Salamat and Misagh Khayambashi and Masoumeh Ebrahimi and Nader Bagherzadeh LEAD: An Adaptive $3$D-NoC Routing Algorithm with Queuing-Theory Based Analytical Verification . . . . . . . . 1153--1166 Stephan Friedrichs and Matthias Függer and Christoph Lenzen Metastability-Containing Circuits . . . 1167--1183 Sae-Eun Kim and Jaeyong Chung and Joon-Sung Yang Mitigating Observability Loss of Toggle-BasedX-Masking via Scan Chain Partitioning . . . . . . . . . . . . . . 1184--1192 Hyunseung Han and Jaeyong Chung and Joon-Sung Yang READ: Reliability Enhancement in $3$D-Memory Exploiting Asymmetric SER Distribution . . . . . . . . . . . . . . 1193--1201 Nian-Ze Lee and Jie-Hong R. Jiang Towards Formal Evaluation and Verification of Probabilistic Design . . 1202--1216
Heba Khdr and Hussam Amrouch and Jörg Henkel Aging-Aware Boosting . . . . . . . . . . 1217--1230 Chun-Wei Wu and Kuen-Jong Lee and Alan P. Su A Hybrid Multicast Routing Approach with Enhanced Methods for Mesh-Based Networks-on-Chip . . . . . . . . . . . . 1231--1245 Shuo-Han Chen and Yuan-Hao Chang and Yu-Pei Liang and Hsin-Wen Wei and Wei-Kuan Shih An Erase Efficiency Boosting Strategy for $3$D Charge Trap NAND Flash . . . . 1246--1258 Min Fu and Shujie Han and Patrick P. C. Lee and Dan Feng and Zuoning Chen and Yu Xiao A Simulation Analysis of Redundancy and Reliability in Primary Storage Deduplication . . . . . . . . . . . . . 1259--1272 Yidong Liu and Siting Liu and Yanzhi Wang and Fabrizio Lombardi and Jie Han A Stochastic Computational Multi-Layer Perceptron with Backward Propagation . . 1273--1286 Tiago Gama Rodrigues and Katsuya Suto and Hiroki Nishiyama and Nei Kato and Katsuhiro Temma Cloudlets Activation Scheme for Scalable Mobile Edge Computing with Transmission Power Control and Virtual Machine Migration . . . . . . . . . . . . . . . 1287--1300 Wangchen Dai and Donglong Chen and Ray C. C. Cheung and Çetin Kaya Koç FFT-Based McLaughlin's Montgomery Exponentiation without Conditional Selections . . . . . . . . . . . . . . . 1301--1314 Enrico Fraccaroli and Francesco Stefanni and Romeo Rizzi and Davide Quaglia and Franco Fummi Network Synthesis for Distributed Embedded Systems . . . . . . . . . . . . 1315--1330 Binyamin Frankel and Roi Herman and Shmuel Wimer Queuing-Based eDRAM Refreshing for Ultra-Low Power Processors . . . . . . . 1331--1340 Riham AlTawy and Raghvendra Rohit and Morgan He and Kalikinkar Mandal and Gangqiang Yang and Guang Gong Towards a Cryptographic Minimal Design: The sLiSCP Family of Permutations . . . 1341--1358 Julio Villalba-Moreno and Javier Hormigo and Sonia González-Navarro Unbiased Rounding for HUB Floating-Point Addition . . . . . . . . . . . . . . . . 1359--1365 Yunho Oh and Myung Kuk Yoon and Jong Hyun Park and Yongjun Park and Won Woo Ro WASP: Selective Data Prefetching with Monitoring Runtime Warp Progress on GPUs 1366--1373
Shuibing He and Xian-He Sun A Cost-Effective Distribution-Aware Data Replication Scheme for Parallel I/O Systems . . . . . . . . . . . . . . . . 1374--1387 Mincheol Kim and Ling Liu and Wonik Choi A GPU-Aware Parallel Index for Processing High-Dimensional Big Data . . 1388--1402 Hoseok Seol and Wongyu Shin and Jaemin Jang and Jungwhan Choi and Hakseung Lee and Lee-Sup Kim Elaborate Refresh: A Fine Granularity Retention Management for Deep Submicron DRAMs . . . . . . . . . . . . . . . . . 1403--1415 Mohammad Bakhshalipour and Pejman Lotfi-Kamran and Abbas Mazloumi and Farid Samandi and Mahmood Naderan-Tahan and Mehdi Modarressi and Hamid Sarbazi-Azad Fast Data Delivery for Many-Core Processors . . . . . . . . . . . . . . . 1416--1429 Amir Charif and Alexandre Coelho and Masoumeh Ebrahimi and Nader Bagherzadeh and Nacer-Eddine Zergainoh First-Last: A Cost-Effective Adaptive Routing Solution for TSV-Based Three-Dimensional Networks-on-Chip . . . 1430--1444 Rishad Shafik and Alex Yakovlev and Shidhartha Das Real-Power Computing . . . . . . . . . . 1445--1461 Alessandro Savino and Alessandro Vallero and Stefano Di Carlo ReDO: Cross-Layer Multi-Objective Design-Exploration Framework for Efficient Soft Error Resilient Systems 1462--1477 Alan Burns and Robert I. Davis and Sanjoy Baruah and Iain Bate Robust Mixed-Criticality Systems . . . . 1478--1491 Mincheol Kang and Wonyoung Lee and Soontae Kim Subpage-Aware Solid State Drive for Improving Lifetime and Performance . . . 1492--1505 Zhonghai Lu and Yuan Yao Thread Voting DVFS for Manycore NoCs . . 1506--1524 Kazuteru Namba and Fabrizio Lombardi A Single and Adjacent Error Correction Code for Fast Decoding of Critical Bits 1525--1531
Zhe Liu and Patrick Longa and Çetin Kaya Koç Guest Editors' Introduction to the Special Issue on Cryptographic Engineering in a Post-Quantum World: State of the Art Advances . . . . . . . 1532--1534 Thomas Espitau and Pierre-Alain Fouque and Beno\^\it Gérard and Mehdi Tibouchi Loop-Abort Faults on Lattice-Based Signature Schemes and Key Exchange Protocols . . . . . . . . . . . . . . . 1535--1549 Vincent Migliore and Guillaume Bonnoron and Caroline Fontaine Practical Parameters for Somewhat Homomorphic Encryption Schemes on Binary Circuits . . . . . . . . . . . . . . . . 1550--1560 Angshuman Karmakar and Sujoy Sinha Roy and Oscar Reparaz and Frederik Vercauteren and Ingrid Verbauwhede Constant-Time Discrete Gaussian Sampling 1561--1571 Wei Dai and William Whyte and Zhenfei Zhang Optimizing Polynomial Convolution for NTRUEncrypt . . . . . . . . . . . . . . 1572--1583 Xinwei Gao and Jintai Ding and Lin Li and Jiqiang Liu Practical Randomized RLWE-Based Key Exchange Against Signal Leakage Attack 1584--1593 Brian Koziel and Reza Azarderakhsh and Mehran Mozaffari Kermani A High-Performance and Scalable Hardware Architecture for Isogeny-Based Cryptography . . . . . . . . . . . . . . 1594--1609 Carlos Aguilar-Melchor and Thomas Ricosset CDT-Based Gaussian Sampling: From Multi to Double Precision . . . . . . . . . . 1610--1621 Armando Faz-Hernández and Julio López and Eduardo Ochoa-Jiménez and Francisco Rodríguez-Henríquez A Faster Software Implementation of the Supersingular Isogeny Diffie--Hellman Key Exchange Protocol . . . . . . . . . 1622--1636 Sujoy Sinha Roy and Kimmo Järvinen and Jo Vliegen and Frederik Vercauteren and Ingrid Verbauwhede HEPCloud: An FPGA-Based Multicore Processor for FV Somewhat Homomorphic Function Evaluation . . . . . . . . . . 1637--1650 Silvan Streit and Fabrizio De Santis Post-Quantum Key Exchange on ARMv8-A: a New Hope for NEON Made Simple . . . . . 1651--1662
Qiao Li and Liang Shi and Congming Gao and Yejia Di and Chun Jason Xue Access Characteristic Guided Read and Write Regulation on Flash Based Storage Systems . . . . . . . . . . . . . . . . 1663--1676 Ujjwal Gupta and Manoj Babu and Raid Ayoub and Michael Kishinevsky and Francesco Paterna and Suat Gumussoy and Umit Y. Ogras An Online Learning Methodology for Performance Modeling of Graphics Processors . . . . . . . . . . . . . . . 1677--1691 Diego F. G. Coelho and Sushmabhargavi Nimmalapalli and Vassil S. Dimitrov and Arjuna Madanayake and Renato J. Cintra and Arnaud Tisserand Computation of $2$D $ 8 \times 8$ DCT Based on the Loeffler Factorization Using Algebraic Integer Encoding . . . . 1692--1702 Adrian Garcia-Garcia and Juan Carlos Saez and Manuel Prieto-Matias Contention-Aware Fair Scheduling for Asymmetric Single-ISA Multicore Systems 1703--1719 Yosuke Todo and Takanori Isobe and Yonglin Hao and Willi Meier Cube Attacks on Non-Blackbox Polynomials Based on Division Property . . . . . . . 1720--1736 Bin Lao and Ge Nong and Wai Hong Chan and Jing Yi Xie Fast In-Place Suffix Sorting on a Multicore Computer . . . . . . . . . . . 1737--1749 Yun Liang and Shuo Wang and Wei Zhang FlexCL: A Model of Performance and Power for OpenCL Workloads on FPGAs . . . . . 1750--1764 Cen Chen and Kenli Li and Aijia Ouyang and Keqin Li FlinkCL: An OpenCL-Based In-Memory Computing Architecture on Heterogeneous CPU--GPU Clusters for Big Data . . . . . 1765--1779 Quan Zhou and Liang Yang and Xin Yan Reconfigurable Instruction-Based Multicore Parallel Convolution and Its Application in Real-Time Template Matching . . . . . . . . . . . . . . . . 1780--1793 Sun-Mi Park and Ku-Young Chang and Dowon Hong and Changho Seo Subquadratic Space Complexity Multiplier Using Even Type GNB Based on Efficient Toeplitz Matrix-Vector Product . . . . . 1794--1805 Riccardo Cantoro and Farrokh Ghani Zadegan and Marco Palena and Paolo Pasini and Erik Larsson and Matteo Sonza Reorda Test of Reconfigurable Modules in Scan Networks . . . . . . . . . . . . . . . . 1806--1817 Weichen Liu and Lei Yang and Weiwen Jiang and Liang Feng and Nan Guan and Wei Zhang and Nikil Dutt Thermal-Aware Task Mapping on Dynamically Reconfigurable Network-on-Chip Based Multiprocessor System-on-Chip . . . . . . . . . . . . . 1818--1834 Inhyuk Choi and Hyunggoy Oh and Young-Woo Lee and Sungho Kang Test Resource Reused Debug Scheme to Reduce the Post-Silicon Debug Cost . . . 1835--1839 Erica Tomes and Everett Neil Rush and Nihat Altiparmak Towards Adaptive Parallel Storage Systems . . . . . . . . . . . . . . . . 1840--1848
Paolo Montuschi Thank-You State of the Journal Editorial by the Outgoing Editor-in-Chief . . . . 1--2 Ahmed Louri Editorial from the Incoming Editor-in-Chief . . . . . . . . . . . . 3--3 Alejandro Valero and Francisco Candel and Darío Suárez-Gracia and Salvador Petit and Julio Sahuquillo An Aging-Aware GPU Register File Design Based on Data Redundancy . . . . . . . . 4--20 Yi Wu and You Li and Xiangxuan Ge and Yuan Gao and Weikang Qian An Efficient Method for Calculating the Error Statistics of Block-Based Approximate Adders . . . . . . . . . . . 21--38 Kwangwon Koh and Kangho Kim and Seunghyub Jeon and Jaehyuk Huh Disaggregated Cloud Memory with Elastic Block Management . . . . . . . . . . . . 39--52 Heba Khdr and Hussam Amrouch and Jörg Henkel Dynamic Guardband Selection: Thermal-Aware Optimization for Unreliable Multi-Core Systems . . . . . 53--66 Nusa Zidaric and Mark Aagaard and Guang Gong Hardware Optimizations and Analysis for the WG-16 Cipher with Tower Field Arithmetic . . . . . . . . . . . . . . . 67--82 Yejia Di and Liang Shi and Congming Gao and Qiao Li and Chun Jason Xue and Kaijie Wu Minimizing Retention Induced Refresh Through Exploiting Process Variation of Flash Memory . . . . . . . . . . . . . . 83--98 Orhun Kara and Muhammed F. Esgin On Analysis of Lightweight Stream Ciphers with Keyed Update . . . . . . . 99--110 Ming-Chang Yang and Yuan-Hao Chang and Fenggang Wu and Tei-Wei Kuo and David H. C. Du On Improving the Write Responsiveness for Host-Aware SMR Drives . . . . . . . 111--124 Andrea Gulino and Abdulrahman Kaitoua and Stefano Ceri Optimal Binning for Genomics . . . . . . 125--138 Jian Liu and Wenting Li and Ghassan O. Karame and N. Asokan Scalable Byzantine Consensus via Hardware-Assisted Secret Sharing . . . . 139--151 Anonymous 2018 Reviewers List . . . . . . . . . . 152--156 Anonymous 2018 Index \booktitleIEEE Transactions on Computers Vol. 67 . . . . . . . . . . 157--176
Chang-Ai Sun and Hepeng Dai and Huai Liu and Tsong Yueh Chen and Kai-Yuan Cai Adaptive Partition Testing . . . . . . . 157--169 Peng Liu and Shunbin Li and Qingyuan Ding An Energy-Efficient Accelerator Based on Hybrid CPU--FPGA Devices for Password Recovery . . . . . . . . . . . . . . . . 170--181 Farimah Farahmandi and Prabhat Mishra Automated Test Generation for Debugging Multiple Bugs in Arithmetic Circuits . . 182--197 Junshi Wang and Masoumeh Ebrahimi and Letian Huang and Xuan Xie and Qiang Li and Guangjun Li and Axel Jantsch Efficient Design-for-Test Approach for Networks-on-Chip . . . . . . . . . . . . 198--213 Alfonso Sánchez-Macián and Luis Alberto Aranda and Pedro Reviriego and Vahdaneh Kiani and Juan Antonio Maestro Enhancing Instruction TLB Resilience to Soft Errors . . . . . . . . . . . . . . 214--224 Shiru Ren and Yunqi Zhang and Lichen Pan and Zhen Xiao Phantasy: Low-Latency Virtualization-Based Fault Tolerance via Asynchronous Prefetching . . . . . . . . 225--238 Shuo Li and Nong Xiao and Peng Wang and Guangyu Sun and Xiaoyang Wang and Yiran Chen and Hai Helen Li and Jason Cong and Tao Zhang RC-NVM: Dual-Addressing Non-Volatile Memory Architecture Supporting Both Row and Column Memory Accesses . . . . . . . 239--254 Thomas Grass and Trevor E. Carlson and Alejandro Rico and Germán Ceballos and Eduard Ayguadé and Marc Casas and Miquel Moreto Sampled Simulation of Task-Based Programs . . . . . . . . . . . . . . . . 255--269 Xi Cheng and Min Zhou and Xiaoyu Song and Ming Gu and Jiaguang Sun Tolerating C Integer Error via Precision Elevation . . . . . . . . . . . . . . . 270--286 Chongyan Gu and Weiqiang Liu and Neil Hanley and Robert Hesselbarth and Máire O'Neill A Theoretical Model to Link Uniqueness and Min-Entropy for PUF Evaluations . . 287--293 Gabriel Rodríguez and Mahmut T. Kandemir and Juan Touriño Affine Modeling of Program Traces . . . 294--300 Kazuteru Namba and Fabrizio Lombardi Coding for Write Latency Reduction in a Multi-Level Cell (MLC) Phase Change Memory (PCM) . . . . . . . . . . . . . . 301--306 Prawar Poudel and Biswajit Ray and Aleksandar Milenkovic Microcontroller TRNGs Using Perturbed States of NOR Flash Memory Cells . . . . 307--313
Sunil Dutt and Satyabrata Dash and Sukumar Nandi and Gaurav Trivedi Analysis, Modeling and Optimization of Equal Segment Based Approximate Adders 314--330 Subho Sankar Banerjee and Mohamed El-Hadedy and Jong Bin Lim and Zbigniew T. Kalbarczyk and Deming Chen and Steven S. Lumetta and Ravishankar K. Iyer ASAP: Accelerated Short-Read Alignment on Programmable Hardware . . . . . . . . 331--346 Debapriya Basu Roy and Shivam Bhasin and Sylvain Guilley and Annelie Heuser and Sikhar Patranabis and Debdeep Mukhopadhyay CC Meets FIPS: A Hybrid Test Methodology for First Order Side Channel Analysis 347--361 Shibo Wang and Mahdi Nazm Bojnordi and Xiaochen Guo and Engin Ipek Content Aware Refresh: Exploiting the Asymmetry of DRAM Retention Errors to Reduce the Refresh Frequency of Less Vulnerable Data . . . . . . . . . . . . 362--374 Quintin Fettes and Mark Clark and Razvan Bunescu and Avinash Karanth and Ahmed Louri Dynamic Voltage and Frequency Scaling in NoCs with Supervised and Reinforcement Learning Techniques . . . . . . . . . . 375--389 SeongJae Park and Minchan Kim and Heon Y. Yeom GCMA: Guaranteed Contiguous Memory Allocator . . . . . . . . . . . . . . . 390--401 Xiaoyi Zhang and Dan Feng and Yu Hua and Jianxi Chen Optimizing File Systems with a Write-Efficient Journaling Scheme on Non-Volatile Memory . . . . . . . . . . 402--413 Chengwen Wu and Guangyan Zhang and Yang Wang and Xinyang Jiang and Weimin Zheng Redio: Accelerating Disk-Based Graph Processing by Reducing Disk I/Os . . . . 414--425 Xubin Chen and Yin Li and Tong Zhang Reducing Flash Memory Write Traffic by Exploiting a Few MBs of Capacitor-Powered Write Buffer Inside Solid-State Drives (SSDs) . . . . . . . 426--439 David Kozhaya and Jérémie Decouchant and Paulo Esteves-Verissimo RT-ByzCast: Byzantine-Resilient Real-Time Reliable Broadcast . . . . . . 440--454 Elham Cheshmikhani and Hamed Farbeh and Seyed Ghassem Miremadi and Hossein Asadi TA-LRW: A Replacement Policy for Error Rate Reduction in STT-MRAM Caches . . . 455--470
Jian Zhou and Huafeng Wu and Jun Wang ApproxSSD: Data Layout Aware Sampling on an Array of SSDs . . . . . . . . . . . . 471--483 Fabian Schuiki and Michael Schaffner and Frank K. Gürkaynak and Luca Benini A Scalable Near-Memory Architecture for Training Deep Neural Networks on Large In-Memory Datasets . . . . . . . . . . . 484--497 Weining Song and Yang Zhou and Mengying Zhao and Lei Ju and Chun Jason Xue and Zhiping Jia EMC: Energy-Aware Morphable Cache Design for Non-Volatile Processors . . . . . . 498--509 Pirmin Vogel and Andrea Marongiu and Luca Benini Exploring Shared Virtual Memory for FPGA Accelerators with a Configurable IOMMU 510--525 Hai Wang and Diya Tang and Ming Zhang and Sheldon X. -D. Tan and Chi Zhang and He Tang and Yuan Yuan GDP: A Greedy Based Dynamic Power Budgeting Method for Multi/Many-Core Systems in Dark Silicon . . . . . . . . 526--541 Ning Pang and Jifu Zhang and Chaowei Zhang and Xiao Qin Parallel Hierarchical Subspace Clustering of Categorical Data . . . . . 542--555 Panping Zhou and Jianzhong Huang and Xiao Qin and Changsheng Xie PaRS: A Popularity-Aware Redundancy Scheme for In-Memory Stores . . . . . . 556--569 Kamil D. Gür and Yuriy Polyakov and Kurt Rohloff and Gerard W. Ryan and Hadi Sajjadpour and Erkay Sava\cs Practical Applications of Improved Gaussian Sampling for Trapdoor Lattices 570--584 Liwei Kuang and Laurence T. Yang and Qing Zhu and Jinjun Chen Secure Tensor Decomposition for Big Data Using Transparent Computing Paradigm . . 585--596 Anastasia Volkova and Matei Istoan and Florent De Dinechin and Thibault Hilaire Towards Hardware IIR Filters Computing Just Right: Direct Form I Case Study . . 597--608 Yunho Oh and Keunsoo Kim and Myung Kuk Yoon and Jong Hyun Park and Yongjun Park and Murali Annavaram and Won Woo Ro Adaptive Cooperation of Prefetching and Warp Scheduling on GPUs . . . . . . . . 609--616 Yinglin Zhao and Peng Ouyang and Wang Kang and Shouyi Yin and Youguang Zhang and Shaojun Wei and Weisheng Zhao An STT-MRAM Based in Memory Architecture for Low Power Integral Computing . . . . 617--623 Magnus Gaudal Find and René Peralta Better Circuits for Binary Polynomial Multiplication . . . . . . . . . . . . . 624--630
D. Huang and Q. Liu and J. Choi and N. Podhorszki and S. Klasky and J. Logan and G. Ostrouchov and X. He and M. Wolf Can I/O Variability Be Reduced on QoS-Less HPC Storage Systems? . . . . . 631--645 H. Chen and S. Lee and T. Mudge and C. Wu and C. Chakrabarti Configurable-ECC: Architecting a Flexible ECC Scheme to Support Different Sized Accesses in High Bandwidth Memory Systems . . . . . . . . . . . . . . . . 646--659 M. S. Kim and A. A. D. Barrio and L. T. Oliveira and R. Hermida and N. Bagherzadeh Efficient Mitchell's Approximate Log Multipliers for Convolutional Neural Networks . . . . . . . . . . . . . . . . 660--675 J. Nunez-Yanez Energy Proportional Neural Network Inference with Adaptive Voltage and Frequency Scaling . . . . . . . . . . . 676--687 G. H. M. Zanon and M. A. Simplicio and G. C. C. F. Pereira and J. Doliskani and P. S. L. M. Barreto Faster Key Compression for Isogeny-Based Cryptosystems . . . . . . . . . . . . . 688--701 R. Bellal and E. Lamini and H. Belbachir and S. Tagzout and A. Belouchrani Improved Affine Arithmetic-Based Precision Analysis for Polynomial Function Evaluation . . . . . . . . . . 702--712 D. Gadioli and E. Vitali and G. Palermo and C. Silvano mARGOt: A Dynamic Autotuning Framework for Self-Aware Approximate Computing . . 713--728 E. Muñoz-Coreas and H. Thapliyal Quantum Circuit Design of a $T$-count Optimized Integer Multiplier . . . . . . 729--739 F. B. Allyson and M. L. Danilo and S. M. José and B. C. Giovanni Sherlock $N$-overlap: Invasive Normalization and Overlap Coefficient for the Similarity Analysis Between Source Code . . . . . . . . . . . . . . 740--751 J. Jang and W. Shin and J. Choi and Y. Kim and L. Kim Sparse-Insertion Write Cache to Mitigate Write Disturbance Errors in Phase Change Memory . . . . . . . . . . . . . . . . . 752--764 A. Vallero and A. Savino and A. Chatzidimitriou and M. Kaliorakis and M. Kooli and M. Riera and M. Anglada and G. Di Natale and A. Bosio and R. Canal and A. Gonzalez and D. Gizopoulos and R. Mariani and S. Di Carlo SyRA: Early System Reliability Analysis for Cross-Layer Soft Errors Resilience in Memory Arrays of Microprocessor Systems . . . . . . . . . . . . . . . . 765--783 K. Chen and L. Chen and P. Reviriego and F. Lombardi Efficient Implementations of Reduced Precision Redundancy (RPR) Multiply and Accumulate (MAC) . . . . . . . . . . . . 784--790 E. Testa and M. Soeken and L. G. Amar\`u and W. Haaswijk and G. De Micheli Mapping Monotone Boolean Functions into Majority . . . . . . . . . . . . . . . . 791--797 P. Reviriego and S. Liu and O. Rottenstreich and F. Lombardi Two Bit Overlap: A Class of Double Error Correction One Step Majority Logic Decodable Codes . . . . . . . . . . . . 798--803
W. Liu and T. Cao and P. Yin and Y. Zhu and C. Wang and E. E. Swartzlander and F. Lombardi Design and Analysis of Approximate Redundant Binary Multipliers . . . . . . 804--819 D. Casini and A. Biondi and G. Buttazzo Handling Transients of Dynamic Real-Time Workload Under EDF Scheduling . . . . . 820--835 S. Milutinovic and E. Mezzetti and J. Abella and F. J. Cazorla Increasing the Reliability of Software Timing Analysis for Cache-Based Processors . . . . . . . . . . . . . . . 836--851 B. K. Joardar and R. G. Kim and J. R. Doppa and P. P. Pande and D. Marculescu and R. Marculescu Learning-Based Application-Agnostic $3$D NoC Design for Heterogeneous Manycore Systems . . . . . . . . . . . . . . . . 852--866 W. Lu and G. Yan and J. Li and S. Gong and S. Jiang and J. Wu and X. Li Promoting the Harmony between Sparsity and Regularity: A Relaxed Synchronous Architecture for Convolutional Neural Networks . . . . . . . . . . . . . . . . 867--881 M. Yang and W. Huang and J. Chen Resource-Oriented Partitioning for Multiprocessor Systems with Shared Resources . . . . . . . . . . . . . . . 882--898 A. Pérez-Resa and M. Garcia-Bosque and C. Sánchez-Azqueta and S. Celma Self-Synchronized Encryption for Physical Layer in 10Gbps Optical Links 899--911 S. Sen and S. Jain and S. Venkataramani and A. Raghunathan SparCE: Sparsity Aware General-Purpose Core Extensions to Accelerate Deep Neural Networks . . . . . . . . . . . . 912--925 Y. Zhao and H. Zeng The Concept of Unschedulability Core for Optimizing Real-Time Systems with Fixed-Priority Scheduling . . . . . . . 926--938 Z. M. Fadlullah and B. Mao and F. Tang and N. Kato Value Iteration Architecture Based Deep Learning for Intelligent Routing Exploiting Heterogeneous Computing Platforms . . . . . . . . . . . . . . . 939--950
J. D. Bruguera and F. de Dinechin Guest Editors Introduction: Special Section on Computer Arithmetic . . . . . 951--952 V. Magron and A. Rocca and T. Dang Certified Roundoff Error Bounds Using Bernstein Expansions and Sparse Krivine--Stengle Representations . . . . 953--966 N. Burgess and C. Goodyer and C. N. Hinds and D. R. Lutz High-Precision Anchored Accumulators for Reproducible Floating-Point Summation 967--978 J. W. Bos and S. J. Friedberger Arithmetic Considerations for Isogeny-Based Cryptography . . . . . . . 979--990 A. Reyhani-Masoleh and H. El-Razouk and A. Monfared New Multiplicative Inverse Architectures Using Gaussian Normal Basis . . . . . . 991--1006 S. A. Musavi and M. R. Hashemi An Ontology-Based Method for HW/SW Architecture Reconstruction . . . . . . 1007--1018 D. Xue and L. Huang and C. Li and C. Wu Dapper: An Adaptive Manager for Large-Capacity Persistent Memory . . . . 1019--1034 H. Zhang and D. Chen and S. Ko Efficient Multiple-Precision Floating-Point Fused Multiply-Add with Mixed-Precision Support . . . . . . . . 1035--1048 K. Maragos and G. Lentaris and D. Soudris In-the-Field Mitigation of Process Variability for Improved FPGA Performance . . . . . . . . . . . . . . 1049--1063 L. Wang and X. Zhao and D. Kaeli and Z. Wang and L. Eeckhout Intra-Cluster Coalescing and Distributed-Block Scheduling to Reduce GPU NoC Pressure . . . . . . . . . . . . 1064--1076 G. Li and c. Zhou and J. Li and B. Guo Maintaining Data Freshness in Distributed Cyber-Physical Systems . . . 1077--1090 R. Ueno and M. Suzuki and N. Homma Tackling Biased PUFs Through Biased Masking: a Debiasing Method for Efficient Fuzzy Extractor . . . . . . . 1091--1104 N. Kito and N. Takagi Concurrent Error Detectable Carry Select Adder with Easy Testability . . . . . . 1105--1110
Y. Chang and J. Hu and M. B. Tahoori and R. F. DeMara Guest Editorial: \booktitleIEEE Transactions on Computers Special Section on Emerging Non-Volatile Memory Technologies: From Devices to Architectures and Systems . . . . . . . 1111--1113 R. Salkhordeh and O. Mutlu and H. Asadi An Analytical Model for Performance and Lifetime Estimation of Hybrid DRAM--NVM Main Memories . . . . . . . . . . . . . 1114--1130 G. Dai and T. Huang and Y. Wang and H. Yang and J. Wawrzynek HyVE: Hybrid Vertex-Edge Memory Hierarchy for Energy-Efficient Graph Processing . . . . . . . . . . . . . . . 1131--1146 Y. Chen and Y. Lu and P. Chen and J. Shu Efficient and Consistent NVMM Cache for SSD-Based File System . . . . . . . . . 1147--1158 M. Zabihi and Z. I. Chowdhury and Z. Zhao and U. R. Karpuzcu and J. Wang and S. S. Sapatnekar In-Memory Processing on the Spintronic CRAM: From Hardware Design to Application Mapping . . . . . . . . . . 1159--1173 L. Yang and W. Liu and N. Guan and N. Dutt Optimal Application Mapping and Scheduling for Network-on-Chips with Computation in STT--RAM Based Router . . 1174--1189 A. Agrawal and A. Ankit and K. Roy SPARE: Spiking Neural Network Acceleration Using ROM-Embedded RAMs as In-Memory-Computation Primitives . . . . 1190--1200 I. Roy and A. Srivastava and M. Grimm and M. Nourian and M. Becchi and S. Aluru Evaluating High Performance Pattern Matching on the Automata Processor . . . 1201--1212 A. V. Gorshkov and M. Berezalsky and J. Fedorova and K. Levit-Gurevich and N. Itzhaki GPU Instruction Hotspots Detection Based on Binary Instrumentation Approach . . . 1213--1224 J. Yu and D. Kozhaya and J. Decouchant and P. Esteves-Verissimo RepuCoin: Your Reputation Is Your Power 1225--1237 E. M. Benhani and L. Bossuet and A. Aubert The Security of ARM TrustZone in a FPGA-Based SoC . . . . . . . . . . . . . 1238--1248 W. Liu and J. Ni and Z. Liu and C. Liu and M. O. Neill Optimized Modular Multiplication for Supersingular Isogeny Diffie--Hellman 1249--1255
B. Mao and F. Tang and Z. M. Fadlullah and N. Kato An Absorbing Markov Chain Based Model to Solve Computation and Communication Tradeoff in GPU-Accelerated MDRUs for Safety Confirmation in Disaster Scenarios . . . . . . . . . . . . . . . 1256--1268 A. Bernasconi and V. Ciriani and G. Trucco and T. Villa Boolean Minimization of Projected Sums of Products via Boolean Relations . . . 1269--1282 X. Zhao and S. Ma and Z. Wang and N. E. Jerger and L. Eeckhout CD-Xbar: A Converge-Diverge Crossbar Network for High-Performance GPUs . . . 1283--1296 S. Agarwal and H. K. Kapoor Improving the Lifetime of Non-Volatile Cache by Write Restriction . . . . . . . 1297--1312 X. Wei and D. Feng and W. Tong and J. LIU and L. Ye NICO: Reducing Software-Transparent Crash Consistency Cost for Persistent Memory . . . . . . . . . . . . . . . . . 1313--1324 S. Gupta and M. Imani and H. Kaur and T. S. Rosing NNPIM: A Processing In-Memory Architecture for Neural Network Acceleration . . . . . . . . . . . . . . 1325--1337 C. Xiao and L. Zhang and W. Liu and L. Cheng and P. Li and Y. Pan and N. Bergmann NV-eCryptfs: Accelerating Enterprise-Level Cryptographic File System with Non-Volatile Memory . . . . 1338--1352 X. Zhang and Y. Lao On the Construction of Composite Finite Fields for Hardware Obfuscation . . . . 1353--1364 M. Zhang and L. Zhang and L. Jiang and F. T. Chong and Z. Liu Quick-and-Dirty: An Architecture for High-Performance Temporary Short Writes in MLC PCM . . . . . . . . . . . . . . . 1365--1375 X. Zhang and Z. Qian and S. Zhang and X. Li and X. Wang and S. Lu Semi-Clairvoyant Scheduling in Data Analytics Systems . . . . . . . . . . . 1376--1389 G. Berthou and T. Delizy and K. Marquet and T. Risset and G. Salagnac Sytare: A Lightweight Kernel for NVRAM-Based Transiently-Powered Systems 1390--1403 A. Ramos and R. G. Toral and P. Reviriego and J. A. Maestro An ALU Protection Methodology for Soft Processors on SRAM-Based FPGAs . . . . . 1404--1410
Y. Shi and W. Wei and H. Fan and M. H. Au and X. Luo A Light-Weight White-Box Encryption Scheme for Securing Distributed Embedded Devices . . . . . . . . . . . . . . . . 1411--1427 M. Kim and J. Choi and H. Kim and H. Lee An Effective DRAM Address Remapping for Mitigating Rowhammer Errors . . . . . . 1428--1441 F. Candel and A. Valero and S. Petit and J. Sahuquillo Efficient Management of Cache Accesses to Boost GPGPU Memory Subsystem Performance . . . . . . . . . . . . . . 1442--1454 J. Woodruff and A. Joannou and H. Xia and A. Fox and R. M. Norton and D. Chisnall and B. Davis and K. Gudka and N. W. Filardo and A. T. Markettos and M. Roe and P. G. Neumann and R. N. M. Watson and S. W. Moore CHERI Concentrate: Practical Compressed Capabilities . . . . . . . . . . . . . . 1455--1469 Y. Hao and T. Isobe and L. Jiao and C. Li and W. Meier and Y. Todo and Q. Wang Improved Division Property Based Cube Attacks Exploiting Algebraic Properties of Superpoly . . . . . . . . . . . . . . 1470--1486 X. Dai and H. Yin and N. K. Jha NeST: A Neural Network Synthesis Tool Based on a Grow-and-Prune Paradigm . . . 1487--1497 S. Patranabis and N. Datta and D. Jap and J. Breier and S. Bhasin and D. Mukhopadhyay SCADFA: Combined SCA + DFA Attacks on Block Ciphers with Practical Validations 1498--1510 H. Zahaf and G. Lipari and M. Bertogna and P. Boulet The Parallel Multi-Mode Digraph Task Model for Energy-Aware Real-Time Heterogeneous Multi-Core Systems . . . . 1511--1524 M. Lora and S. Vinco and F. Fummi Translation, Abstraction and Integration for Effective Smart System Design . . . 1525--1538 F. Mireshghallah and M. Bakhshalipour and M. Sadrosadati and H. Sarbazi-Azad Energy-Efficient Permanent Fault Tolerance in Hard Real-Time Systems . . 1539--1545 M. Kim and I. Chang and H. Lee Segmented Tag Cache: A Novel Cache Organization for Reducing Dynamic Read Energy . . . . . . . . . . . . . . . . . 1546--1552 A. Nannarelli Tunable Floating-Point Adder . . . . . . 1553--1560
D. Le and S. L. Yeo and K. Khoo Algebraic Differential Fault Analysis on SIMON Block Cipher . . . . . . . . . . . 1561--1572 Nicolas Fabiano and Jean-Michel Muller and Joris Picot Algorithms for Triple-Word Arithmetic 1573--1583 Y. Cao and C. Li and J. Wang and W. Zhang and Q. Chen and J. Leng and B. Yao and Y. Shen and M. Guo DR Refresh: Releasing DRAM Potential by Enabling Read Accesses Under Refresh . . 1584--1596 A. Hassan and D. Nikolopoulos and H. Vandierendonck Fast and Energy-Efficient OLAP Data Management on Hybrid Main Memory Systems 1597--1611 G. Gallin and A. Tisserand Generation of Finely-Pipelined GF($P$P) Multipliers for Flexible Curve Based Cryptography on FPGAs . . . . . . . . . 1612--1622 K. Kuan and T. Adegbija HALLS: An Energy-Efficient Highly Adaptable Last Level STT-RAM Cache for Multicore Systems . . . . . . . . . . . 1623--1634 H. Jiang and L. Liu and F. Lombardi and J. Han Low-Power Unsigned Divider and Square Root Circuit Designs Using Adaptive Approximation . . . . . . . . . . . . . 1635--1646 H. Amrouch and S. B. Ehsani and A. Gerstlauer and J. Henkel On the Efficiency of Voltage Overscaling under Temperature and Aging Effects . . 1647--1662 J. Li and S. Jiang and S. Gong and J. Wu and J. Yan and G. Yan and X. Li SqueezeFlow: A Sparse CNN Accelerator Exploiting Concise Convolution Rules . . 1663--1677 G. R. Redinbo Tensor Product DFT Codes vs Standard DFT Codes . . . . . . . . . . . . . . . . . 1678--1688 Z. Gu and S. Li A Generalized RNS Mclaughlin Modular Multiplication with Non-Coprime Moduli Sets . . . . . . . . . . . . . . . . . . 1689--1696 S. Venkatachalam and E. Adams and H. J. Lee and S. Ko Design and Analysis of Area and Power Efficient Approximate Booth Multipliers 1697--1703
J. Luo and H. Cheng and I. Lin and D. Chang TAP: Reducing the Energy of Asymmetric Hybrid Last-Level Cache via Thrashing Aware Placement and Migration . . . . . 1704--1719 J. Courtois and L. Abbas-Turki and J. Bajard Resilience of Randomized RNS Arithmetic with Respect to Side-Channel Leaks of Cryptographic Computation . . . . . . . 1720--1730 T. Ye and Y. Wei and W. Meier A New Cube Attack on MORUS by Using Division Property . . . . . . . . . . . 1731--1740 J. Choi and J. Jang and L. Kim DC-PCM: Mitigating PCM Write Disturbance with Low Performance Overhead by Using Detection Cells . . . . . . . . . . . . 1741--1754 Q. Zhou and K. Wang and P. Li and D. Zeng and S. Guo and B. Ye and M. Guo Fast Coflow Scheduling via Traffic Compression and Stage Pipelining in Datacenter Networks . . . . . . . . . . 1755--1771 H. Lee and M. Kim and H. Kim and H. Kim and H. Lee Integration and Boost of a Read-Modify-Write Module in Phase Change Memory System . . . . . . . . . . . . . 1772--1784 J. Zhou and X. S. Hu and Y. Ma and J. Sun and T. Wei and S. Hu Improving Availability of Multicore Real-Time Systems Suffering Both Permanent and Transient Faults . . . . . 1785--1801 I. Jeong and C. Lee and K. Kim and W. W. Ro OverCome: Coarse-Grained Instruction Commit with Handover Register Renaming 1802--1816 R. Yazdani and J. Arnau and A. González A Low-Power, High-Performance Speech Recognition Accelerator . . . . . . . . 1817--1831
Christoph Walther Verified Newton--Raphson Iteration for Multiplicative Inverses Modulo Powers of Any Base . . . . . . . . . . . . . . . . 9:1--9:7