FESETPREC 3CW "09 March 2006" "mathcw-1.00"
Table of contents
fesetprec - control floating-point rounding precision modes
cc [ flags ] -I/usr/local/include file(s) -L/usr/local/lib -lmcw [ ... ]
#include <fenvcw.h>
extern int fesetprec (int prec)
Set the current rounding precision to one of the values
FE_FLTPREC,
FE_DBLPREC,
or
FE_LDBLPREC
specified by the argument
prec.
Rounding precision control is a feature of some implementations of
the IEEE 754 floating-point system, such as those on the Motorola 68K
and Intel IA-32 and IA-64 architectures, which carry out computations
in extended-length registers, by default in the longest available
precision. Intermediate results are normally rounded to storage
precision only when they are stored to memory. However, when the
rounding precision is set to
FE_FLTPREC
or
FE_DBLPREC,
rounding is done to the 32-bit or 64-bit storage formats,
respectively, after each numeric operation.
Lowering the rounding precision on such systems may make it easier to
compare numerical results with those from other systems that lack
rounding precision control. However, it also means that intermediate
computations are carried out in that lowered precision, which may
worsen numerical accuracy.
The AMD AMD64 and Intel EM64T architectures have a mixed
floating-point architecture, providing the old-style 80-bit extended
precision registers normally used for computations with long
double, and 32-bit and 64-bit registers used for computations with
float and double. Rounding precision control is
only effective for the 80-bit registers.
Return the argument on success, and a negative value on failure.
None.
feclearexcept(3CW),
fegetenv(3CW),
fegetexceptflag(3CW),
fegetprec(3CW),
fegetround(3CW),
feholdexcept(3CW),
feraiseexcept(3CW),
fesetenv(3CW),
fesetexceptflag(3CW),
fesetround(3CW),
fetestexcept(3CW),
feupdateenv(3CW).